Commit 7aaff9bf81b17b7920826f99a17eae7659292f5c

Authored by Bin Meng
Committed by Simon Glass
1 parent 9e3a7c9bac

x86: crownbay: Enable graphics support

Enable graphics support on Intel Crown Bay board With the help of
vgabios for Intel TunnelCreek IGD. Tested with an external LVDS
panel connected to X4 connector and SDVO adapter connected to X9
connector on the board.

Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

Showing 3 changed files with 23 additions and 14 deletions Side-by-side Diff

configs/crownbay_defconfig
... ... @@ -18,6 +18,9 @@
18 18 CONFIG_SPI_FLASH=y
19 19 CONFIG_USE_PRIVATE_LIBGCC=y
20 20 CONFIG_SYS_VSNPRINTF=y
  21 +CONFIG_HAVE_VGA_BIOS=y
21 22 CONFIG_GENERATE_MP_TABLE=y
  23 +CONFIG_VIDEO_VESA=y
  24 +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
22 25 CONFIG_DM_RTC=y
... ... @@ -113,6 +113,10 @@
113 113 binary, change the following five bytes values from orginally E8 42 FF FF FF
114 114 to B8 00 80 0B 00.
115 115  
  116 +As for the video ROM, you need manually extract it from the Intel provided
  117 +BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM
  118 +ID 8086:4108, extract and save it as vga.bin in the board directory.
  119 +
116 120 Now you can build U-Boot and obtain u-boot.rom
117 121  
118 122 $ make crownbay_defconfig
... ... @@ -254,7 +258,7 @@
254 258  
255 259 CPU Microcode
256 260 -------------
257   -Modern CPUs usually require a special bit stream called microcode [6] to be
  261 +Modern CPUs usually require a special bit stream called microcode [8] to be
258 262 loaded on the processor after power up in order to function properly. U-Boot
259 263 has already integrated these as hex dumps in the source tree.
260 264  
... ... @@ -265,9 +269,9 @@
265 269 have an SMP kernel to discover all of the available processors, U-Boot needs to
266 270 prepare configuration tables which contain the multi-CPUs information before
267 271 loading the OS kernel. Currently U-Boot supports generating two types of tables
268   -for SMP, called Simple Firmware Interface (SFI) [7] and Multi-Processor (MP) [8]
269   -tables. The writing of these two tables are controlled by two Kconfig options
270   -GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
  272 +for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP)
  273 +[10] tables. The writing of these two tables are controlled by two Kconfig
  274 +options GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
271 275  
272 276 Driver Model
273 277 ------------
... ... @@ -372,7 +376,9 @@
372 376 [3] http://www.coreboot.org/~stepan/pci8086,0166.rom
373 377 [4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
374 378 [5] http://www.intel.com/fsp
375   -[6] http://en.wikipedia.org/wiki/Microcode
376   -[7] http://simplefirmware.org
377   -[8] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
  379 +[6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html
  380 +[7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/
  381 +[8] http://en.wikipedia.org/wiki/Microcode
  382 +[9] http://simplefirmware.org
  383 +[10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
include/configs/crownbay.h
... ... @@ -32,15 +32,16 @@
32 32 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
33 33 #define CONFIG_PCI_IO_SIZE 0xe000
34 34  
  35 +#define CONFIG_PCI_CONFIG_HOST_BRIDGE
35 36 #define CONFIG_SYS_EARLY_PCI_INIT
36 37 #define CONFIG_PCI_PNP
37 38 #define CONFIG_E1000
38 39  
39   -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
40   - "stdout=serial\0" \
41   - "stderr=serial\0"
  40 +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga,usbkbd\0" \
  41 + "stdout=serial,vga\0" \
  42 + "stderr=serial,vga\0"
42 43  
43   -#define CONFIG_SCSI_DEV_LIST \
  44 +#define CONFIG_SCSI_DEV_LIST \
44 45 {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
45 46  
46 47 #define CONFIG_SPI_FLASH_SST
... ... @@ -55,9 +56,8 @@
55 56 #define CONFIG_PCH_GBE
56 57 #define CONFIG_PHYLIB
57 58  
58   -/* Video is not supported */
59   -#undef CONFIG_VIDEO
60   -#undef CONFIG_CFB_CONSOLE
  59 +/* TunnelCreek IGD support */
  60 +#define CONFIG_VGA_AS_SINGLE_DEVICE
61 61  
62 62 /* Environment configuration */
63 63 #define CONFIG_ENV_SECT_SIZE 0x1000