Commit 7b1a50b7b660232196a5250ccaf6aa560944865d
Committed by
Andes
Andes
1 parent
6d3cb0fdcd
Exists in
smarc_8mq_lf_v2020.04
and in
17 other branches
nds32: board: Support SPI driver.
Add spi dts node and enable spi dm flash config. Signed-off-by: rick <rick@andestech.com>
Showing 3 changed files with 45 additions and 3 deletions Side-by-side Diff
arch/nds32/dts/ae3xx.dts
| ... | ... | @@ -8,6 +8,7 @@ |
| 8 | 8 | aliases { |
| 9 | 9 | uart0 = &serial0; |
| 10 | 10 | ethernet0 = &mac0; |
| 11 | + spi0 = &spi; | |
| 11 | 12 | } ; |
| 12 | 13 | |
| 13 | 14 | chosen { |
| ... | ... | @@ -22,6 +23,12 @@ |
| 22 | 23 | reg = <0x00000000 0x40000000>; |
| 23 | 24 | }; |
| 24 | 25 | |
| 26 | + spiclk: virt_100mhz { | |
| 27 | + #clock-cells = <0>; | |
| 28 | + compatible = "fixed-clock"; | |
| 29 | + clock-frequency = <100000000>; | |
| 30 | + }; | |
| 31 | + | |
| 25 | 32 | cpus { |
| 26 | 33 | #address-cells = <1>; |
| 27 | 34 | #size-cells = <0>; |
| ... | ... | @@ -69,5 +76,21 @@ |
| 69 | 76 | device-width = <1>; |
| 70 | 77 | }; |
| 71 | 78 | |
| 79 | + spi: spi@f0b00000 { | |
| 80 | + compatible = "andestech,atcspi200"; | |
| 81 | + reg = <0xf0b00000 0x1000>; | |
| 82 | + #address-cells = <1>; | |
| 83 | + #size-cells = <0>; | |
| 84 | + num-cs = <1>; | |
| 85 | + clocks = <&spiclk>; | |
| 86 | + interrupts = <3 4>; | |
| 87 | + flash@0 { | |
| 88 | + compatible = "spi-flash"; | |
| 89 | + spi-max-frequency = <50000000>; | |
| 90 | + reg = <0>; | |
| 91 | + spi-cpol; | |
| 92 | + spi-cpha; | |
| 93 | + }; | |
| 94 | + }; | |
| 72 | 95 | }; |
configs/adp-ae3xx_defconfig
| ... | ... | @@ -5,6 +5,8 @@ |
| 5 | 5 | CONFIG_BOOTDELAY=3 |
| 6 | 6 | CONFIG_SYS_PROMPT="NDS32 # " |
| 7 | 7 | CONFIG_CMD_MMC=y |
| 8 | +CONFIG_CMD_SF=y | |
| 9 | +CONFIG_CMD_SF_TEST=y | |
| 8 | 10 | # CONFIG_CMD_SETEXPR is not set |
| 9 | 11 | CONFIG_CMD_DHCP=y |
| 10 | 12 | CONFIG_CMD_PING=y |
| 11 | 13 | |
| 12 | 14 | |
| 13 | 15 | |
| ... | ... | @@ -13,18 +15,24 @@ |
| 13 | 15 | CONFIG_CMD_EXT2=y |
| 14 | 16 | CONFIG_CMD_FAT=y |
| 15 | 17 | CONFIG_OF_CONTROL=y |
| 16 | -CONFIG_ENV_IS_IN_FLASH=y | |
| 18 | +CONFIG_ENV_IS_IN_SPI_FLASH=y | |
| 17 | 19 | CONFIG_NET_RANDOM_ETHADDR=y |
| 18 | 20 | CONFIG_DM=y |
| 21 | +CONFIG_CLK=y | |
| 19 | 22 | CONFIG_MMC=y |
| 20 | 23 | CONFIG_MTD=y |
| 21 | 24 | CONFIG_MTD_NOR_FLASH=y |
| 22 | 25 | CONFIG_CFI_FLASH=y |
| 26 | +CONFIG_DM_SPI_FLASH=y | |
| 27 | +CONFIG_SPI_FLASH=y | |
| 28 | +CONFIG_SPI_FLASH_MACRONIX=y | |
| 23 | 29 | CONFIG_DM_ETH=y |
| 24 | 30 | CONFIG_FTMAC100=y |
| 25 | 31 | CONFIG_BAUDRATE=38400 |
| 26 | 32 | CONFIG_DM_SERIAL=y |
| 27 | 33 | CONFIG_SYS_NS16550=y |
| 34 | +CONFIG_DM_SPI=y | |
| 35 | +CONFIG_NDS_AE3XX_SPI=y | |
| 28 | 36 | CONFIG_TIMER=y |
| 29 | 37 | CONFIG_AE3XX_TIMER=y |
include/configs/adp-ae3xx.h
| ... | ... | @@ -220,13 +220,24 @@ |
| 220 | 220 | |
| 221 | 221 | /* max number of sectors on one chip */ |
| 222 | 222 | #define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) |
| 223 | -#define CONFIG_ENV_SECT_SIZE CONFIG_FLASH_SECTOR_SIZE | |
| 224 | 223 | #define CONFIG_SYS_MAX_FLASH_SECT 512 |
| 225 | 224 | |
| 226 | 225 | /* environments */ |
| 227 | -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x140000) | |
| 226 | +#define CONFIG_ENV_SPI_BUS 0 | |
| 227 | +#define CONFIG_ENV_SPI_CS 0 | |
| 228 | +#define CONFIG_ENV_SPI_MAX_HZ 50000000 | |
| 229 | +#define CONFIG_ENV_SPI_MODE 0 | |
| 230 | +#define CONFIG_ENV_SECT_SIZE 0x1000 | |
| 231 | +#define CONFIG_ENV_OFFSET 0x140000 | |
| 228 | 232 | #define CONFIG_ENV_SIZE 8192 |
| 229 | 233 | #define CONFIG_ENV_OVERWRITE |
| 234 | + | |
| 235 | + | |
| 236 | +/* SPI FLASH */ | |
| 237 | +#define CONFIG_SF_DEFAULT_BUS 0 | |
| 238 | +#define CONFIG_SF_DEFAULT_CS 0 | |
| 239 | +#define CONFIG_SF_DEFAULT_SPEED 1000000 | |
| 240 | +#define CONFIG_SF_DEFAULT_MODE 0 | |
| 230 | 241 | |
| 231 | 242 | /* |
| 232 | 243 | * For booting Linux, the board info and command line data |