Eric Lee / smarc-uboot

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Commit 7c52ab30d06825bc2eeaaa84cc45f730697f44e7

Authored by Ye Li
1 parent c2e37c1b2e
Exists in smarc_8mq-imx_v2020.04_5.4.24_2.1.0 and in 3 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, smarc-8m-android-10.0.0_2.6.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0

MLK-18387 pmic: Add Non-DM pmic driver for BD71837 

The iMX8MM EVK board uses BD71837MWV pmic. Add its Non-DM driver to u-boot.

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit e9a3bec2e95a4b2b4641223c8ee4ebd8da76d7f9)

Showing 3 changed files with 88 additions and 95 deletions Side-by-side Diff

drivers/power/pmic/Makefile
Diff comments   View file @ 7c52ab3
... ... @@ -32,6 +32,7 @@
32 32 obj-$(CONFIG_POWER_MAX77696) += pmic_max77696.o
33 33 obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
34 34 obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
  35 +obj-$(CONFIG_POWER_BD71837) += pmic_bd71837.o
35 36 obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
36 37 obj-$(CONFIG_POWER_PCA9450) += pmic_pca9450.o
37 38 obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o
drivers/power/pmic/pmic_bd71837.c
Diff comments   View file @ 7c52ab3
  1 +/*
  2 + * Copyright (C) 2014 Gateworks Corporation
  3 + * Tim Harvey <tharvey@gateworks.com>
  4 + *
  5 + * SPDX-License-Identifier: GPL-2.0+
  6 + */
  7 +
  8 +#include <common.h>
  9 +#include <errno.h>
  10 +#include <i2c.h>
  11 +#include <power/pmic.h>
  12 +#include <power/bd71837.h>
  13 +
  14 +static const char bd71837_name[] = "BD71837";
  15 +int power_bd71837_init (unsigned char bus) {
  16 + struct pmic *p = pmic_alloc();
  17 +
  18 + if (!p) {
  19 + printf("%s: POWER allocation error!\n", __func__);
  20 + return -ENOMEM;
  21 + }
  22 +
  23 + p->name = bd71837_name;
  24 + p->interface = PMIC_I2C;
  25 + p->number_of_regs = BD71837_REG_NUM;
  26 + p->hw.i2c.addr = 0x4b;
  27 + p->hw.i2c.tx_num = 1;
  28 + p->bus = bus;
  29 +
  30 + printf("power_bd71837_init\n");
  31 +
  32 + return 0;
  33 +}
include/power/bd71837.h
Diff comments   View file @ 7c52ab3
1   -/* SPDX-License-Identifier: GPL-2.0-or-later */
2   -/* Copyright (C) 2018 ROHM Semiconductors */
3 1  
4   -#ifndef BD718XX_H_
5   -#define BD718XX_H_
  2 +#ifndef BD71837_H_
  3 +#define BD71837_H_
6 4  
7   -#define BD718XX_REGULATOR_DRIVER "bd718x7_regulator"
  5 +#define BD71837_REGULATOR_DRIVER "bd71837_regulator"
8 6  
9 7 enum {
10   - ROHM_CHIP_TYPE_BD71837 = 0,
11   - ROHM_CHIP_TYPE_BD71847,
12   - ROHM_CHIP_TYPE_BD70528,
13   - ROHM_CHIP_TYPE_AMOUNT
  8 + BD71837_REV = 0x00,
  9 + BD71837_SWRESET = 0x01,
  10 + BD71837_I2C_DEV = 0x02,
  11 + BD71837_PWRCTRL0 = 0x03,
  12 + BD71837_PWRCTRL1 = 0x04,
  13 + BD71837_BUCK1_CTRL = 0x05,
  14 + BD71837_BUCK2_CTRL = 0x06,
  15 + BD71837_BUCK3_CTRL = 0x07,
  16 + BD71837_BUCK4_CTRL = 0x08,
  17 + BD71837_BUCK5_CTRL = 0x09,
  18 + BD71837_BUCK6_CTRL = 0x0A,
  19 + BD71837_BUCK7_CTRL = 0x0B,
  20 + BD71837_BUCK8_CTRL = 0x0C,
  21 + BD71837_BUCK1_VOLT_RUN = 0x0D,
  22 + BD71837_BUCK1_VOLT_IDLE = 0x0E,
  23 + BD71837_BUCK1_VOLT_SUSP = 0x0F,
  24 + BD71837_BUCK2_VOLT_RUN = 0x10,
  25 + BD71837_BUCK2_VOLT_IDLE = 0x11,
  26 + BD71837_BUCK3_VOLT_RUN = 0x12,
  27 + BD71837_BUCK4_VOLT_RUN = 0x13,
  28 + BD71837_BUCK5_VOLT = 0x14,
  29 + BD71837_BUCK6_VOLT = 0x15,
  30 + BD71837_BUCK7_VOLT = 0x16,
  31 + BD71837_BUCK8_VOLT = 0x17,
  32 + BD71837_LDO1_VOLT = 0x18,
  33 + BD71837_LDO2_VOLT = 0x19,
  34 + BD71837_LDO3_VOLT = 0x1A,
  35 + BD71837_LDO4_VOLT = 0x1B,
  36 + BD71837_LDO5_VOLT = 0x1C,
  37 + BD71837_LDO6_VOLT = 0x1D,
  38 + BD71837_LDO7_VOLT = 0x1E,
  39 + BD71837_TRANS_COND0 = 0x1F,
  40 + BD71837_TRANS_COND1 = 0x20,
  41 + BD71837_VRFAULTEN = 0x21,
  42 + BD71837_MVRFLTMASK0 = 0x22,
  43 + BD71837_MVRFLTMASK1 = 0x23,
  44 + BD71837_MVRFLTMASK2 = 0x24,
  45 + BD71837_RCVCFG = 0x25,
  46 + BD71837_RCVNUM = 0x26,
  47 + BD71837_PWRONCONFIG0 = 0x27,
  48 + BD71837_PWRONCONFIG1 = 0x28,
  49 + BD71837_RESETSRC = 0x29,
  50 + BD71837_MIRQ = 0x2A,
  51 + BD71837_IRQ = 0x2B,
  52 + BD71837_IN_MON = 0x2C,
  53 + BD71837_POW_STATE = 0x2D,
  54 + BD71837_OUT32K = 0x2E,
  55 + BD71837_REGLOCK = 0x2F,
  56 + BD71837_MUXSW_EN = 0x30,
  57 + BD71837_REG_NUM,
14 58 };
15 59  
16   -enum {
17   - BD718XX_REV = 0x00,
18   - BD718XX_SWRESET = 0x01,
19   - BD718XX_I2C_DEV = 0x02,
20   - BD718XX_PWRCTRL0 = 0x03,
21   - BD718XX_PWRCTRL1 = 0x04,
22   - BD718XX_BUCK1_CTRL = 0x05,
23   - BD718XX_BUCK2_CTRL = 0x06,
24   - BD71837_BUCK3_CTRL = 0x07,
25   - BD71837_BUCK4_CTRL = 0x08,
26   - BD718XX_1ST_NODVS_BUCK_CTRL = 0x09,
27   - BD718XX_2ND_NODVS_BUCK_CTRL = 0x0a,
28   - BD718XX_3RD_NODVS_BUCK_CTRL = 0x0b,
29   - BD718XX_4TH_NODVS_BUCK_CTRL = 0x0c,
30   - BD718XX_BUCK1_VOLT_RUN = 0x0d,
31   - BD718XX_BUCK1_VOLT_IDLE = 0x0e,
32   - BD718XX_BUCK1_VOLT_SUSP = 0x0f,
33   - BD718XX_BUCK2_VOLT_RUN = 0x10,
34   - BD718XX_BUCK2_VOLT_IDLE = 0x11,
35   - BD71837_BUCK3_VOLT_RUN = 0x12,
36   - BD71837_BUCK4_VOLT_RUN = 0x13,
37   - BD718XX_1ST_NODVS_BUCK_VOLT = 0x14,
38   - BD718XX_2ND_NODVS_BUCK_VOLT = 0x15,
39   - BD718XX_3RD_NODVS_BUCK_VOLT = 0x16,
40   - BD718XX_4TH_NODVS_BUCK_VOLT = 0x17,
41   - BD718XX_LDO1_VOLT = 0x18,
42   - BD718XX_LDO2_VOLT = 0x19,
43   - BD718XX_LDO3_VOLT = 0x1a,
44   - BD718XX_LDO4_VOLT = 0x1b,
45   - BD718XX_LDO5_VOLT = 0x1c,
46   - BD718XX_LDO6_VOLT = 0x1d,
47   - BD71837_LDO7_VOLT = 0x1e,
48   - BD718XX_TRANS_COND0 = 0x1f,
49   - BD718XX_TRANS_COND1 = 0x20,
50   - BD718XX_VRFAULTEN = 0x21,
51   - BD718XX_MVRFLTMASK0 = 0x22,
52   - BD718XX_MVRFLTMASK1 = 0x23,
53   - BD718XX_MVRFLTMASK2 = 0x24,
54   - BD718XX_RCVCFG = 0x25,
55   - BD718XX_RCVNUM = 0x26,
56   - BD718XX_PWRONCONFIG0 = 0x27,
57   - BD718XX_PWRONCONFIG1 = 0x28,
58   - BD718XX_RESETSRC = 0x29,
59   - BD718XX_MIRQ = 0x2a,
60   - BD718XX_IRQ = 0x2b,
61   - BD718XX_IN_MON = 0x2c,
62   - BD718XX_POW_STATE = 0x2d,
63   - BD718XX_OUT32K = 0x2e,
64   - BD718XX_REGLOCK = 0x2f,
65   - BD718XX_MUXSW_EN = 0x30,
66   - BD718XX_REG_OTPVER = 0xff,
67   - BD718XX_MAX_REGISTER = 0x100,
68   -};
69   -
70   -#define BD718XX_REGLOCK_PWRSEQ 0x1
71   -#define BD718XX_REGLOCK_VREG 0x10
72   -
73   -#define BD718XX_BUCK_EN 0x01
74   -#define BD718XX_LDO_EN 0x40
75   -#define BD718XX_BUCK_SEL 0x02
76   -#define BD718XX_LDO_SEL 0x80
77   -
78   -#define DVS_BUCK_RUN_MASK 0x3f
79   -#define BD718XX_1ST_NODVS_BUCK_MASK 0x07
80   -#define BD718XX_3RD_NODVS_BUCK_MASK 0x07
81   -#define BD718XX_4TH_NODVS_BUCK_MASK 0x3f
82   -
83   -#define BD71847_BUCK3_MASK 0x07
84   -#define BD71847_BUCK3_RANGE_MASK 0xc0
85   -#define BD71847_BUCK4_MASK 0x03
86   -#define BD71847_BUCK4_RANGE_MASK 0x40
87   -
88   -#define BD71837_BUCK5_RANGE_MASK 0x80
89   -#define BD71837_BUCK6_MASK 0x03
90   -
91   -#define BD718XX_LDO1_MASK 0x03
92   -#define BD718XX_LDO1_RANGE_MASK 0x20
93   -#define BD718XX_LDO2_MASK 0x20
94   -#define BD718XX_LDO3_MASK 0x0f
95   -#define BD718XX_LDO4_MASK 0x0f
96   -#define BD718XX_LDO6_MASK 0x0f
97   -
98   -#define BD71837_LDO5_MASK 0x0f
99   -#define BD71847_LDO5_MASK 0x0f
100   -#define BD71847_LDO5_RANGE_MASK 0x20
101   -#define BD71837_LDO7_MASK 0x0f
  60 +int power_bd71837_init(unsigned char bus);
102 61  
103 62 #endif