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Commit 7ca6f363251a36622c6561c968bc0989f96457b1

Authored by Bo Shen
Committed by Andreas Bießmann
1 parent 3ed7c4875d
Exists in v2017.01-smarct4x and in 48 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

ARM: atmel: add sama5d3 Xplained board support 

Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC.
Now it supports boot from NAND flash and SD/MMC card.
Features support:
  - NAND flash
  - SD/MMC card
  - Two USB hosts
  - Ethernet (one GMAC, one EMAC)

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[reorder boards.cfg]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Showing 4 changed files with 350 additions and 0 deletions Side-by-side Diff

board/atmel/sama5d3_xplained/Makefile
Diff comments   View file @ 7ca6f36
  1 +#
  2 +# (C) Copyright 2003-2008
  3 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4 +#
  5 +# (C) Copyright 2008
  6 +# Stelian Pop <stelian@popies.net>
  7 +# Lead Tech Design <www.leadtechdesign.com>
  8 +#
  9 +# (C) Copyright 2014
  10 +# Bo Shen <voice.shen@atmel.com>
  11 +#
  12 +# SPDX-License-Identifier: GPL-2.0+
  13 +#
  14 +
  15 +obj-y += sama5d3_xplained.o
board/atmel/sama5d3_xplained/sama5d3_xplained.c
Diff comments   View file @ 7ca6f36
  1 +/*
  2 + * Copyright (C) 2014 Atmel Corporation
  3 + * Bo Shen <voice.shen@atmel.com>
  4 + *
  5 + * SPDX-License-Identifier: GPL-2.0+
  6 + */
  7 +
  8 +#include <common.h>
  9 +#include <mmc.h>
  10 +#include <asm/io.h>
  11 +#include <asm/arch/sama5d3_smc.h>
  12 +#include <asm/arch/at91_common.h>
  13 +#include <asm/arch/at91_pmc.h>
  14 +#include <asm/arch/at91_rstc.h>
  15 +#include <asm/arch/gpio.h>
  16 +#include <asm/arch/clk.h>
  17 +#include <atmel_mci.h>
  18 +#include <net.h>
  19 +#include <netdev.h>
  20 +
  21 +DECLARE_GLOBAL_DATA_PTR;
  22 +
  23 +#ifdef CONFIG_NAND_ATMEL
  24 +void sama5d3_xplained_nand_hw_init(void)
  25 +{
  26 + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  27 +
  28 + at91_periph_clk_enable(ATMEL_ID_SMC);
  29 +
  30 + /* Configure SMC CS3 for NAND/SmartMedia */
  31 + writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(1) |
  32 + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(1),
  33 + &smc->cs[3].setup);
  34 + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) |
  35 + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(5),
  36 + &smc->cs[3].pulse);
  37 + writel(AT91_SMC_CYCLE_NWE(8) | AT91_SMC_CYCLE_NRD(8),
  38 + &smc->cs[3].cycle);
  39 + writel(AT91_SMC_TIMINGS_TCLR(3) | AT91_SMC_TIMINGS_TADL(10) |
  40 + AT91_SMC_TIMINGS_TAR(3) | AT91_SMC_TIMINGS_TRR(4) |
  41 + AT91_SMC_TIMINGS_TWB(5) | AT91_SMC_TIMINGS_RBNSEL(3)|
  42 + AT91_SMC_TIMINGS_NFSEL(1), &smc->cs[3].timings);
  43 + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  44 + AT91_SMC_MODE_EXNW_DISABLE |
  45 +#ifdef CONFIG_SYS_NAND_DBW_16
  46 + AT91_SMC_MODE_DBW_16 |
  47 +#else /* CONFIG_SYS_NAND_DBW_8 */
  48 + AT91_SMC_MODE_DBW_8 |
  49 +#endif
  50 + AT91_SMC_MODE_TDF_CYCLE(3),
  51 + &smc->cs[3].mode);
  52 +}
  53 +#endif
  54 +
  55 +#ifdef CONFIG_CMD_USB
  56 +static void sama5d3_xplained_usb_hw_init(void)
  57 +{
  58 + at91_set_pio_output(AT91_PIO_PORTE, 3, 0);
  59 + at91_set_pio_output(AT91_PIO_PORTE, 4, 0);
  60 +}
  61 +#endif
  62 +
  63 +#ifdef CONFIG_GENERIC_ATMEL_MCI
  64 +static void sama5d3_xplained_mci0_hw_init(void)
  65 +{
  66 + at91_mci_hw_init();
  67 +
  68 + at91_set_pio_output(AT91_PIO_PORTE, 2, 0); /* MCI0 Power */
  69 +}
  70 +#endif
  71 +
  72 +int board_early_init_f(void)
  73 +{
  74 + at91_periph_clk_enable(ATMEL_ID_PIOA);
  75 + at91_periph_clk_enable(ATMEL_ID_PIOB);
  76 + at91_periph_clk_enable(ATMEL_ID_PIOC);
  77 + at91_periph_clk_enable(ATMEL_ID_PIOD);
  78 + at91_periph_clk_enable(ATMEL_ID_PIOE);
  79 +
  80 + at91_seriald_hw_init();
  81 +
  82 + return 0;
  83 +}
  84 +
  85 +int board_init(void)
  86 +{
  87 + /* adress of boot parameters */
  88 + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  89 +
  90 +#ifdef CONFIG_NAND_ATMEL
  91 + sama5d3_xplained_nand_hw_init();
  92 +#endif
  93 +#ifdef CONFIG_CMD_USB
  94 + sama5d3_xplained_usb_hw_init();
  95 +#endif
  96 +#ifdef CONFIG_GENERIC_ATMEL_MCI
  97 + sama5d3_xplained_mci0_hw_init();
  98 +#endif
  99 +#ifdef CONFIG_MACB
  100 + at91_gmac_hw_init();
  101 + at91_macb_hw_init();
  102 +#endif
  103 + return 0;
  104 +}
  105 +
  106 +int dram_init(void)
  107 +{
  108 + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
  109 + CONFIG_SYS_SDRAM_SIZE);
  110 +
  111 + return 0;
  112 +}
  113 +
  114 +int board_eth_init(bd_t *bis)
  115 +{
  116 +#ifdef CONFIG_MACB
  117 + macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
  118 + macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
  119 +#endif
  120 + return 0;
  121 +}
  122 +
  123 +#ifdef CONFIG_GENERIC_ATMEL_MCI
  124 +int board_mmc_init(bd_t *bis)
  125 +{
  126 + atmel_mci_init((void *)ATMEL_BASE_MCI0);
  127 +
  128 + return 0;
  129 +}
  130 +#endif
... ... @@ -278,6 +278,8 @@
278 278 Active arm armv7 am33xx ti am43xx am43xx_evm am43xx_evm:SERIAL1,CONS_INDEX=1 Lokesh Vutla <lokeshvutla@ti.com>
279 279 Active arm armv7 am33xx ti ti814x ti814x_evm - Matt Porter <matt.porter@linaro.org>
280 280 Active arm armv7 am33xx ti ti816x ti816x_evm - -
  281 +Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_mmc sama5d3_xplained:SAMA5D3,SYS_USE_MMC Bo Shen <voice.shen@atmel.com>
  282 +Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_nandflash sama5d3_xplained:SAMA5D3,SYS_USE_NANDFLASH Bo Shen <voice.shen@atmel.com>
281 283 Active arm armv7 at91 atmel sama5d3xek sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC Bo Shen <voice.shen@atmel.com>
282 284 Active arm armv7 at91 atmel sama5d3xek sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH Bo Shen <voice.shen@atmel.com>
283 285 Active arm armv7 at91 atmel sama5d3xek sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH Bo Shen <voice.shen@atmel.com>
include/configs/sama5d3_xplained.h
Diff comments   View file @ 7ca6f36
  1 +/*
  2 + * Configuration settings for the SAMA5D3 Xplained board.
  3 + *
  4 + * Copyright (C) 2014 Atmel Corporation
  5 + * Bo Shen <voice.shen@atmel.com>
  6 + *
  7 + * SPDX-License-Identifier: GPL-2.0+
  8 + */
  9 +
  10 +#ifndef __CONFIG_H
  11 +#define __CONFIG_H
  12 +
  13 +#include <asm/hardware.h>
  14 +
  15 +#define CONFIG_SYS_TEXT_BASE 0x26f00000
  16 +
  17 +/* ARM asynchronous clock */
  18 +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
  19 +#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
  20 +#define CONFIG_SYS_HZ 1000
  21 +
  22 +#define CONFIG_AT91FAMILY
  23 +#define CONFIG_ARCH_CPU_INIT
  24 +#define CONFIG_SKIP_LOWLEVEL_INIT
  25 +#define CONFIG_BOARD_EARLY_INIT_F
  26 +#define CONFIG_DISPLAY_CPUINFO
  27 +
  28 +#define CONFIG_CMD_BOOTZ
  29 +#define CONFIG_OF_LIBFDT /* Device Tree support */
  30 +
  31 +/* general purpose I/O */
  32 +#define CONFIG_AT91_GPIO
  33 +
  34 +/* serial console */
  35 +#define CONFIG_ATMEL_USART
  36 +#define CONFIG_USART_BASE ATMEL_BASE_DBGU
  37 +#define CONFIG_USART_ID ATMEL_ID_DBGU
  38 +
  39 +/*
  40 + * This needs to be defined for the OHCI code to work but it is defined as
  41 + * ATMEL_ID_UHPHS in the CPU specific header files.
  42 + */
  43 +#define ATMEL_ID_UHP ATMEL_ID_UHPHS
  44 +
  45 +/*
  46 + * Specify the clock enable bit in the PMC_SCER register.
  47 + */
  48 +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
  49 +
  50 +#define CONFIG_BOOTDELAY 3
  51 +
  52 +/*
  53 + * BOOTP options
  54 + */
  55 +#define CONFIG_BOOTP_BOOTFILESIZE
  56 +#define CONFIG_BOOTP_BOOTPATH
  57 +#define CONFIG_BOOTP_GATEWAY
  58 +#define CONFIG_BOOTP_HOSTNAME
  59 +
  60 +/* No NOR flash */
  61 +#define CONFIG_SYS_NO_FLASH
  62 +
  63 +/*
  64 + * Command line configuration.
  65 + */
  66 +#include <config_cmd_default.h>
  67 +#undef CONFIG_CMD_FPGA
  68 +#undef CONFIG_CMD_IMI
  69 +#undef CONFIG_CMD_LOADS
  70 +#define CONFIG_CMD_PING
  71 +#define CONFIG_CMD_DHCP
  72 +
  73 +/* SDRAM */
  74 +#define CONFIG_NR_DRAM_BANKS 1
  75 +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
  76 +#define CONFIG_SYS_SDRAM_SIZE 0x10000000
  77 +
  78 +#define CONFIG_SYS_INIT_SP_ADDR \
  79 + (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  80 +
  81 +/* NAND flash */
  82 +#define CONFIG_CMD_NAND
  83 +
  84 +#ifdef CONFIG_CMD_NAND
  85 +#define CONFIG_NAND_ATMEL
  86 +#define CONFIG_SYS_MAX_NAND_DEVICE 1
  87 +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
  88 +/* our ALE is AD21 */
  89 +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  90 +/* our CLE is AD22 */
  91 +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  92 +#define CONFIG_SYS_NAND_ONFI_DETECTION
  93 +/* PMECC & PMERRLOC */
  94 +#define CONFIG_ATMEL_NAND_HWECC
  95 +#define CONFIG_ATMEL_NAND_HW_PMECC
  96 +#define CONFIG_PMECC_CAP 4
  97 +#define CONFIG_PMECC_SECTOR_SIZE 512
  98 +#define CONFIG_CMD_NAND_TRIMFFS
  99 +#define CONFIG_CMD_MTDPARTS
  100 +
  101 +#define CONFIG_MTD_DEVICE
  102 +#define CONFIG_MTD_PARTITIONS
  103 +#define CONFIG_RBTREE
  104 +#define CONFIG_LZO
  105 +#define CONFIG_CMD_UBI
  106 +#define CONFIG_CMD_UBIFS
  107 +#endif
  108 +
  109 +/* Ethernet Hardware */
  110 +#define CONFIG_MACB
  111 +#define CONFIG_RMII
  112 +#define CONFIG_NET_MULTI
  113 +#define CONFIG_NET_RETRY_COUNT 20
  114 +#define CONFIG_MACB_SEARCH_PHY
  115 +#define CONFIG_RGMII
  116 +#define CONFIG_CMD_MII
  117 +#define CONFIG_PHYLIB
  118 +
  119 +/* MMC */
  120 +#define CONFIG_CMD_MMC
  121 +
  122 +#ifdef CONFIG_CMD_MMC
  123 +#define CONFIG_MMC
  124 +#define CONFIG_GENERIC_MMC
  125 +#define CONFIG_GENERIC_ATMEL_MCI
  126 +#define CONFIG_ATMEL_MCI_8BIT
  127 +#endif
  128 +
  129 +/* USB */
  130 +#define CONFIG_CMD_USB
  131 +
  132 +#ifdef CONFIG_CMD_USB
  133 +#define CONFIG_USB_ATMEL
  134 +#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
  135 +#define CONFIG_USB_OHCI_NEW
  136 +#define CONFIG_SYS_USB_OHCI_CPU_INIT
  137 +#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
  138 +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained"
  139 +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
  140 +#define CONFIG_DOS_PARTITION
  141 +#define CONFIG_USB_STORAGE
  142 +#endif
  143 +
  144 +#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
  145 +#define CONFIG_CMD_FAT
  146 +#define CONFIG_FAT_WRITE
  147 +#define CONFIG_CMD_EXT4
  148 +#define CONFIG_CMD_EXT4_WRITE
  149 +#endif
  150 +
  151 +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  152 +
  153 +#if CONFIG_SYS_USE_NANDFLASH
  154 +/* bootstrap + u-boot + env in nandflash */
  155 +#define CONFIG_ENV_IS_IN_NAND
  156 +#define CONFIG_ENV_OFFSET 0xc0000
  157 +#define CONFIG_ENV_OFFSET_REDUND 0x100000
  158 +#define CONFIG_ENV_SIZE 0x20000
  159 +#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
  160 + "nand read 0x22000000 0x200000 0x600000;" \
  161 + "bootz 0x22000000 - 0x21000000"
  162 +#elif CONFIG_SYS_USE_MMC
  163 +/* bootstrap + u-boot + env in sd card */
  164 +#define CONFIG_ENV_IS_IN_MMC
  165 +#define CONFIG_ENV_OFFSET 0x2000
  166 +#define CONFIG_ENV_SIZE 0x1000
  167 +#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91-sama5d3_xplained.dtb; " \
  168 + "fatload mmc 0:1 0x22000000 zImage; " \
  169 + "bootz 0x22000000 - 0x21000000"
  170 +#define CONFIG_SYS_MMC_ENV_DEV 0
  171 +#else
  172 +#define CONFIG_ENV_IS_NOWHERE
  173 +#endif
  174 +
  175 +#ifdef CONFIG_SYS_USE_MMC
  176 +#define CONFIG_BOOTARGS \
  177 + "console=ttyS0,115200 earlyprintk " \
  178 + "root=/dev/mmcblk0p2 rw rootwait"
  179 +#else
  180 +#define CONFIG_BOOTARGS \
  181 + "console=ttyS0,115200 earlyprintk " \
  182 + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
  183 + "256K(env),256k(evn_redundent),256k(spare)," \
  184 + "512k(dtb),6M(kernel)ro,-(rootfs) " \
  185 + "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
  186 +#endif
  187 +
  188 +#define CONFIG_BAUDRATE 115200
  189 +
  190 +#define CONFIG_SYS_PROMPT "U-Boot> "
  191 +#define CONFIG_SYS_CBSIZE 256
  192 +#define CONFIG_SYS_MAXARGS 16
  193 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  194 + sizeof(CONFIG_SYS_PROMPT) + 16)
  195 +#define CONFIG_SYS_LONGHELP
  196 +#define CONFIG_CMDLINE_EDITING
  197 +#define CONFIG_AUTO_COMPLETE
  198 +#define CONFIG_SYS_HUSH_PARSER
  199 +
  200 +/* Size of malloc() pool */
  201 +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
  202 +
  203 +#endif