Commit 7cacb64a354a1d996ba55e5e35b95f111f00648d
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b8112091bb
Exists in
v2017.01-smarct4x
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nios2: convert dma_alloc_coherent to use malloc_cache_aligned
Convert dma_alloc_coherent to use memalign. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
Showing 1 changed file with 14 additions and 13 deletions Side-by-side Diff
arch/nios2/include/asm/dma-mapping.h
| 1 | 1 | #ifndef __ASM_NIOS2_DMA_MAPPING_H |
| 2 | 2 | #define __ASM_NIOS2_DMA_MAPPING_H |
| 3 | 3 | |
| 4 | -/* dma_alloc_coherent() return cache-line aligned allocation which is mapped | |
| 4 | +#include <memalign.h> | |
| 5 | +#include <asm/io.h> | |
| 6 | + | |
| 7 | +/* | |
| 8 | + * dma_alloc_coherent() return cache-line aligned allocation which is mapped | |
| 5 | 9 | * to uncached io region. |
| 6 | - * | |
| 7 | - * IO_REGION_BASE should be defined in board config header file | |
| 8 | - * 0x80000000 for nommu, 0xe0000000 for mmu | |
| 9 | 10 | */ |
| 10 | - | |
| 11 | 11 | static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) |
| 12 | 12 | { |
| 13 | - void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE); | |
| 13 | + unsigned long addr = (unsigned long)malloc_cache_aligned(len); | |
| 14 | + | |
| 14 | 15 | if (!addr) |
| 15 | - return 0; | |
| 16 | - flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE); | |
| 17 | - *handle = ((unsigned long)addr + | |
| 18 | - (CONFIG_SYS_DCACHELINE_SIZE - 1)) & | |
| 19 | - ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE); | |
| 20 | - return (void *)(*handle | IO_REGION_BASE); | |
| 21 | -} | |
| 16 | + return NULL; | |
| 22 | 17 | |
| 18 | + invalidate_dcache_range(addr, addr + len); | |
| 19 | + if (handle) | |
| 20 | + *handle = addr; | |
| 21 | + | |
| 22 | + return ioremap(addr, len); | |
| 23 | +} | |
| 23 | 24 | #endif /* __ASM_NIOS2_DMA_MAPPING_H */ |