Commit 7dd6545da75d9194b4e59a183012c1117e6241cc
Committed by
Tom Rini
1 parent
bcfc71186e
Exists in
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mx6q: Add basic support for mx6qsabreauto
mx6qsabreauto is a board based on mx6q SoC with the following features: - 2GB of DDR3 - 2 USB ports - 1 HDMI output port - SPI NOR - 2 LVDS LCD ports - Gigabit Ethernet - Camera - eMMC and SD card slot - Multichannel Audio - CAN - SATA - NAND - PCIE - Video Input Add very basic support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Showing 6 changed files with 339 additions and 0 deletions Side-by-side Diff
MAINTAINERS
board/freescale/mx6qsabreauto/Makefile
1 | +# | |
2 | +# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> | |
3 | +# | |
4 | +# (C) Copyright 2011 Freescale Semiconductor, Inc. | |
5 | +# | |
6 | +# This program is free software; you can redistribute it and/or | |
7 | +# modify it under the terms of the GNU General Public License as | |
8 | +# published by the Free Software Foundation; either version 2 of | |
9 | +# the License, or (at your option) any later version. | |
10 | +# | |
11 | +# This program is distributed in the hope that it will be useful, | |
12 | +# but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | +# GNU General Public License for more details. | |
15 | +# | |
16 | +# You should have received a copy of the GNU General Public License | |
17 | +# along with this program; if not, write to the Free Software | |
18 | +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
19 | +# MA 02111-1307 USA | |
20 | +# | |
21 | + | |
22 | +include $(TOPDIR)/config.mk | |
23 | + | |
24 | +LIB = $(obj)lib$(BOARD).o | |
25 | + | |
26 | +COBJS := mx6qsabreauto.o | |
27 | + | |
28 | +SRCS := $(COBJS:.o=.c) | |
29 | +OBJS := $(addprefix $(obj),$(COBJS)) | |
30 | + | |
31 | +$(LIB): $(obj).depend $(OBJS) | |
32 | + $(call cmd_link_o_target, $(OBJS)) | |
33 | + | |
34 | +######################################################################### | |
35 | + | |
36 | +# defines $(obj).depend target | |
37 | +include $(SRCTREE)/rules.mk | |
38 | + | |
39 | +sinclude $(obj).depend | |
40 | + | |
41 | +######################################################################### |
board/freescale/mx6qsabreauto/imximage.cfg
1 | +# Copyright (C) 2012 Freescale Semiconductor, Inc. | |
2 | +# | |
3 | +# See file CREDITS for list of people who contributed to this | |
4 | +# project. | |
5 | +# | |
6 | +# This program is free software; you can redistribute it and/or | |
7 | +# modify it under the terms of the GNU General Public License as | |
8 | +# published by the Free Software Foundation; either version 2 of | |
9 | +# the License or (at your option) any later version. | |
10 | +# | |
11 | +# This program is distributed in the hope that it will be useful, | |
12 | +# but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | +# GNU General Public License for more details. | |
15 | +# | |
16 | +# You should have received a copy of the GNU General Public License | |
17 | +# along with this program; if not write to the Free Software | |
18 | +# Foundation Inc. 51 Franklin Street Fifth Floor Boston, | |
19 | +# MA 02110-1301 USA | |
20 | +# | |
21 | +# Refer docs/README.imxmage for more details about how-to configure | |
22 | +# and create imximage boot image | |
23 | +# | |
24 | +# The syntax is taken as close as possible with the kwbimage | |
25 | + | |
26 | +# image version | |
27 | + | |
28 | +IMAGE_VERSION 2 | |
29 | + | |
30 | +# Boot Device : one of | |
31 | +# spi, sd (the board has no nand neither onenand) | |
32 | + | |
33 | +BOOT_FROM sd | |
34 | + | |
35 | +# Device Configuration Data (DCD) | |
36 | +# | |
37 | +# Each entry must have the format: | |
38 | +# Addr-type Address Value | |
39 | +# | |
40 | +# where: | |
41 | +# Addr-type register length (1,2 or 4 bytes) | |
42 | +# Address absolute address of the register | |
43 | +# value value to be stored in the register | |
44 | +DATA 4 0x020e05a8 0x00000028 | |
45 | +DATA 4 0x020e05b0 0x00000028 | |
46 | +DATA 4 0x020e0524 0x00000028 | |
47 | +DATA 4 0x020e051c 0x00000028 | |
48 | + | |
49 | +DATA 4 0x020e0518 0x00000028 | |
50 | +DATA 4 0x020e050c 0x00000028 | |
51 | +DATA 4 0x020e05b8 0x00000028 | |
52 | +DATA 4 0x020e05c0 0x00000028 | |
53 | + | |
54 | +DATA 4 0x020e05ac 0x00000028 | |
55 | +DATA 4 0x020e05b4 0x00000028 | |
56 | +DATA 4 0x020e0528 0x00000028 | |
57 | +DATA 4 0x020e0520 0x00000028 | |
58 | + | |
59 | +DATA 4 0x020e0514 0x00000028 | |
60 | +DATA 4 0x020e0510 0x00000028 | |
61 | +DATA 4 0x020e05bc 0x00000028 | |
62 | +DATA 4 0x020e05c4 0x00000028 | |
63 | + | |
64 | +DATA 4 0x020e056c 0x00000030 | |
65 | +DATA 4 0x020e0578 0x00000030 | |
66 | +DATA 4 0x020e0588 0x00000030 | |
67 | +DATA 4 0x020e0594 0x00000030 | |
68 | + | |
69 | +DATA 4 0x020e057c 0x00000030 | |
70 | +DATA 4 0x020e0590 0x00000030 | |
71 | +DATA 4 0x020e0598 0x00000030 | |
72 | +DATA 4 0x020e058c 0x00000000 | |
73 | + | |
74 | +DATA 4 0x020e059c 0x00003030 | |
75 | +DATA 4 0x020e05a0 0x00003030 | |
76 | +DATA 4 0x020e0784 0x00000028 | |
77 | +DATA 4 0x020e0788 0x00000028 | |
78 | + | |
79 | +DATA 4 0x020e0794 0x00000028 | |
80 | +DATA 4 0x020e079c 0x00000028 | |
81 | +DATA 4 0x020e07a0 0x00000028 | |
82 | +DATA 4 0x020e07a4 0x00000028 | |
83 | + | |
84 | +DATA 4 0x020e07a8 0x00000028 | |
85 | +DATA 4 0x020e0748 0x00000028 | |
86 | +DATA 4 0x020e074c 0x00000030 | |
87 | +DATA 4 0x020e0750 0x00020000 | |
88 | + | |
89 | +DATA 4 0x020e0758 0x00000000 | |
90 | +DATA 4 0x020e0774 0x00020000 | |
91 | +DATA 4 0x020e078c 0x00000030 | |
92 | +DATA 4 0x020e0798 0x000C0000 | |
93 | + | |
94 | +DATA 4 0x021b081c 0x33333333 | |
95 | +DATA 4 0x021b0820 0x33333333 | |
96 | +DATA 4 0x021b0824 0x33333333 | |
97 | +DATA 4 0x021b0828 0x33333333 | |
98 | + | |
99 | +DATA 4 0x021b481c 0x33333333 | |
100 | +DATA 4 0x021b4820 0x33333333 | |
101 | +DATA 4 0x021b4824 0x33333333 | |
102 | +DATA 4 0x021b4828 0x33333333 | |
103 | + | |
104 | +DATA 4 0x021b0018 0x00001740 | |
105 | + | |
106 | +DATA 4 0x021b001c 0x00008000 | |
107 | +DATA 4 0x021b000c 0x8A8F7975 | |
108 | +DATA 4 0x021b0010 0xFF538E64 | |
109 | +DATA 4 0x021b0014 0x01FF00DB | |
110 | +DATA 4 0x021b002c 0x000026D2 | |
111 | + | |
112 | +DATA 4 0x021b0030 0x008F0E21 | |
113 | +DATA 4 0x021b0008 0x09444040 | |
114 | +DATA 4 0x021b0004 0x00020036 | |
115 | +DATA 4 0x021b0040 0x00000047 | |
116 | +DATA 4 0x021b0000 0x841A0000 | |
117 | + | |
118 | +DATA 4 0x021b001c 0x04088032 | |
119 | +DATA 4 0x021b001c 0x00008033 | |
120 | +DATA 4 0x021b001c 0x00428031 | |
121 | +DATA 4 0x021b001c 0x09408030 | |
122 | + | |
123 | +DATA 4 0x021b001c 0x04008040 | |
124 | +DATA 4 0x021b0800 0xA1380003 | |
125 | +DATA 4 0x021b0020 0x00005800 | |
126 | +DATA 4 0x021b0818 0x00000007 | |
127 | +DATA 4 0x021b4818 0x00000007 | |
128 | + | |
129 | +# Calibration values based on ARD and 528MHz | |
130 | +DATA 4 0x021b083c 0x434B0358 | |
131 | +DATA 4 0x021b0840 0x033D033C | |
132 | +DATA 4 0x021b483c 0x03520362 | |
133 | +DATA 4 0x021b4840 0x03480318 | |
134 | +DATA 4 0x021b0848 0x41383A3C | |
135 | +DATA 4 0x021b4848 0x3F3C374A | |
136 | +DATA 4 0x021b0850 0x42434444 | |
137 | +DATA 4 0x021b4850 0x4932473A | |
138 | + | |
139 | +DATA 4 0x021b080c 0x001F001F | |
140 | +DATA 4 0x021b0810 0x001F001F | |
141 | + | |
142 | +DATA 4 0x021b480c 0x001F001F | |
143 | +DATA 4 0x021b4810 0x001F001F | |
144 | + | |
145 | +DATA 4 0x021b08b8 0x00000800 | |
146 | +DATA 4 0x021b48b8 0x00000800 | |
147 | + | |
148 | +DATA 4 0x021b0404 0x00011006 | |
149 | +DATA 4 0x021b0004 0x00025576 | |
150 | + | |
151 | +DATA 4 0x021b001c 0x00000000 | |
152 | + | |
153 | +DATA 4 0x020c4068 0x00C03F3F | |
154 | +DATA 4 0x020c406c 0x0030FC00 | |
155 | +DATA 4 0x020c4070 0x0FFFC000 | |
156 | +DATA 4 0x020c4074 0x3FF00000 | |
157 | +DATA 4 0x020c4078 0x00FFF300 | |
158 | +DATA 4 0x020c407c 0x0F0000C3 | |
159 | +DATA 4 0x020c4080 0x000003FF |
board/freescale/mx6qsabreauto/mx6qsabreauto.c
1 | +/* | |
2 | + * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
3 | + * | |
4 | + * Author: Fabio Estevam <fabio.estevam@freescale.com> | |
5 | + * | |
6 | + * See file CREDITS for list of people who contributed to this | |
7 | + * project. | |
8 | + * | |
9 | + * This program is free software; you can redistribute it and/or | |
10 | + * modify it under the terms of the GNU General Public License as | |
11 | + * published by the Free Software Foundation; either version 2 of | |
12 | + * the License, or (at your option) any later version. | |
13 | + * | |
14 | + * This program is distributed in the hope that it will be useful, | |
15 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | + * GNU General Public License for more details. | |
18 | + */ | |
19 | + | |
20 | +#include <common.h> | |
21 | +#include <asm/io.h> | |
22 | +#include <asm/arch/clock.h> | |
23 | +#include <asm/arch/imx-regs.h> | |
24 | +#include <asm/arch/iomux.h> | |
25 | +#include <asm/arch/mx6x_pins.h> | |
26 | +#include <asm/errno.h> | |
27 | +#include <asm/gpio.h> | |
28 | +#include <asm/imx-common/iomux-v3.h> | |
29 | +#include <mmc.h> | |
30 | +#include <fsl_esdhc.h> | |
31 | +DECLARE_GLOBAL_DATA_PTR; | |
32 | + | |
33 | +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ | |
34 | + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ | |
35 | + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) | |
36 | + | |
37 | +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ | |
38 | + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ | |
39 | + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) | |
40 | + | |
41 | +int dram_init(void) | |
42 | +{ | |
43 | + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); | |
44 | + | |
45 | + return 0; | |
46 | +} | |
47 | + | |
48 | +iomux_v3_cfg_t uart4_pads[] = { | |
49 | + MX6Q_PAD_KEY_COL0__UART4_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), | |
50 | + MX6Q_PAD_KEY_ROW0__UART4_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), | |
51 | +}; | |
52 | + | |
53 | +iomux_v3_cfg_t usdhc3_pads[] = { | |
54 | + MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
55 | + MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
56 | + MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
57 | + MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
58 | + MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
59 | + MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
60 | + MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
61 | + MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
62 | + MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
63 | + MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
64 | + MX6Q_PAD_GPIO_18__USDHC3_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL), | |
65 | + MX6Q_PAD_NANDF_CS2__GPIO_6_15 | MUX_PAD_CTRL(NO_PAD_CTRL), | |
66 | +}; | |
67 | + | |
68 | +static void setup_iomux_uart(void) | |
69 | +{ | |
70 | + imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); | |
71 | +} | |
72 | + | |
73 | +#ifdef CONFIG_FSL_ESDHC | |
74 | +struct fsl_esdhc_cfg usdhc_cfg[1] = { | |
75 | + {USDHC3_BASE_ADDR}, | |
76 | +}; | |
77 | + | |
78 | +int board_mmc_getcd(struct mmc *mmc) | |
79 | +{ | |
80 | + gpio_direction_input(IMX_GPIO_NR(6, 15)); | |
81 | + return !gpio_get_value(IMX_GPIO_NR(6, 15)); | |
82 | +} | |
83 | + | |
84 | +int board_mmc_init(bd_t *bis) | |
85 | +{ | |
86 | + imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); | |
87 | + | |
88 | + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); | |
89 | +} | |
90 | +#endif | |
91 | + | |
92 | +u32 get_board_rev(void) | |
93 | +{ | |
94 | + return 0x63000; | |
95 | +} | |
96 | + | |
97 | +int board_early_init_f(void) | |
98 | +{ | |
99 | + setup_iomux_uart(); | |
100 | + | |
101 | + return 0; | |
102 | +} | |
103 | + | |
104 | +int board_init(void) | |
105 | +{ | |
106 | + /* address of boot parameters */ | |
107 | + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; | |
108 | + | |
109 | + return 0; | |
110 | +} | |
111 | + | |
112 | +int checkboard(void) | |
113 | +{ | |
114 | + puts("Board: MX6Q-Sabreauto\n"); | |
115 | + | |
116 | + return 0; | |
117 | +} |
boards.cfg
... | ... | @@ -237,6 +237,7 @@ |
237 | 237 | ima3-mx53 arm armv7 ima3-mx53 esg mx5 ima3-mx53:IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg |
238 | 238 | vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg |
239 | 239 | mx6qarm2 arm armv7 mx6qarm2 freescale mx6 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg |
240 | +mx6qsabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg | |
240 | 241 | mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg |
241 | 242 | mx6qsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg |
242 | 243 | cm_t35 arm armv7 cm_t35 - omap3 |
include/configs/mx6qsabreauto.h
1 | +/* | |
2 | + * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
3 | + * | |
4 | + * Configuration settings for the Freescale i.MX6Q SabreSD board. | |
5 | + * | |
6 | + * This program is free software; you can redistribute it and/or | |
7 | + * modify it under the terms of the GNU General Public License as | |
8 | + * published by the Free Software Foundation; either version 2 of | |
9 | + * the License, or (at your option) any later version. | |
10 | + */ | |
11 | + | |
12 | +#ifndef __MX6QSABREAUTO_CONFIG_H | |
13 | +#define __MX6QSABREAUTO_CONFIG_H | |
14 | +#include "mx6qsabre_common.h" | |
15 | + | |
16 | +#define CONFIG_MACH_TYPE 3529 | |
17 | +#define CONFIG_MXC_UART_BASE UART4_BASE | |
18 | +#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) | |
19 | + | |
20 | +#endif /* __MX6QSABREAUTO_CONFIG_H */ |