Commit 7ebafb7ec1a0285af8380623c009576f92583b98

Authored by Jean-Christophe PLAGNIOL-VILLARD
1 parent 1332a2a069
Exists in master and in 57 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf-6.6.52-2.2.0, emb_lf_v2022.04, emb_lf_v2023.04, emb_lf_v2024.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

at91sam9/at91cap: move common spi initialisation to cpu

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Showing 13 changed files with 381 additions and 95 deletions Side-by-side Diff

board/afeb9260/afeb9260.c
... ... @@ -78,19 +78,6 @@
78 78 at91_set_gpio_output(AT91_PIN_PC14, 1);
79 79 }
80 80  
81   -static void afeb9260_spi_hw_init(void)
82   -{
83   - at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
84   - at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */
85   -
86   - at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
87   - at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
88   - at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
89   -
90   - /* Enable clock */
91   - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
92   -}
93   -
94 81 #ifdef CONFIG_MACB
95 82 static void afeb9260_macb_hw_init(void)
96 83 {
... ... @@ -179,7 +166,7 @@
179 166 #ifdef CONFIG_CMD_NAND
180 167 afeb9260_nand_hw_init();
181 168 #endif
182   - afeb9260_spi_hw_init();
  169 + at91_spi0_hw_init((1 << 0) || (1 << 1));
183 170 #ifdef CONFIG_MACB
184 171 afeb9260_macb_hw_init();
185 172 #endif
board/atmel/at91cap9adk/at91cap9adk.c
... ... @@ -137,20 +137,6 @@
137 137 }
138 138 #endif
139 139  
140   -#ifdef CONFIG_HAS_DATAFLASH
141   -static void at91cap9_spi_hw_init(void)
142   -{
143   - at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */
144   -
145   - at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
146   - at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
147   - at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
148   -
149   - /* Enable clock */
150   - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
151   -}
152   -#endif
153   -
154 140 #ifdef CONFIG_MACB
155 141 static void at91cap9_macb_hw_init(void)
156 142 {
... ... @@ -348,7 +334,7 @@
348 334 at91cap9_nand_hw_init();
349 335 #endif
350 336 #ifdef CONFIG_HAS_DATAFLASH
351   - at91cap9_spi_hw_init();
  337 + at91_spi0_hw_init(1 << 0);
352 338 #endif
353 339 #ifdef CONFIG_MACB
354 340 at91cap9_macb_hw_init();
board/atmel/at91sam9260ek/at91sam9260ek.c
... ... @@ -83,21 +83,6 @@
83 83 }
84 84 #endif
85 85  
86   -#ifdef CONFIG_HAS_DATAFLASH
87   -static void at91sam9260ek_spi_hw_init(void)
88   -{
89   - at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
90   - at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */
91   -
92   - at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
93   - at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
94   - at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
95   -
96   - /* Enable clock */
97   - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
98   -}
99   -#endif
100   -
101 86 #ifdef CONFIG_MACB
102 87 static void at91sam9260ek_macb_hw_init(void)
103 88 {
... ... @@ -196,7 +181,7 @@
196 181 at91sam9260ek_nand_hw_init();
197 182 #endif
198 183 #ifdef CONFIG_HAS_DATAFLASH
199   - at91sam9260ek_spi_hw_init();
  184 + at91_spi0_hw_init((1 << 0) || (1 << 1));
200 185 #endif
201 186 #ifdef CONFIG_MACB
202 187 at91sam9260ek_macb_hw_init();
board/atmel/at91sam9261ek/at91sam9261ek.c
... ... @@ -86,20 +86,6 @@
86 86 }
87 87 #endif
88 88  
89   -#ifdef CONFIG_HAS_DATAFLASH
90   -static void at91sam9261ek_spi_hw_init(void)
91   -{
92   - at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
93   -
94   - at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
95   - at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
96   - at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
97   -
98   - /* Enable clock */
99   - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
100   -}
101   -#endif
102   -
103 89 #ifdef CONFIG_DRIVER_DM9000
104 90 static void at91sam9261ek_dm9000_hw_init(void)
105 91 {
... ... @@ -229,7 +215,7 @@
229 215 at91sam9261ek_nand_hw_init();
230 216 #endif
231 217 #ifdef CONFIG_HAS_DATAFLASH
232   - at91sam9261ek_spi_hw_init();
  218 + at91_spi0_hw_init(1 << 0);
233 219 #endif
234 220 #ifdef CONFIG_DRIVER_DM9000
235 221 at91sam9261ek_dm9000_hw_init();
board/atmel/at91sam9263ek/at91sam9263ek.c
... ... @@ -87,20 +87,6 @@
87 87 }
88 88 #endif
89 89  
90   -#ifdef CONFIG_HAS_DATAFLASH
91   -static void at91sam9263ek_spi_hw_init(void)
92   -{
93   - at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */
94   -
95   - at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
96   - at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
97   - at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
98   -
99   - /* Enable clock */
100   - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);
101   -}
102   -#endif
103   -
104 90 #ifdef CONFIG_MACB
105 91 static void at91sam9263ek_macb_hw_init(void)
106 92 {
... ... @@ -280,7 +266,8 @@
280 266 at91sam9263ek_nand_hw_init();
281 267 #endif
282 268 #ifdef CONFIG_HAS_DATAFLASH
283   - at91sam9263ek_spi_hw_init();
  269 + at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
  270 + at91_spi0_hw_init(1 << 0);
284 271 #endif
285 272 #ifdef CONFIG_MACB
286 273 at91sam9263ek_macb_hw_init();
board/atmel/at91sam9rlek/at91sam9rlek.c
... ... @@ -86,20 +86,6 @@
86 86 }
87 87 #endif
88 88  
89   -#ifdef CONFIG_HAS_DATAFLASH
90   -static void at91sam9rlek_spi_hw_init(void)
91   -{
92   - at91_set_A_periph(AT91_PIN_PA28, 0); /* SPI0_NPCS0 */
93   -
94   - at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */
95   - at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */
96   - at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */
97   -
98   - /* Enable clock */
99   - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
100   -}
101   -#endif
102   -
103 89 #ifdef CONFIG_LCD
104 90 vidinfo_t panel_info = {
105 91 vl_col: 240,
... ... @@ -202,7 +188,7 @@
202 188 at91sam9rlek_nand_hw_init();
203 189 #endif
204 190 #ifdef CONFIG_HAS_DATAFLASH
205   - at91sam9rlek_spi_hw_init();
  191 + at91_spi0_hw_init(1 << 0);
206 192 #endif
207 193 #ifdef CONFIG_LCD
208 194 at91sam9rlek_lcd_hw_init();
cpu/arm926ejs/at91/Makefile
... ... @@ -25,11 +25,26 @@
25 25  
26 26 LIB = $(obj)lib$(SOC).a
27 27  
28   -COBJS-$(CONFIG_AT91CAP9) += at91cap9_serial.o
29   -COBJS-$(CONFIG_AT91SAM9260) += at91sam9260_serial.o
30   -COBJS-$(CONFIG_AT91SAM9261) += at91sam9261_serial.o
31   -COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_serial.o
32   -COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_serial.o
  28 +ifdef CONFIG_AT91CAP9
  29 +COBJS-y += at91cap9_serial.o
  30 +COBJS-$(CONFIG_HAS_DATAFLASH) += at91cap9_spi.o
  31 +endif
  32 +ifdef CONFIG_AT91SAM9260
  33 +COBJS-y += at91sam9260_serial.o
  34 +COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9260_spi.o
  35 +endif
  36 +ifdef CONFIG_AT91SAM9261
  37 +COBJS-y += at91sam9261_serial.o
  38 +COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9261_spi.o
  39 +endif
  40 +ifdef CONFIG_AT91SAM9263
  41 +COBJS-y += at91sam9263_serial.o
  42 +COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9263_spi.o
  43 +endif
  44 +ifdef CONFIG_AT91SAM9RL
  45 +COBJS-y += at91sam9rl_serial.o
  46 +COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9rl_spi.o
  47 +endif
33 48 COBJS-$(CONFIG_HAS_DATAFLASH) += spi.o
34 49 COBJS-y += timer.o
35 50 COBJS-y += usb.o
cpu/arm926ejs/at91/at91cap9_spi.c
  1 +/*
  2 + * (C) Copyright 2007-2008
  3 + * Stelian Pop <stelian.pop@leadtechdesign.com>
  4 + * Lead Tech Design <www.leadtechdesign.com>
  5 + *
  6 + * See file CREDITS for list of people who contributed to this
  7 + * project.
  8 + *
  9 + * This program is free software; you can redistribute it and/or
  10 + * modify it under the terms of the GNU General Public License as
  11 + * published by the Free Software Foundation; either version 2 of
  12 + * the License, or (at your option) any later version.
  13 + *
  14 + * This program is distributed in the hope that it will be useful,
  15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17 + * GNU General Public License for more details.
  18 + *
  19 + * You should have received a copy of the GNU General Public License
  20 + * along with this program; if not, write to the Free Software
  21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22 + * MA 02111-1307 USA
  23 + */
  24 +
  25 +#include <common.h>
  26 +#include <asm/arch/at91_common.h>
  27 +#include <asm/arch/at91_pmc.h>
  28 +#include <asm/arch/gpio.h>
  29 +#include <asm/arch/io.h>
  30 +
  31 +void at91_spi0_hw_init(unsigned long cs_mask)
  32 +{
  33 + at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
  34 + at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
  35 + at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
  36 +
  37 + /* Enable clock */
  38 + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
  39 +
  40 + if (cs_mask & (1 << 0)) {
  41 + at91_set_gpio_output(AT91_PIN_PA5, 1);
  42 + }
  43 + if (cs_mask & (1 << 1)) {
  44 + at91_set_gpio_output(AT91_PIN_PA3, 1);
  45 + }
  46 + if (cs_mask & (1 << 2)) {
  47 + at91_set_gpio_output(AT91_PIN_PD0, 1);
  48 + }
  49 + if (cs_mask & (1 << 3)) {
  50 + at91_set_gpio_output(AT91_PIN_PD1, 1);
  51 + }
  52 +}
  53 +
  54 +void at91_spi1_hw_init(unsigned long cs_mask)
  55 +{
  56 + at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
  57 + at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
  58 + at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
  59 +
  60 + /* Enable clock */
  61 + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1);
  62 +
  63 + if (cs_mask & (1 << 0)) {
  64 + at91_set_gpio_output(AT91_PIN_PB15, 1);
  65 + }
  66 + if (cs_mask & (1 << 1)) {
  67 + at91_set_gpio_output(AT91_PIN_PB16, 1);
  68 + }
  69 + if (cs_mask & (1 << 2)) {
  70 + at91_set_gpio_output(AT91_PIN_PB17, 1);
  71 + }
  72 + if (cs_mask & (1 << 3)) {
  73 + at91_set_gpio_output(AT91_PIN_PB18, 1);
  74 + }
  75 +}
cpu/arm926ejs/at91/at91sam9260_spi.c
  1 +/*
  2 + * (C) Copyright 2007-2008
  3 + * Stelian Pop <stelian.pop@leadtechdesign.com>
  4 + * Lead Tech Design <www.leadtechdesign.com>
  5 + *
  6 + * See file CREDITS for list of people who contributed to this
  7 + * project.
  8 + *
  9 + * This program is free software; you can redistribute it and/or
  10 + * modify it under the terms of the GNU General Public License as
  11 + * published by the Free Software Foundation; either version 2 of
  12 + * the License, or (at your option) any later version.
  13 + *
  14 + * This program is distributed in the hope that it will be useful,
  15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17 + * GNU General Public License for more details.
  18 + *
  19 + * You should have received a copy of the GNU General Public License
  20 + * along with this program; if not, write to the Free Software
  21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22 + * MA 02111-1307 USA
  23 + */
  24 +
  25 +#include <common.h>
  26 +#include <asm/arch/at91_common.h>
  27 +#include <asm/arch/at91_pmc.h>
  28 +#include <asm/arch/gpio.h>
  29 +#include <asm/arch/io.h>
  30 +
  31 +void at91_spi0_hw_init(unsigned long cs_mask)
  32 +{
  33 + at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
  34 + at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
  35 + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
  36 +
  37 + /* Enable clock */
  38 + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
  39 +
  40 + if (cs_mask & (1 << 0)) {
  41 + at91_set_gpio_output(AT91_PIN_PA3, 1);
  42 + }
  43 + if (cs_mask & (1 << 1)) {
  44 + at91_set_gpio_output(AT91_PIN_PC11, 1);
  45 + }
  46 + if (cs_mask & (1 << 2)) {
  47 + at91_set_gpio_output(AT91_PIN_PC16, 1);
  48 + }
  49 + if (cs_mask & (1 << 3)) {
  50 + at91_set_gpio_output(AT91_PIN_PC17, 1);
  51 + }
  52 +}
  53 +
  54 +void at91_spi1_hw_init(unsigned long cs_mask)
  55 +{
  56 + at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
  57 + at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
  58 + at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
  59 +
  60 + /* Enable clock */
  61 + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1);
  62 +
  63 + if (cs_mask & (1 << 0)) {
  64 + at91_set_gpio_output(AT91_PIN_PB3, 1);
  65 + }
  66 + if (cs_mask & (1 << 1)) {
  67 + at91_set_gpio_output(AT91_PIN_PC5, 1);
  68 + }
  69 + if (cs_mask & (1 << 2)) {
  70 + at91_set_gpio_output(AT91_PIN_PC4, 1);
  71 + }
  72 + if (cs_mask & (1 << 3)) {
  73 + at91_set_gpio_output(AT91_PIN_PC3, 1);
  74 + }
  75 +}
cpu/arm926ejs/at91/at91sam9261_spi.c
  1 +/*
  2 + * (C) Copyright 2007-2008
  3 + * Stelian Pop <stelian.pop@leadtechdesign.com>
  4 + * Lead Tech Design <www.leadtechdesign.com>
  5 + *
  6 + * See file CREDITS for list of people who contributed to this
  7 + * project.
  8 + *
  9 + * This program is free software; you can redistribute it and/or
  10 + * modify it under the terms of the GNU General Public License as
  11 + * published by the Free Software Foundation; either version 2 of
  12 + * the License, or (at your option) any later version.
  13 + *
  14 + * This program is distributed in the hope that it will be useful,
  15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17 + * GNU General Public License for more details.
  18 + *
  19 + * You should have received a copy of the GNU General Public License
  20 + * along with this program; if not, write to the Free Software
  21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22 + * MA 02111-1307 USA
  23 + */
  24 +
  25 +#include <common.h>
  26 +#include <asm/arch/at91_common.h>
  27 +#include <asm/arch/at91_pmc.h>
  28 +#include <asm/arch/gpio.h>
  29 +#include <asm/arch/io.h>
  30 +
  31 +void at91_spi0_hw_init(unsigned long cs_mask)
  32 +{
  33 + at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
  34 + at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
  35 + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
  36 +
  37 + /* Enable clock */
  38 + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
  39 +
  40 + if (cs_mask & (1 << 0)) {
  41 + at91_set_gpio_output(AT91_PIN_PA3, 1);
  42 + }
  43 + if (cs_mask & (1 << 1)) {
  44 + at91_set_gpio_output(AT91_PIN_PA4, 1);
  45 + }
  46 + if (cs_mask & (1 << 2)) {
  47 + at91_set_gpio_output(AT91_PIN_PA5, 1);
  48 + }
  49 + if (cs_mask & (1 << 3)) {
  50 + at91_set_gpio_output(AT91_PIN_PA6, 1);
  51 + }
  52 +}
  53 +
  54 +void at91_spi1_hw_init(unsigned long cs_mask)
  55 +{
  56 + at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
  57 + at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
  58 + at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
  59 +
  60 + /* Enable clock */
  61 + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1);
  62 +
  63 + if (cs_mask & (1 << 0)) {
  64 + at91_set_gpio_output(AT91_PIN_PB28, 1);
  65 + }
  66 + if (cs_mask & (1 << 1)) {
  67 + at91_set_gpio_output(AT91_PIN_PA24, 1);
  68 + }
  69 + if (cs_mask & (1 << 2)) {
  70 + at91_set_gpio_output(AT91_PIN_PA25, 1);
  71 + }
  72 + if (cs_mask & (1 << 3)) {
  73 + at91_set_gpio_output(AT91_PIN_PA26, 1);
  74 + }
  75 +}
cpu/arm926ejs/at91/at91sam9263_spi.c
  1 +/*
  2 + * (C) Copyright 2007-2008
  3 + * Stelian Pop <stelian.pop@leadtechdesign.com>
  4 + * Lead Tech Design <www.leadtechdesign.com>
  5 + *
  6 + * See file CREDITS for list of people who contributed to this
  7 + * project.
  8 + *
  9 + * This program is free software; you can redistribute it and/or
  10 + * modify it under the terms of the GNU General Public License as
  11 + * published by the Free Software Foundation; either version 2 of
  12 + * the License, or (at your option) any later version.
  13 + *
  14 + * This program is distributed in the hope that it will be useful,
  15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17 + * GNU General Public License for more details.
  18 + *
  19 + * You should have received a copy of the GNU General Public License
  20 + * along with this program; if not, write to the Free Software
  21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22 + * MA 02111-1307 USA
  23 + */
  24 +
  25 +#include <common.h>
  26 +#include <asm/arch/at91_common.h>
  27 +#include <asm/arch/at91_pmc.h>
  28 +#include <asm/arch/gpio.h>
  29 +#include <asm/arch/io.h>
  30 +
  31 +void at91_spi0_hw_init(unsigned long cs_mask)
  32 +{
  33 + at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
  34 + at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
  35 + at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
  36 +
  37 + /* Enable clock */
  38 + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);
  39 +
  40 + if (cs_mask & (1 << 0)) {
  41 + at91_set_gpio_output(AT91_PIN_PA5, 1);
  42 + }
  43 + if (cs_mask & (1 << 1)) {
  44 + at91_set_gpio_output(AT91_PIN_PA3, 1);
  45 + }
  46 + if (cs_mask & (1 << 2)) {
  47 + at91_set_gpio_output(AT91_PIN_PA4, 1);
  48 + }
  49 + if (cs_mask & (1 << 3)) {
  50 + at91_set_gpio_output(AT91_PIN_PB11, 1);
  51 + }
  52 +}
  53 +
  54 +void at91_spi1_hw_init(unsigned long cs_mask)
  55 +{
  56 + at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
  57 + at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
  58 + at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
  59 +
  60 + /* Enable clock */
  61 + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1);
  62 +
  63 + if (cs_mask & (1 << 0)) {
  64 + at91_set_gpio_output(AT91_PIN_PB15, 1);
  65 + }
  66 + if (cs_mask & (1 << 1)) {
  67 + at91_set_gpio_output(AT91_PIN_PB16, 1);
  68 + }
  69 + if (cs_mask & (1 << 2)) {
  70 + at91_set_gpio_output(AT91_PIN_PB17, 1);
  71 + }
  72 + if (cs_mask & (1 << 3)) {
  73 + at91_set_gpio_output(AT91_PIN_PB18, 1);
  74 + }
  75 +}
cpu/arm926ejs/at91/at91sam9rl_spi.c
  1 +/*
  2 + * (C) Copyright 2007-2008
  3 + * Stelian Pop <stelian.pop@leadtechdesign.com>
  4 + * Lead Tech Design <www.leadtechdesign.com>
  5 + *
  6 + * See file CREDITS for list of people who contributed to this
  7 + * project.
  8 + *
  9 + * This program is free software; you can redistribute it and/or
  10 + * modify it under the terms of the GNU General Public License as
  11 + * published by the Free Software Foundation; either version 2 of
  12 + * the License, or (at your option) any later version.
  13 + *
  14 + * This program is distributed in the hope that it will be useful,
  15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17 + * GNU General Public License for more details.
  18 + *
  19 + * You should have received a copy of the GNU General Public License
  20 + * along with this program; if not, write to the Free Software
  21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22 + * MA 02111-1307 USA
  23 + */
  24 +
  25 +#include <common.h>
  26 +#include <asm/arch/at91_common.h>
  27 +#include <asm/arch/at91_pmc.h>
  28 +#include <asm/arch/gpio.h>
  29 +#include <asm/arch/io.h>
  30 +
  31 +void at91_spi0_hw_init(unsigned long cs_mask)
  32 +{
  33 + at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */
  34 + at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */
  35 + at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */
  36 +
  37 + /* Enable clock */
  38 + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
  39 +
  40 + if (cs_mask & (1 << 0)) {
  41 + at91_set_gpio_output(AT91_PIN_PA28, 1);
  42 + }
  43 + if (cs_mask & (1 << 1)) {
  44 + at91_set_gpio_output(AT91_PIN_PB7, 1);
  45 + }
  46 + if (cs_mask & (1 << 2)) {
  47 + at91_set_gpio_output(AT91_PIN_PD8, 1);
  48 + }
  49 + if (cs_mask & (1 << 3)) {
  50 + at91_set_gpio_output(AT91_PIN_PD9, 1);
  51 + }
  52 +}
include/asm-arm/arch-at91/at91_common.h
... ... @@ -30,6 +30,8 @@
30 30 void at91_serial1_hw_init(void);
31 31 void at91_serial2_hw_init(void);
32 32 void at91_serial3_hw_init(void);
  33 +void at91_spi0_hw_init(unsigned long cs_mask);
  34 +void at91_spi1_hw_init(unsigned long cs_mask);
33 35  
34 36 #endif /* AT91_COMMON_H */