Commit 8029de8d0d55a54c02e30c43464da04eecb1bb40

Authored by Jacky Bai
Committed by Ye Li
1 parent fcf243f430

MLK-21950-02 board: imx8mn_evk: update the ddr performance setting

Update the ddr performance setting on i.MX8MN DDR4 EVK board.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 745f7a4e916d84bc61f2b131cffd50f53c6c1394)

Showing 1 changed file with 12 additions and 15 deletions Side-by-side Diff

board/freescale/imx8mn_evk/ddr4_timing.c
... ... @@ -116,22 +116,19 @@
116 116 {0x3d4031b4,0x00000404},
117 117 {0x3d4031b8,0x00000004},
118 118 {0x3d403240,0x07000600},
119   - {0x3d400400,0x00000100},
120   - {0x3d400250,0x317d1a07},
121   - {0x3d400254,0x0000000f},
122   - {0x3d40025c,0x2a001b76},
123   - {0x3d400264,0x7300b473},
124   - {0x3d40026c,0x30000e06},
125   - {0x3d400300,0x00000014},
126   - {0x3d40036c,0x00000010},
127   - {0x3d400404,0x00013193},
128   - {0x3d400408,0x00006096},
129   - {0x3d400490,0x00000001},
130   - {0x3d400494,0x02000c00},
131   - {0x3d400498,0x003c00db},
132   - {0x3d40049c,0x00100009},
133   - {0x3d4004a0,0x00000002},
134 119  
  120 + /* performance setting */
  121 + { 0x3d400250, 0x00001701 },
  122 + { 0x3d400254, 0x2c },
  123 + { 0x3d40025c, 0x4000030 },
  124 + { 0x3d400264, 0x900003ff },
  125 + { 0x3d40026c, 0x200003ff },
  126 + { 0x3d400400, 0x111 },
  127 + { 0x3d400408, 0x72ff },
  128 + { 0x3d400494, 0x2100e07 },
  129 + { 0x3d400498, 0x620096 },
  130 + { 0x3d40049c, 0x1100e07 },
  131 + { 0x3d4004a0, 0xc8012c },
135 132 };
136 133  
137 134 /* PHY Initialize Configuration */