arm: exynos: Add methods to control power to USB 3.0 PHY

Adding methods to turn on/off power to USB3.0 type PHY as and when required by the controller. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>

arm: exynos: Add methods to control power to USB 3.0 PHY
Adding methods to turn on/off power to USB3.0 type PHY as and when required by the controller. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
Vivek Gautam · Marek Vasut
1 parent 13194f3b5f
Showing 2 changed files with 27 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/armv7/exynos/power.c
arch/arm/include/asm/arch-exynos/power.h
@@ -59,6 +59,28 @@
 		exynos5_set_usbhost_phy_ctrl(enable);
 }
  
+static void exynos5_set_usbdrd_phy_ctrl(unsigned int enable)
+{
+	struct exynos5_power *power =
+		(struct exynos5_power *)samsung_get_base_power();
+
+	if (enable) {
+		/* Enabling USBDRD_PHY */
+		setbits_le32(&power->usbdrd_phy_control,
+				POWER_USB_DRD_PHY_CTRL_EN);
+	} else {
+		/* Disabling USBDRD_PHY */
+		clrbits_le32(&power->usbdrd_phy_control,
+				POWER_USB_DRD_PHY_CTRL_EN);
+	}
+}
+
+void set_usbdrd_phy_ctrl(unsigned int enable)
+{
+	if (cpu_is_exynos5())
+		exynos5_set_usbdrd_phy_ctrl(enable);
+}
+
 static void exynos5_dp_phy_control(unsigned int enable)
 {
 	unsigned int cfg;
@@ -847,6 +847,11 @@
 #define POWER_USB_HOST_PHY_CTRL_EN		(1 << 0)
 #define POWER_USB_HOST_PHY_CTRL_DISABLE		(0 << 0)
  
+void set_usbdrd_phy_ctrl(unsigned int enable);
+
+#define POWER_USB_DRD_PHY_CTRL_EN		(1 << 0)
+#define POWER_USB_DRD_PHY_CTRL_DISABLE		(0 << 0)
+
 void set_dp_phy_ctrl(unsigned int enable);
  
 #define EXYNOS_DP_PHY_ENABLE		(1 << 0)
...	...	@@ -59,6 +59,28 @@
59	59	exynos5_set_usbhost_phy_ctrl(enable);
60	60	}
61	61
	62	+static void exynos5_set_usbdrd_phy_ctrl(unsigned int enable)
	63	+{
	64	+ struct exynos5_power *power =
	65	+ (struct exynos5_power *)samsung_get_base_power();
	66	+
	67	+ if (enable) {
	68	+ /* Enabling USBDRD_PHY */
	69	+ setbits_le32(&power->usbdrd_phy_control,
	70	+ POWER_USB_DRD_PHY_CTRL_EN);
	71	+ } else {
	72	+ /* Disabling USBDRD_PHY */
	73	+ clrbits_le32(&power->usbdrd_phy_control,
	74	+ POWER_USB_DRD_PHY_CTRL_EN);
	75	+ }
	76	+}
	77	+
	78	+void set_usbdrd_phy_ctrl(unsigned int enable)
	79	+{
	80	+ if (cpu_is_exynos5())
	81	+ exynos5_set_usbdrd_phy_ctrl(enable);
	82	+}
	83	+
62	84	static void exynos5_dp_phy_control(unsigned int enable)
63	85	{
64	86	unsigned int cfg;
...	...	@@ -847,6 +847,11 @@
847	847	#define POWER_USB_HOST_PHY_CTRL_EN (1 << 0)
848	848	#define POWER_USB_HOST_PHY_CTRL_DISABLE (0 << 0)
849	849
	850	+void set_usbdrd_phy_ctrl(unsigned int enable);
	851	+
	852	+#define POWER_USB_DRD_PHY_CTRL_EN (1 << 0)
	853	+#define POWER_USB_DRD_PHY_CTRL_DISABLE (0 << 0)
	854	+
850	855	void set_dp_phy_ctrl(unsigned int enable);
851	856
852	857	#define EXYNOS_DP_PHY_ENABLE (1 << 0)