Coding style cleanup

Signed-off-by: Stefan Roese <sr@denx.de>

Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese
1 parent 4a442d3186
Showing 6 changed files with 53 additions and 55 deletions Side-by-side Diff
CREDITS
cpu/mcf523x/cpu_init.c
cpu/mcf523x/speed.c
cpu/mcf52x2/cpu_init.c
doc/README.m5253evbe
lib_m68k/m68k_linux.c
@@ -147,6 +147,11 @@
 E: daniel@omicron.se
 D: x86 port, Support for sc520_cdp board
  
+N: Hayden Fraser
+E: Hayden.Fraser@freescale.com
+D: Support for ColdFire MCF5253
+W: www.freescale.com
+
 N: Dr. Wolfgang Grandegger
 E: wg@denx.de
 D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
@@ -283,6 +288,11 @@
 D: Support for LEOX boards, DS164x RTC
 W: http://www.leox.org
  
+N: TsiChung Liew
+E: Tsi-Chung.Liew@freescale.com
+D: Support for ColdFire MCF523x, MCF532x, MCF5445x
+W: www.freescale.com
+
 N: Leif Lindholm
 E: leif.lindholm@i3micro.com
 D: Support for AMD dbau1550 board.
@@ -297,6 +307,11 @@
 E: lo@routefree.com
 D: Support for DOS partitions
  
+N: James MacAulay
+E: james.macaulay@amirix.com
+D: Suppport for Amirix AP1000
+W: www.amirix.com
+
 N: Dan Malek
 E: dan@embeddedalley.com
 D: FADSROM, the grandfather of all of this
@@ -372,8 +387,9 @@
 W: http://www.windriver.com
  
 N: Stefan Roese
-E: stefan.roese@esd-electronics.com
-D: AMCC PPC401/403/405GP Support; Windows environment support
+E: sr@denx.de
+D: AMCC PPC4xx Support
+W: http://www.denx.de
  
 N: Erwin Rol
 E: erwin@muffin.org
@@ -407,6 +423,11 @@
 E: art@videon-central.com
 D: Support for NetSilicon NS7520
  
+N: Michal Simek
+E: monstr@monstr.eu
+D: Support for Microblaze, ML401, XUPV2P board
+W: www.monstr.eu
+
 N: Yasushi Shoji
 E: yashi@atmark-techno.com
 D: Support for Xilinx MicroBlaze, for Atmark Techno SUZAKU FPGA board
@@ -420,6 +441,11 @@
 D: Port to B2 board
 W: www.dave-tech.it
  
+N: Timur Tabi
+E: timur@freescale.com
+D: Support for MPC8349E-mITX
+W: www.freescale.com
+
 N: Rob Taylor
 E: robt@flyingpig.com
 D: Port to MBX860T and Sandpoint8240
@@ -473,29 +499,4 @@
 E: azu@sysgo.de
 D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
 W: www.elinos.com
-
-N: James MacAulay
-E: james.macaulay@amirix.com
-D: Suppport for Amirix AP1000
-W: www.amirix.com
-
-N: Timur Tabi
-E: timur@freescale.com
-D: Support for MPC8349E-mITX
-W: www.freescale.com
-
-N: Michal Simek
-E: monstr@monstr.eu
-D: Support for Microblaze, ML401, XUPV2P board
-W: www.monstr.eu
-
-N: TsiChung Liew
-E: Tsi-Chung.Liew@freescale.com
-D: Support for ColdFire MCF523x, MCF532x, MCF5445x
-W: www.freescale.com
-
-N: Hayden Fraser
-E: Hayden.Fraser@freescale.com
-D: Support for ColdFire MCF5253
-W: www.freescale.com
@@ -127,20 +127,20 @@
  
 void uart_port_conf(void)
 {
-        volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
  
-        /* Setup Ports: */
-        switch (CFG_UART_PORT) {
-        case 0:
-                gpio->par_uart = (GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD);
-                break;
-        case 1:
-                gpio->par_uart =
-                    (GPIO_PAR_UART_U1RXD_U1RXD | GPIO_PAR_UART_U1TXD_U1TXD);
-                break;
-        case 2:
-                gpio->par_timer = (GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD);
-                break;
-        }
+	/* Setup Ports: */
+	switch (CFG_UART_PORT) {
+	case 0:
+		gpio->par_uart = (GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD);
+		break;
+	case 1:
+		gpio->par_uart =
+			(GPIO_PAR_UART_U1RXD_U1RXD | GPIO_PAR_UART_U1TXD_U1TXD);
+		break;
+	case 2:
+		gpio->par_timer = (GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD);
+		break;
+	}
 }
@@ -41,9 +41,10 @@
 	pll->syncr = PLL_SYNCR_MFD(1);
  
 	while (!(pll->synsr & PLL_SYNSR_LOCK));
-	
+
 	gd->bus_clk = CFG_CLK;
 	gd->cpu_clk = (gd->bus_clk * 2);
+
 	return (0);
 }
@@ -63,7 +63,7 @@
 	mbar2_writeByte(MCFSIM_INTBASE, 0x40);	/* Base interrupts at 64 */
 	mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
  
-	/*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */
+	/*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */
  
 	/*
 	 *  Setup chip selects...
@@ -18,14 +18,14 @@
 	SDR:	0x00000000-0x00ffffff
 	SRAM0:	0x20010000-0x20017fff
 	SRAM1:	0x20000000-0x2000ffff
-	MBAR1:	0x10000000-0x4fffffff 
+	MBAR1:	0x10000000-0x4fffffff
 	MBAR2:	0x80000000-0xCfffffff
-	Flash:	0xffe00000-0xffffffff 
+	Flash:	0xffe00000-0xffffffff
  
 3. DEFINITIONS AND COMPILATION
 ==============================
 3.1 Explanation on NEW definitions in include/configs/M5253EVBE.h
-	CONFIG_MCF52x2		Processor family 
+	CONFIG_MCF52x2		Processor family
 	CONFIG_MCF5253		MCF5253 specific
 	CONFIG_M5253EVBE	Amadeus Plus board specific
 	CFG_CLK			Define Amadeus Plus CPU Clock
@@ -92,8 +92,9 @@
 	 */
 	asm("movel %%a7, %%d0\n"
 	    "movel %%d0, %0\n": "=d"(sp): :"%d0");
-	
debug("## Current stack ends at 0x%08lX ", sp);
  
+	debug("## Current stack ends at 0x%08lX ", sp);
+
 	sp -= 2048;		/* just to be sure */
 	if (sp > CFG_BOOTMAPSZ)
 		sp = CFG_BOOTMAPSZ;
@@ -269,7 +270,8 @@
 				 */
 				asm("movel %%a7, %%d0\n"
 				    "movel %%d0, %0\n": "=d"(nsp): :"%d0");
-				
				nsp -= 2048;	/* just to be sure */
+
+				nsp -= 2048;	/* just to be sure */
 				nsp &= ~0xF;
  
 				if (nsp > initrd_high)	/* limit as specified */
...	...	@@ -147,6 +147,11 @@
147	147	E: daniel@omicron.se
148	148	D: x86 port, Support for sc520_cdp board
149	149
	150	+N: Hayden Fraser
	151	+E: Hayden.Fraser@freescale.com
	152	+D: Support for ColdFire MCF5253
	153	+W: www.freescale.com
	154	+
150	155	N: Dr. Wolfgang Grandegger
151	156	E: wg@denx.de
152	157	D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
...	...	@@ -283,6 +288,11 @@
283	288	D: Support for LEOX boards, DS164x RTC
284	289	W: http://www.leox.org
285	290
	291	+N: TsiChung Liew
	292	+E: Tsi-Chung.Liew@freescale.com
	293	+D: Support for ColdFire MCF523x, MCF532x, MCF5445x
	294	+W: www.freescale.com
	295	+
286	296	N: Leif Lindholm
287	297	E: leif.lindholm@i3micro.com
288	298	D: Support for AMD dbau1550 board.
...	...	@@ -297,6 +307,11 @@
297	307	E: lo@routefree.com
298	308	D: Support for DOS partitions
299	309
	310	+N: James MacAulay
	311	+E: james.macaulay@amirix.com
	312	+D: Suppport for Amirix AP1000
	313	+W: www.amirix.com
	314	+
300	315	N: Dan Malek
301	316	E: dan@embeddedalley.com
302	317	D: FADSROM, the grandfather of all of this
...	...	@@ -372,8 +387,9 @@
372	387	W: http://www.windriver.com
373	388
374	389	N: Stefan Roese
375		-E: stefan.roese@esd-electronics.com
376		-D: AMCC PPC401/403/405GP Support; Windows environment support
	390	+E: sr@denx.de
	391	+D: AMCC PPC4xx Support
	392	+W: http://www.denx.de
377	393
378	394	N: Erwin Rol
379	395	E: erwin@muffin.org
...	...	@@ -407,6 +423,11 @@
407	423	E: art@videon-central.com
408	424	D: Support for NetSilicon NS7520
409	425
	426	+N: Michal Simek
	427	+E: monstr@monstr.eu
	428	+D: Support for Microblaze, ML401, XUPV2P board
	429	+W: www.monstr.eu
	430	+
410	431	N: Yasushi Shoji
411	432	E: yashi@atmark-techno.com
412	433	D: Support for Xilinx MicroBlaze, for Atmark Techno SUZAKU FPGA board
...	...	@@ -420,6 +441,11 @@
420	441	D: Port to B2 board
421	442	W: www.dave-tech.it
422	443
	444	+N: Timur Tabi
	445	+E: timur@freescale.com
	446	+D: Support for MPC8349E-mITX
	447	+W: www.freescale.com
	448	+
423	449	N: Rob Taylor
424	450	E: robt@flyingpig.com
425	451	D: Port to MBX860T and Sandpoint8240
...	...	@@ -473,29 +499,4 @@
473	499	E: azu@sysgo.de
474	500	D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
475	501	W: www.elinos.com
476		-
477		-N: James MacAulay
478		-E: james.macaulay@amirix.com
479		-D: Suppport for Amirix AP1000
480		-W: www.amirix.com
481		-
482		-N: Timur Tabi
483		-E: timur@freescale.com
484		-D: Support for MPC8349E-mITX
485		-W: www.freescale.com
486		-
487		-N: Michal Simek
488		-E: monstr@monstr.eu
489		-D: Support for Microblaze, ML401, XUPV2P board
490		-W: www.monstr.eu
491		-
492		-N: TsiChung Liew
493		-E: Tsi-Chung.Liew@freescale.com
494		-D: Support for ColdFire MCF523x, MCF532x, MCF5445x
495		-W: www.freescale.com
496		-
497		-N: Hayden Fraser
498		-E: Hayden.Fraser@freescale.com
499		-D: Support for ColdFire MCF5253
500		-W: www.freescale.com
...	...	@@ -127,20 +127,20 @@
127	127
128	128	void uart_port_conf(void)
129	129	{
130		- volatile gpio_t gpio = (gpio_t ) MMAP_GPIO;
	130	+ volatile gpio_t gpio = (gpio_t ) MMAP_GPIO;
131	131
132		- /* Setup Ports: */
133		- switch (CFG_UART_PORT) {
134		- case 0:
135		- gpio->par_uart = (GPIO_PAR_UART_U0RXD \| GPIO_PAR_UART_U0TXD);
136		- break;
137		- case 1:
138		- gpio->par_uart =
139		- (GPIO_PAR_UART_U1RXD_U1RXD \| GPIO_PAR_UART_U1TXD_U1TXD);
140		- break;
141		- case 2:
142		- gpio->par_timer = (GPIO_PAR_UART_U2RXD \| GPIO_PAR_UART_U2TXD);
143		- break;
144		- }
	132	+ /* Setup Ports: */
	133	+ switch (CFG_UART_PORT) {
	134	+ case 0:
	135	+ gpio->par_uart = (GPIO_PAR_UART_U0RXD \| GPIO_PAR_UART_U0TXD);
	136	+ break;
	137	+ case 1:
	138	+ gpio->par_uart =
	139	+ (GPIO_PAR_UART_U1RXD_U1RXD \| GPIO_PAR_UART_U1TXD_U1TXD);
	140	+ break;
	141	+ case 2:
	142	+ gpio->par_timer = (GPIO_PAR_UART_U2RXD \| GPIO_PAR_UART_U2TXD);
	143	+ break;
	144	+ }
145	145	}
...	...	@@ -41,9 +41,10 @@
41	41	pll->syncr = PLL_SYNCR_MFD(1);
42	42
43	43	while (!(pll->synsr & PLL_SYNSR_LOCK));
44		-
	44	+
45	45	gd->bus_clk = CFG_CLK;
46	46	gd->cpu_clk = (gd->bus_clk * 2);
	47	+
47	48	return (0);
48	49	}
...	...	@@ -63,7 +63,7 @@
63	63	mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */
64	64	mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
65	65
66		- /mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); //* Enable a 1 cycle pre-drive cycle on CS1 */
	66	+ /mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); / /* Enable a 1 cycle pre-drive cycle on CS1 */
67	67
68	68	/*
69	69	* Setup chip selects...
...	...	@@ -18,14 +18,14 @@
18	18	SDR: 0x00000000-0x00ffffff
19	19	SRAM0: 0x20010000-0x20017fff
20	20	SRAM1: 0x20000000-0x2000ffff
21		- MBAR1: 0x10000000-0x4fffffff
	21	+ MBAR1: 0x10000000-0x4fffffff
22	22	MBAR2: 0x80000000-0xCfffffff
23		- Flash: 0xffe00000-0xffffffff
	23	+ Flash: 0xffe00000-0xffffffff
24	24
25	25	3. DEFINITIONS AND COMPILATION
26	26	==============================
27	27	3.1 Explanation on NEW definitions in include/configs/M5253EVBE.h
28		- CONFIG_MCF52x2 Processor family
	28	+ CONFIG_MCF52x2 Processor family
29	29	CONFIG_MCF5253 MCF5253 specific
30	30	CONFIG_M5253EVBE Amadeus Plus board specific
31	31	CFG_CLK Define Amadeus Plus CPU Clock
...	...	@@ -92,8 +92,9 @@
92	92	*/
93	93	asm("movel %%a7, %%d0\n"
94	94	"movel %%d0, %0\n": "=d"(sp): :"%d0");
95		- debug("## Current stack ends at 0x%08lX ", sp);
96	95
	96	+ debug("## Current stack ends at 0x%08lX ", sp);
	97	+
97	98	sp -= 2048; /* just to be sure */
98	99	if (sp > CFG_BOOTMAPSZ)
99	100	sp = CFG_BOOTMAPSZ;
...	...	@@ -269,7 +270,8 @@
269	270	*/
270	271	asm("movel %%a7, %%d0\n"
271	272	"movel %%d0, %0\n": "=d"(nsp): :"%d0");
272		- nsp -= 2048; /* just to be sure */
	273	+
	274	+ nsp -= 2048; /* just to be sure */
273	275	nsp &= ~0xF;
274	276
275	277	if (nsp > initrd_high) /* limit as specified */