Eric Lee / smarc-uboot

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Commit 8415bb68c8c2e0430f58fc349352a565bddf286e

Authored by Alison Wang
Committed by York Sun
1 parent 86949c2b7c
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

arm: ls102xa: Add SD boot support for LS1021ATWR board 

This patch adds SD boot support for LS1021ATWR board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Chen Lu <chen.lu@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

Showing 6 changed files with 95 additions and 0 deletions Side-by-side Diff

board/freescale/ls1021atwr/MAINTAINERS
Diff comments   View file @ 8415bb6
... ... @@ -5,4 +5,5 @@
5 5 F: include/configs/ls1021atwr.h
6 6 F: configs/ls1021atwr_nor_defconfig
7 7 F: configs/ls1021atwr_nor_SECURE_BOOT_defconfig
  8 +F: configs/ls1021atwr_sdcard_defconfig
board/freescale/ls1021atwr/ls1021atwr.c
Diff comments   View file @ 8415bb6
... ... @@ -18,6 +18,7 @@
18 18 #include <fsl_mdio.h>
19 19 #include <tsec.h>
20 20 #include <fsl_sec.h>
  21 +#include <spl.h>
21 22 #ifdef CONFIG_U_QE
22 23 #include "../../../drivers/qe/qe.h"
23 24 #endif
... ... @@ -270,6 +271,25 @@
270 271  
271 272 return 0;
272 273 }
  274 +
  275 +#ifdef CONFIG_SPL_BUILD
  276 +void board_init_f(ulong dummy)
  277 +{
  278 + /* Set global data pointer */
  279 + gd = &gdata;
  280 +
  281 + /* Clear the BSS */
  282 + memset(__bss_start, 0, __bss_end - __bss_start);
  283 +
  284 + get_clocks();
  285 +
  286 + preloader_console_init();
  287 +
  288 + dram_init();
  289 +
  290 + board_init_r(NULL, 0);
  291 +}
  292 +#endif
273 293  
274 294 int board_init(void)
275 295 {
board/freescale/ls1021atwr/ls102xa_pbi.cfg
Diff comments   View file @ 8415bb6
  1 +#PBI commands
  2 +
  3 +09570200 ffffffff
  4 +09570158 00000300
  5 +8940007c 21f47300
  6 +
  7 +#Configure Scratch register
  8 +09ee0200 10000000
  9 +#Configure alternate space
  10 +09570158 00001000
  11 +#Flush PBL data
  12 +096100c0 000FFFFF
board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg
Diff comments   View file @ 8415bb6
  1 +#PBL preamble and RCW header
  2 +aa55aa55 01ee0100
  3 +
  4 +#enable IFC, disable QSPI and DSPI
  5 +0608000a 00000000 00000000 00000000
  6 +20000000 00407900 60040a00 21046000
  7 +00000000 00000000 00000000 00038000
  8 +00080000 881b7340 00000000 00000000
  9 +
  10 +#disable IFC, enable QSPI and DSPI
  11 +#0608000a 00000000 00000000 00000000
  12 +#20000000 00407900 60040a00 21046000
  13 +#00000000 00000000 00000000 00038000
  14 +#20084800 881b7340 00000000 00000000
configs/ls1021atwr_sdcard_defconfig
Diff comments   View file @ 8415bb6
  1 +CONFIG_SPL=y
  2 +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
  3 ++S:CONFIG_ARM=y
  4 ++S:CONFIG_TARGET_LS1021ATWR=y
include/configs/ls1021atwr.h
Diff comments   View file @ 8415bb6
... ... @@ -35,6 +35,38 @@
35 35 #define CONFIG_SYS_CLK_FREQ 100000000
36 36 #define CONFIG_DDR_CLK_FREQ 100000000
37 37  
  38 +#ifdef CONFIG_RAMBOOT_PBL
  39 +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1021atwr/ls102xa_pbi.cfg
  40 +#endif
  41 +
  42 +#ifdef CONFIG_SD_BOOT
  43 +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg
  44 +#define CONFIG_SPL_FRAMEWORK
  45 +#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
  46 +#define CONFIG_SPL_LIBCOMMON_SUPPORT
  47 +#define CONFIG_SPL_LIBGENERIC_SUPPORT
  48 +#define CONFIG_SPL_ENV_SUPPORT
  49 +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
  50 +#define CONFIG_SPL_I2C_SUPPORT
  51 +#define CONFIG_SPL_WATCHDOG_SUPPORT
  52 +#define CONFIG_SPL_SERIAL_SUPPORT
  53 +#define CONFIG_SPL_MMC_SUPPORT
  54 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8
  55 +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
  56 +
  57 +#define CONFIG_SPL_TEXT_BASE 0x10000000
  58 +#define CONFIG_SPL_MAX_SIZE 0x1a000
  59 +#define CONFIG_SPL_STACK 0x1001d000
  60 +#define CONFIG_SPL_PAD_TO 0x1c000
  61 +#define CONFIG_SYS_TEXT_BASE 0x82000000
  62 +
  63 +#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
  64 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
  65 +#define CONFIG_SPL_BSS_START_ADDR 0x80100000
  66 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  67 +#define CONFIG_SYS_MONITOR_LEN 0x80000
  68 +#endif
  69 +
38 70 #ifndef CONFIG_SYS_TEXT_BASE
39 71 #define CONFIG_SYS_TEXT_BASE 0x67f80000
40 72 #endif
... ... @@ -250,6 +282,7 @@
250 282  
251 283 #define CONFIG_CMDLINE_TAG
252 284 #define CONFIG_CMDLINE_EDITING
  285 +
253 286 #define CONFIG_CMD_IMLS
254 287  
255 288 #define CONFIG_HWCONFIG
256 289  
... ... @@ -295,7 +328,11 @@
295 328 #define CONFIG_SYS_INIT_SP_ADDR \
296 329 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
297 330  
  331 +#ifdef CONFIG_SPL_BUILD
  332 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
  333 +#else
298 334 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
  335 +#endif
299 336  
300 337 #define CONFIG_SYS_QE_FW_ADDR 0x67f40000
301 338  
302 339  
... ... @@ -304,10 +341,17 @@
304 341 */
305 342 #define CONFIG_ENV_OVERWRITE
306 343  
  344 +#if defined(CONFIG_SD_BOOT)
  345 +#define CONFIG_ENV_OFFSET 0x100000
  346 +#define CONFIG_ENV_IS_IN_MMC
  347 +#define CONFIG_SYS_MMC_ENV_DEV 0
  348 +#define CONFIG_ENV_SIZE 0x20000
  349 +#else
307 350 #define CONFIG_ENV_IS_IN_FLASH
308 351 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
309 352 #define CONFIG_ENV_SIZE 0x20000
310 353 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
  354 +#endif
311 355  
312 356 #define CONFIG_OF_LIBFDT
313 357 #define CONFIG_OF_BOARD_SETUP