Eric Lee / smarc-uboot | Embedian Git Server

Commit 853f7f5018d9b67b6039a78127c44e2daa467204

Authored by Lokesh Vutla 2018-08-27 18:29:09 +0800

Committed by Tom Rini 2018-09-11 20:32:55 +0800

Exists in smarc_8mq_lf_v2020.04 and in 11 other branches

arm64: dts: k3: Add u-boot specific nodes

Add the minimum dt nodes required to boot. These nodes
will get deleted as kernel gets these nodes added in the
main dts files.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Showing 2 changed files with 252 additions and 0 deletions Side-by-side Diff

arch/arm/dts/k3-am654-base-board-u-boot.dtsi
include/dt-bindings/pinctrl/k3-am65.h

arch/arm/dts/k3-am654-base-board-u-boot.dtsi

Diff comments View file @ 853f7f5

	1	+// SPDX-License-Identifier: GPL-2.0
	2	+/*
	3	+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
	4	+ */
	5	+
	6	+#include <dt-bindings/pinctrl/k3-am65.h>
	7	+
	8	+/ {
	9	+ chosen {
	10	+ stdout-path = "serial2:115200n8";
	11	+ };
	12	+
	13	+ aliases {
	14	+ serial2 = &main_uart0;
	15	+ };
	16	+};
	17	+
	18	+&cbass_main{
	19	+ u-boot,dm-spl;
	20	+ secure_proxy: secure_proxy@32c00000 {
	21	+ compatible = "ti,am654-secure-proxy";
	22	+ #mbox-cells = <1>;
	23	+ reg-names = "target_data", "rt", "scfg";
	24	+ reg = <0x32c00000 0x100000>,
	25	+ <0x32400000 0x100000>,
	26	+ <0x32800000 0x100000>;
	27	+ interrupt-names = "rx_011";
	28	+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
	29	+ };
	30	+
	31	+ dmsc: dmsc {
	32	+ compatible = "ti,k2g-sci";
	33	+ ti,host-id = <12>;
	34	+ #address-cells = <1>;
	35	+ #size-cells = <1>;
	36	+ ranges;
	37	+ /*
	38	+ * In case of rare platforms that does not use am6 as
	39	+ * system master, use /delete-property/
	40	+ */
	41	+ ti,system-reboot-controller;
	42	+ mbox-names = "rx", "tx";
	43	+
	44	+ mboxes= <&secure_proxy 11>,
	45	+ <&secure_proxy 13>;
	46	+
	47	+ k3_pds: power-controller {
	48	+ compatible = "ti,sci-pm-domain";
	49	+ #power-domain-cells = <1>;
	50	+ };
	51	+
	52	+ k3_clks: clocks {
	53	+ compatible = "ti,k2g-sci-clk";
	54	+ #clock-cells = <2>;
	55	+ };
	56	+
	57	+ k3_reset: reset-controller {
	58	+ compatible = "ti,sci-reset";
	59	+ #reset-cells = <2>;
	60	+ };
	61	+
	62	+ k3_sysreset: sysreset-controller {
	63	+ compatible = "ti,sci-sysreset";
	64	+ };
	65	+ };
	66	+
	67	+ main_pmx0: pinmux@11c000 {
	68	+ compatible = "pinctrl-single";
	69	+ reg = <0x11c000 0x2e4>;
	70	+ #pinctrl-cells = <1>;
	71	+ pinctrl-single,register-width = <32>;
	72	+ pinctrl-single,function-mask = <0xffffffff>;
	73	+ };
	74	+
	75	+ main_pmx1: pinmux@11c2e8 {
	76	+ compatible = "pinctrl-single";
	77	+ reg = <0x11c2e8 0x24>;
	78	+ #pinctrl-cells = <1>;
	79	+ pinctrl-single,register-width = <32>;
	80	+ pinctrl-single,function-mask = <0xffffffff>;
	81	+ };
	82	+
	83	+ main_uart0: serial@2800000 {
	84	+ compatible = "ti,am654-uart", "ti,omap4-uart", "ns16550a";
	85	+ reg = <0x02800000 0x100>;
	86	+ reg-shift = <2>;
	87	+ reg-io-width = <4>;
	88	+ interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
	89	+ clock-frequency = <48000000>;
	90	+ current-speed = <115200>;
	91	+ status = "disabled";
	92	+ u-boot,dm-pre-reloc;
	93	+ };
	94	+
	95	+ sdhci0: sdhci@04F80000 {
	96	+ compatible = "arasan,sdhci-5.1";
	97	+ reg = <0x4F80000 0x1000>,
	98	+ <0x4F90000 0x400>;
	99	+ clocks = <&k3_clks 47 1>;
	100	+ power-domains = <&k3_pds 47>;
	101	+ max-frequency = <25000000>;
	102	+ };
	103	+
	104	+ sdhci1: sdhci@04FA0000 {
	105	+ compatible = "arasan,sdhci-5.1";
	106	+ reg = <0x4FA0000 0x1000>,
	107	+ <0x4FB0000 0x400>;
	108	+ clocks = <&k3_clks 48 1>;
	109	+ power-domains = <&k3_pds 48>;
	110	+ max-frequency = <25000000>;
	111	+ };
	112	+
	113	+};
	114	+
	115	+&secure_proxy {
	116	+ u-boot,dm-spl;
	117	+};
	118	+
	119	+&dmsc {
	120	+ u-boot,dm-spl;
	121	+};
	122	+
	123	+&k3_pds {
	124	+ u-boot,dm-spl;
	125	+};
	126	+
	127	+&k3_clks {
	128	+ u-boot,dm-spl;
	129	+};
	130	+
	131	+&k3_reset {
	132	+ u-boot,dm-spl;
	133	+};
	134	+
	135	+&main_pmx0 {
	136	+ u-boot,dm-spl;
	137	+ main_uart0_pins_default: main_uart0_pins_default {
	138	+ pinctrl-single,pins = <
	139	+ AM65X_IOPAD(0x01e4, PIN_INPUT \| MUX_MODE0) /* (AF11) UART0_RXD */
	140	+ AM65X_IOPAD(0x01e8, PIN_OUTPUT \| MUX_MODE0) /* (AE11) UART0_TXD */
	141	+ AM65X_IOPAD(0x01ec, PIN_INPUT \| MUX_MODE0) /* (AG11) UART0_CTSn */
	142	+ AM65X_IOPAD(0x01f0, PIN_OUTPUT \| MUX_MODE0) /* (AD11) UART0_RTSn */
	143	+ >;
	144	+ };
	145	+
	146	+ main_mmc0_pins_default: main_mmc0_pins_default {
	147	+ pinctrl-single,pins = <
	148	+ AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN \| MUX_MODE0) /* (B25) MMC0_CLK */
	149	+ AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP \| MUX_MODE0) /* (B27) MMC0_CMD */
	150	+ AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP \| MUX_MODE0) /* (A26) MMC0_DAT0 */
	151	+ AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP \| MUX_MODE0) /* (E25) MMC0_DAT1 */
	152	+ AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP \| MUX_MODE0) /* (C26) MMC0_DAT2 */
	153	+ AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP \| MUX_MODE0) /* (A25) MMC0_DAT3 */
	154	+ AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP \| MUX_MODE0) /* (E24) MMC0_DAT4 */
	155	+ AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP \| MUX_MODE0) /* (A24) MMC0_DAT5 */
	156	+ AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP \| MUX_MODE0) /* (B26) MMC0_DAT6 */
	157	+ AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP \| MUX_MODE0) /* (D25) MMC0_DAT7 */
	158	+ AM65X_IOPAD(0x01b0, PIN_INPUT \| MUX_MODE0) /* (C25) MMC0_DS */
	159	+ >;
	160	+ };
	161	+
	162	+ main_mmc1_pins_default: main_mmc1_pins_default {
	163	+ pinctrl-single,pins = <
	164	+ AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN \| MUX_MODE0) /* (C27) MMC1_CLK */
	165	+ AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP \| MUX_MODE0) /* (C28) MMC1_CMD */
	166	+ AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP \| MUX_MODE0) /* (D28) MMC1_DAT0 */
	167	+ AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP \| MUX_MODE0) /* (E27) MMC1_DAT1 */
	168	+ AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP \| MUX_MODE0) /* (D26) MMC1_DAT2 */
	169	+ AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP \| MUX_MODE0) /* (D27) MMC1_DAT3 */
	170	+ AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP \| MUX_MODE0) /* (B24) MMC1_SDCD */
	171	+ AM65X_IOPAD(0x02e0, PIN_INPUT \| MUX_MODE0) /* (C24) MMC1_SDWP */
	172	+ >;
	173	+ };
	174	+
	175	+};
	176	+
	177	+&main_pmx1 {
	178	+ u-boot,dm-spl;
	179	+};
	180	+
	181	+&main_uart0 {
	182	+ u-boot,dm-spl;
	183	+ pinctrl-names = "default";
	184	+ pinctrl-0 = <&main_uart0_pins_default>;
	185	+ status = "okay";
	186	+};
	187	+
	188	+&sdhci0 {
	189	+ u-boot,dm-spl;
	190	+ status = "okay";
	191	+ non-removable;
	192	+ bus-width = <8>;
	193	+ pinctrl-names = "default";
	194	+ pinctrl-0 = <&main_mmc0_pins_default>;
	195	+};
	196	+
	197	+&sdhci1 {
	198	+ u-boot,dm-spl;
	199	+ status = "okay";
	200	+ pinctrl-names = "default";
	201	+ pinctrl-0 = <&main_mmc1_pins_default>;
	202	+ sdhci-caps-mask = <0x7 0x0>;
	203	+};

include/dt-bindings/pinctrl/k3-am65.h

Diff comments View file @ 853f7f5

	1	+/* SPDX-License-Identifier: GPL-2.0 */
	2	+/*
	3	+ * This header provides constants for TI K3-AM65 pinctrl bindings.
	4	+ *
	5	+ * Copyright (C) 2018 Texas Instruments
	6	+ */
	7	+#ifndef _DT_BINDINGS_PINCTRL_TI_K3_AM65_H
	8	+#define _DT_BINDINGS_PINCTRL_TI_K3_AM65_H
	9	+
	10	+/* K3 mux mode options for each pin. See TRM for options */
	11	+#define MUX_MODE0 0
	12	+#define MUX_MODE1 1
	13	+#define MUX_MODE2 2
	14	+#define MUX_MODE3 3
	15	+#define MUX_MODE4 4
	16	+#define MUX_MODE5 5
	17	+#define MUX_MODE6 6
	18	+#define MUX_MODE7 7
	19	+#define MUX_MODE15 15
	20	+
	21	+#define PULL_DISABLE (1 << 16)
	22	+#define PULL_UP (1 << 17)
	23	+#define INPUT_EN (1 << 18)
	24	+#define SLEWCTRL_200MHZ 0
	25	+#define SLEWCTRL_150MHZ (1 << 19)
	26	+#define SLEWCTRL_100MHZ (2 << 19)
	27	+#define SLEWCTRL_50MHZ (3 << 19)
	28	+#define TX_DIS (1 << 21)
	29	+#define ISO_OVR (1 << 22)
	30	+#define ISO_BYPASS (1 << 23)
	31	+#define DS_EN (1 << 24)
	32	+#define DS_INPUT (1 << 25)
	33	+#define DS_FORCE_OUT_HIGH (1 << 26)
	34	+#define DS_PULL_UP_DOWN_EN 0
	35	+#define DS_PULL_UP_DOWN_DIS (1 << 27)
	36	+#define DS_PULL_UP_SEL (1 << 28)
	37	+#define WAKEUP_ENABLE (1 << 29)
	38	+
	39	+#define PIN_OUTPUT (PULL_DISABLE)
	40	+#define PIN_OUTPUT_PULLUP (PULL_UP)
	41	+#define PIN_OUTPUT_PULLDOWN 0
	42	+#define PIN_INPUT (INPUT_EN \| PULL_DISABLE)
	43	+#define PIN_INPUT_PULLUP (INPUT_EN \| PULL_UP)
	44	+#define PIN_INPUT_PULLDOWN (INPUT_EN)
	45	+
	46	+#define AM65X_IOPAD(pa, val) (((pa) & 0x1fff)) (val)
	47	+#define AM65X_WKUP_IOPAD(pa, val) (((pa) & 0x1fff)) (val)
	48	+
	49	+#endif