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Commit 871d78ed1b906a79d8a6dad96a9f83dea7b9170f

Authored by Alexandre Courbot
Committed by Tom Warren
1 parent 95486f843b
Exists in v2017.01-smarct4x and in 30 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

ARM: tegra: move VPR configuration to a later stage 

U-boot is responsible for enabling the GPU DT node after all necessary
configuration (VPR setup for T124) is performed. In order to be able to
check whether this configuration has been performed right before booting
the kernel, make it happen during board_init().

Also move VPR configuration into the more generic gpu.c file, which will
also host other GPU-related functions, and let boards specify
individually whether they need VPR setup or not.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Showing 9 changed files with 84 additions and 50 deletions Side-by-side Diff

arch/arm/include/asm/arch-tegra/ap.h
Diff comments   View file @ 871d78e
... ... @@ -64,15 +64,6 @@
64 64 /* Do any chip-specific cache config */
65 65 void config_cache(void);
66 66  
67   -#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA210)
68   -/* Do chip-specific vpr config */
69   -void config_vpr(void);
70   -#else
71   -static inline void config_vpr(void)
72   -{
73   -}
74   -#endif
75   -
76 67 #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
77 68 bool tegra_cpu_is_non_secure(void);
78 69 #endif
arch/arm/include/asm/arch-tegra/gpu.h
Diff comments   View file @ 871d78e
  1 +/*
  2 + * (C) Copyright 2015
  3 + * NVIDIA Corporation <www.nvidia.com>
  4 + *
  5 + * SPDX-License-Identifier: GPL-2.0+
  6 + */
  7 +
  8 +#ifndef __ASM_ARCH_TEGRA_GPU_H
  9 +#define __ASM_ARCH_TEGRA_GPU_H
  10 +
  11 +#if defined(CONFIG_TEGRA_GPU)
  12 +
  13 +void config_gpu(void);
  14 +bool gpu_configured(void);
  15 +
  16 +#else /* CONFIG_TEGRA_GPU */
  17 +
  18 +static inline void config_gpu(void)
  19 +{
  20 +}
  21 +
  22 +static inline bool gpu_configured(void)
  23 +{
  24 + return false;
  25 +}
  26 +
  27 +#endif /* CONFIG_TEGRA_GPU */
arch/arm/mach-tegra/Makefile
Diff comments   View file @ 871d78e
... ... @@ -24,9 +24,7 @@
24 24 obj-y += powergate.o
25 25 obj-y += xusb-padctl.o
26 26 obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
27   -#TCW Fix this to use a common config switch (CONFIG_LOCK_VPR?)
28   -obj-$(CONFIG_TEGRA124) += vpr.o
29   -obj-$(CONFIG_TEGRA210) += vpr.o
  27 +obj-$(CONFIG_TEGRA_GPU) += gpu.o
30 28 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
31 29  
32 30 ifndef CONFIG_SPL_BUILD
arch/arm/mach-tegra/ap.c
Diff comments   View file @ 871d78e
... ... @@ -226,9 +226,6 @@
226 226  
227 227 /* enable SMMU */
228 228 smmu_enable();
229   -
230   - /* init vpr */
231   - config_vpr();
232 229 }
233 230 #endif
arch/arm/mach-tegra/board2.c
Diff comments   View file @ 871d78e
... ... @@ -29,6 +29,7 @@
29 29 #include <asm/arch-tegra/sys_proto.h>
30 30 #include <asm/arch-tegra/uart.h>
31 31 #include <asm/arch-tegra/warmboot.h>
  32 +#include <asm/arch-tegra/gpu.h>
32 33 #ifdef CONFIG_TEGRA_CLOCK_SCALING
33 34 #include <asm/arch/emc.h>
34 35 #endif
... ... @@ -125,6 +126,8 @@
125 126 /* Do clocks and UART first so that printf() works */
126 127 clock_init();
127 128 clock_verify();
  129 +
  130 + config_gpu();
128 131  
129 132 #ifdef CONFIG_TEGRA_SPI
130 133 pin_mux_spi();
arch/arm/mach-tegra/gpu.c
Diff comments   View file @ 871d78e
  1 +/*
  2 + * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify it
  5 + * under the terms and conditions of the GNU General Public License,
  6 + * version 2, as published by the Free Software Foundation.
  7 + *
  8 + * This program is distributed in the hope it will be useful, but WITHOUT
  9 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11 + * more details.
  12 + *
  13 + * You should have received a copy of the GNU General Public License
  14 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
  15 + */
  16 +
  17 +/* Tegra vpr routines */
  18 +
  19 +#include <common.h>
  20 +#include <asm/io.h>
  21 +#include <asm/arch/tegra.h>
  22 +#include <asm/arch/mc.h>
  23 +
  24 +#include <fdt_support.h>
  25 +
  26 +static bool _configured;
  27 +
  28 +void config_gpu(void)
  29 +{
  30 + struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
  31 +
  32 + /* Turn VPR off */
  33 + writel(0, &mc->mc_video_protect_size_mb);
  34 + writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
  35 + &mc->mc_video_protect_reg_ctrl);
  36 + /* read back to ensure the write went through */
  37 + readl(&mc->mc_video_protect_reg_ctrl);
  38 +
  39 + debug("configured VPR\n");
  40 +
  41 + _configured = true;
  42 +}
  43 +
  44 +bool vpr_configured(void)
  45 +{
  46 + return _configured;
  47 +}
arch/arm/mach-tegra/vpr.c
View file @ 871d78e
1   -/*
2   - * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
3   - *
4   - * This program is free software; you can redistribute it and/or modify it
5   - * under the terms and conditions of the GNU General Public License,
6   - * version 2, as published by the Free Software Foundation.
7   - *
8   - * This program is distributed in the hope it will be useful, but WITHOUT
9   - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10   - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11   - * more details.
12   - *
13   - * You should have received a copy of the GNU General Public License
14   - * along with this program. If not, see <http://www.gnu.org/licenses/>.
15   - */
16   -
17   -/* Tegra vpr routines */
18   -
19   -#include <common.h>
20   -#include <asm/io.h>
21   -#include <asm/arch/tegra.h>
22   -#include <asm/arch/mc.h>
23   -
24   -/* Configures VPR. Right now, all we do is turn it off. */
25   -void config_vpr(void)
26   -{
27   - struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
28   -
29   - /* Turn VPR off */
30   - writel(0, &mc->mc_video_protect_size_mb);
31   - writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
32   - &mc->mc_video_protect_reg_ctrl);
33   - /* read back to ensure the write went through */
34   - readl(&mc->mc_video_protect_reg_ctrl);
35   -}
include/configs/tegra124-common.h
Diff comments   View file @ 871d78e
... ... @@ -70,5 +70,8 @@
70 70 #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
71 71 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
72 72  
  73 +/* GPU needs setup */
  74 +#define CONFIG_TEGRA_GPU
  75 +
73 76 #endif /* _TEGRA124_COMMON_H_ */
include/configs/tegra210-common.h
Diff comments   View file @ 871d78e
... ... @@ -73,5 +73,8 @@
73 73 #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
74 74 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
75 75  
  76 +/* GPU needs setup */
  77 +#define CONFIG_TEGRA_GPU
  78 +
76 79 #endif /* _TEGRA210_COMMON_H_ */