Commit 880540decfb855e96bc14ac84ac7784669e4b382

Authored by Dirk Eibach
Committed by Heiko Schocher
1 parent 1f2ba722ac

i2c, ppc4xx_i2c: switch to new multibus/multiadapter support

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>

Showing 98 changed files with 465 additions and 1025 deletions Side-by-side Diff

... ... @@ -1985,6 +1985,11 @@
1985 1985 - This driver adds 4 i2c buses with a fix speed from
1986 1986 100000 and the slave addr 0!
1987 1987  
  1988 + - drivers/i2c/ppc4xx_i2c.c
  1989 + - activate this driver with CONFIG_SYS_I2C_PPC4XX
  1990 + - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
  1991 + - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
  1992 +
1988 1993 additional defines:
1989 1994  
1990 1995 CONFIG_SYS_NUM_I2C_BUSES
arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c
... ... @@ -52,10 +52,6 @@
52 52 /*
53 53 * Set default values
54 54 */
55   -#ifndef CONFIG_SYS_I2C_SPEED
56   -#define CONFIG_SYS_I2C_SPEED 50000
57   -#endif
58   -
59 55 #define ONE_BILLION 1000000000
60 56  
61 57 #define SDRAM0_CFG_DCE 0x80000000
... ... @@ -158,7 +154,7 @@
158 154 * Make sure I2C controller is initialized
159 155 * before continuing.
160 156 */
161   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  157 + i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
162 158 }
163 159  
164 160 /* Make shure we are using SDRAM */
arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c
... ... @@ -62,10 +62,6 @@
62 62 /*
63 63 * Set default values
64 64 */
65   -#ifndef CONFIG_SYS_I2C_SPEED
66   -#define CONFIG_SYS_I2C_SPEED 50000
67   -#endif
68   -
69 65 #define ONE_BILLION 1000000000
70 66  
71 67 /*
... ... @@ -168,7 +164,7 @@
168 164 * Make sure I2C controller is initialized
169 165 * before continuing.
170 166 */
171   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  167 + i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
172 168  
173 169 /*
174 170 * Read the SPD information using I2C interface. Check to see if the
arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
... ... @@ -459,8 +459,7 @@
459 459 */
460 460  
461 461 /* switch to correct I2C bus */
462   - I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
463   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  462 + i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
464 463  
465 464 /*------------------------------------------------------------------
466 465 * Clear out the serial presence detect buffers.
arch/powerpc/cpu/ppc4xx/cmd_chip_config.c
... ... @@ -56,7 +56,7 @@
56 56 * First switch to correct I2C bus. This is I2C bus 0
57 57 * for all currently available 4xx derivats.
58 58 */
59   - I2C_SET_BUS(0);
  59 + i2c_set_bus_num(0);
60 60  
61 61 #ifdef CONFIG_CMD_EEPROM
62 62 ret = eeprom_read(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR,
arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
... ... @@ -1041,8 +1041,7 @@
1041 1041 * before continuing.
1042 1042 */
1043 1043 /* switch to correct I2C bus */
1044   - I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
1045   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  1044 + i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
1046 1045  
1047 1046 /*------------------------------------------------------------------
1048 1047 * Clear out the serial presence detect buffers.
arch/powerpc/include/asm/ppc4xx-i2c.h
... ... @@ -34,24 +34,6 @@
34 34  
35 35 #define IIC_TIMEOUT 1 /* 1 second */
36 36  
37   -#if defined(CONFIG_I2C_MULTI_BUS)
38   -#define I2C_BUS_OFFS (i2c_bus_num * 0x100)
39   -#else
40   -#define I2C_BUS_OFFS (0x000)
41   -#endif /* CONFIG_I2C_MULTI_BUS */
42   -
43   -#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
44   - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
45   - defined(CONFIG_460EX) || defined(CONFIG_460GT)
46   -#define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + I2C_BUS_OFFS)
47   -#elif defined(CONFIG_440) || defined(CONFIG_405EX)
48   -/* all remaining 440 variants */
49   -#define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + I2C_BUS_OFFS)
50   -#else
51   -/* all 405 variants */
52   -#define I2C_BASE_ADDR (0xEF600500 + I2C_BUS_OFFS)
53   -#endif
54   -
55 37 struct ppc4xx_i2c {
56 38 u8 mdbuf;
57 39 u8 res1;
board/csb272/csb272.c
... ... @@ -51,7 +51,7 @@
51 51 */
52 52 int pll_init(void)
53 53 {
54   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  54 + i2c_set_bus_num(0);
55 55  
56 56 return i2c_write(CONFIG_SYS_I2C_PLL_ADDR, 0, 1,
57 57 (uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs));
board/esd/du440/du440.c
... ... @@ -385,7 +385,6 @@
385 385 return 0;
386 386 }
387 387  
388   -#if defined(CONFIG_I2C_MULTI_BUS)
389 388 /*
390 389 * read field strength from I2C ADC
391 390 */
... ... @@ -500,7 +499,6 @@
500 499 "Initialize USB hub",
501 500 ""
502 501 );
503   -#endif /* CONFIG_I2C_MULTI_BUS */
504 502  
505 503 #define CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS 3
506 504 int boot_eeprom_write (unsigned dev_addr,
... ... @@ -111,7 +111,7 @@
111 111 uchar val, errcd;
112 112 int i;
113 113  
114   - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  114 + i2c_set_bus_num(0);
115 115  
116 116 gd->arch.kbd_status = 0;
117 117  
board/mpl/pip405/pip405.c
... ... @@ -209,7 +209,7 @@
209 209 #endif
210 210  
211 211 /* Read Serial Presence Detect Information */
212   - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  212 + i2c_set_bus_num(0);
213 213 for (i = 0; i < 128; i++)
214 214 datain[i] = 127;
215 215 i2c_read(SPD_EEPROM_ADDRESS,0,1,datain,128);
board/sandburst/common/ppc440gx_i2c.c
1   -/*
2   - * Copyright (C) 2005 Sandburst Corporation
3   - *
4   - * See file CREDITS for list of people who contributed to this
5   - * project.
6   - *
7   - * This program is free software; you can redistribute it and/or
8   - * modify it under the terms of the GNU General Public License as
9   - * published by the Free Software Foundation; either version 2 of
10   - * the License, or (at your option) any later version.
11   - *
12   - * This program is distributed in the hope that it will be useful,
13   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
14   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15   - * GNU General Public License for more details.
16   - *
17   - * You should have received a copy of the GNU General Public License
18   - * along with this program; if not, write to the Free Software
19   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20   - * MA 02111-1307 USA
21   - */
22   -
23   -/*
24   - * Ported from arch/powerpc/cpu/ppc4xx/i2c.c by AS HARNOIS by
25   - * Travis B. Sawyer
26   - * Sandburst Corporation.
27   - */
28   -#include <common.h>
29   -#include <asm/ppc4xx.h>
30   -#include <asm/ppc4xx-i2c.h>
31   -#include <i2c.h>
32   -#include <command.h>
33   -#include "ppc440gx_i2c.h"
34   -#include <asm/io.h>
35   -
36   -#ifdef CONFIG_I2C_BUS1
37   -
38   -#define IIC_OK 0
39   -#define IIC_NOK 1
40   -#define IIC_NOK_LA 2 /* Lost arbitration */
41   -#define IIC_NOK_ICT 3 /* Incomplete transfer */
42   -#define IIC_NOK_XFRA 4 /* Transfer aborted */
43   -#define IIC_NOK_DATA 5 /* No data in buffer */
44   -#define IIC_NOK_TOUT 6 /* Transfer timeout */
45   -
46   -#define IIC_TIMEOUT 1 /* 1 second */
47   -#if defined(CONFIG_SYS_I2C_NOPROBES)
48   -static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
49   -#endif
50   -
51   -static struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_REGISTERS_BUS1_BASE_ADDRESS;
52   -
53   -static void _i2c_bus1_reset (void)
54   -{
55   - int i, status;
56   -
57   - /* Reset status register */
58   - /* write 1 in SCMP and IRQA to clear these fields */
59   - out_8 (IIC_STS1, 0x0A);
60   -
61   - /* write 1 in IRQP IRQD LA ICT XFRA to clear these fields */
62   - out_8 (IIC_EXTSTS1, 0x8F);
63   - __asm__ volatile ("eieio");
64   -
65   - /*
66   - * Get current state, reset bus
67   - * only if no transfers are pending.
68   - */
69   - i = 10;
70   - do {
71   - /* Get status */
72   - status = in_8 (IIC_STS1);
73   - udelay (500); /* 500us */
74   - i--;
75   - } while ((status & IIC_STS_PT) && (i > 0));
76   - /* Soft reset controller */
77   - status = in_8 (IIC_XTCNTLSS1);
78   - out_8 (IIC_XTCNTLSS1, (status | IIC_XTCNTLSS_SRST));
79   - __asm__ volatile ("eieio");
80   -
81   - /* make sure where in initial state, data hi, clock hi */
82   - out_8 (IIC_DIRECTCNTL1, 0xC);
83   - for (i = 0; i < 10; i++) {
84   - if ((in_8 (IIC_DIRECTCNTL1) & 0x3) != 0x3) {
85   - /* clock until we get to known state */
86   - out_8 (IIC_DIRECTCNTL1, 0x8); /* clock lo */
87   - udelay (100); /* 100us */
88   - out_8 (IIC_DIRECTCNTL1, 0xC); /* clock hi */
89   - udelay (100); /* 100us */
90   - } else {
91   - break;
92   - }
93   - }
94   - /* send start condition */
95   - out_8 (IIC_DIRECTCNTL1, 0x4);
96   - udelay (1000); /* 1ms */
97   - /* send stop condition */
98   - out_8 (IIC_DIRECTCNTL1, 0xC);
99   - udelay (1000); /* 1ms */
100   - /* Unreset controller */
101   - out_8 (IIC_XTCNTLSS1, (status & ~IIC_XTCNTLSS_SRST));
102   - udelay (1000); /* 1ms */
103   -}
104   -
105   -void i2c1_init (int speed, int slaveadd)
106   -{
107   - sys_info_t sysInfo;
108   - unsigned long freqOPB;
109   - int val, divisor;
110   -
111   -#ifdef CONFIG_SYS_I2C_INIT_BOARD
112   - /* call board specific i2c bus reset routine before accessing the */
113   - /* environment, which might be in a chip on that bus. For details */
114   - /* about this problem see doc/I2C_Edge_Conditions. */
115   - i2c_init_board();
116   -#endif
117   -
118   - /* Handle possible failed I2C state */
119   - /* FIXME: put this into i2c_init_board()? */
120   - _i2c_bus1_reset ();
121   -
122   - /* clear lo master address */
123   - out_8 (IIC_LMADR1, 0);
124   -
125   - /* clear hi master address */
126   - out_8 (IIC_HMADR1, 0);
127   -
128   - /* clear lo slave address */
129   - out_8 (IIC_LSADR1, 0);
130   -
131   - /* clear hi slave address */
132   - out_8 (IIC_HSADR1, 0);
133   -
134   - /* Clock divide Register */
135   - /* get OPB frequency */
136   - get_sys_info (&sysInfo);
137   - freqOPB = sysInfo.freqPLB / sysInfo.pllOpbDiv;
138   - /* set divisor according to freqOPB */
139   - divisor = (freqOPB - 1) / 10000000;
140   - if (divisor == 0)
141   - divisor = 1;
142   - out_8 (IIC_CLKDIV1, divisor);
143   -
144   - /* no interrupts */
145   - out_8 (IIC_INTRMSK1, 0);
146   -
147   - /* clear transfer count */
148   - out_8 (IIC_XFRCNT1, 0);
149   -
150   - /* clear extended control & stat */
151   - /* write 1 in SRC SRS SWC SWS to clear these fields */
152   - out_8 (IIC_XTCNTLSS1, 0xF0);
153   -
154   - /* Mode Control Register
155   - Flush Slave/Master data buffer */
156   - out_8 (IIC_MDCNTL1, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
157   - __asm__ volatile ("eieio");
158   -
159   -
160   - val = in_8(IIC_MDCNTL1);
161   - __asm__ volatile ("eieio");
162   -
163   - /* Ignore General Call, slave transfers are ignored,
164   - disable interrupts, exit unknown bus state, enable hold
165   - SCL
166   - 100kHz normaly or FastMode for 400kHz and above
167   - */
168   -
169   - val |= IIC_MDCNTL_EUBS|IIC_MDCNTL_HSCL;
170   - if( speed >= 400000 ){
171   - val |= IIC_MDCNTL_FSM;
172   - }
173   - out_8 (IIC_MDCNTL1, val);
174   -
175   - /* clear control reg */
176   - out_8 (IIC_CNTL1, 0x00);
177   - __asm__ volatile ("eieio");
178   -
179   -}
180   -
181   -/*
182   - This code tries to use the features of the 405GP i2c
183   - controller. It will transfer up to 4 bytes in one pass
184   - on the loop. It only does out_8(lbz) to the buffer when it
185   - is possible to do out16(lhz) transfers.
186   -
187   - cmd_type is 0 for write 1 for read.
188   -
189   - addr_len can take any value from 0-255, it is only limited
190   - by the char, we could make it larger if needed. If it is
191   - 0 we skip the address write cycle.
192   -
193   - Typical case is a Write of an addr followd by a Read. The
194   - IBM FAQ does not cover this. On the last byte of the write
195   - we don't set the creg CHT bit, and on the first bytes of the
196   - read we set the RPST bit.
197   -
198   - It does not support address only transfers, there must be
199   - a data part. If you want to write the address yourself, put
200   - it in the data pointer.
201   -
202   - It does not support transfer to/from address 0.
203   -
204   - It does not check XFRCNT.
205   -*/
206   -static
207   -int i2c_transfer1(unsigned char cmd_type,
208   - unsigned char chip,
209   - unsigned char addr[],
210   - unsigned char addr_len,
211   - unsigned char data[],
212   - unsigned short data_len )
213   -{
214   - unsigned char* ptr;
215   - int reading;
216   - int tran,cnt;
217   - int result;
218   - int status;
219   - int i;
220   - uchar creg;
221   -
222   - if( data == 0 || data_len == 0 ){
223   - /*Don't support data transfer of no length or to address 0*/
224   - printf( "i2c_transfer: bad call\n" );
225   - return IIC_NOK;
226   - }
227   - if( addr && addr_len ){
228   - ptr = addr;
229   - cnt = addr_len;
230   - reading = 0;
231   - }else{
232   - ptr = data;
233   - cnt = data_len;
234   - reading = cmd_type;
235   - }
236   -
237   - /*Clear Stop Complete Bit*/
238   - out_8(IIC_STS1,IIC_STS_SCMP);
239   - /* Check init */
240   - i=10;
241   - do {
242   - /* Get status */
243   - status = in_8(IIC_STS1);
244   - __asm__ volatile("eieio");
245   - i--;
246   - } while ((status & IIC_STS_PT) && (i>0));
247   -
248   - if (status & IIC_STS_PT) {
249   - result = IIC_NOK_TOUT;
250   - return(result);
251   - }
252   - /*flush the Master/Slave Databuffers*/
253   - out_8(IIC_MDCNTL1, ((in_8(IIC_MDCNTL1))|IIC_MDCNTL_FMDB|IIC_MDCNTL_FSDB));
254   - /*need to wait 4 OPB clocks? code below should take that long*/
255   -
256   - /* 7-bit adressing */
257   - out_8(IIC_HMADR1,0);
258   - out_8(IIC_LMADR1, chip);
259   - __asm__ volatile("eieio");
260   -
261   - tran = 0;
262   - result = IIC_OK;
263   - creg = 0;
264   -
265   - while ( tran != cnt && (result == IIC_OK)) {
266   - int bc,j;
267   -
268   - /* Control register =
269   - Normal transfer, 7-bits adressing, Transfer up to bc bytes, Normal start,
270   - Transfer is a sequence of transfers
271   - */
272   - creg |= IIC_CNTL_PT;
273   -
274   - bc = (cnt - tran) > 4 ? 4 :
275   - cnt - tran;
276   - creg |= (bc-1)<<4;
277   - /* if the real cmd type is write continue trans*/
278   - if ( (!cmd_type && (ptr == addr)) || ((tran+bc) != cnt) )
279   - creg |= IIC_CNTL_CHT;
280   -
281   - if (reading)
282   - creg |= IIC_CNTL_READ;
283   - else {
284   - for(j=0; j<bc; j++) {
285   - /* Set buffer */
286   - out_8(IIC_MDBUF1,ptr[tran+j]);
287   - __asm__ volatile("eieio");
288   - }
289   - }
290   - out_8(IIC_CNTL1, creg );
291   - __asm__ volatile("eieio");
292   -
293   - /* Transfer is in progress
294   - we have to wait for upto 5 bytes of data
295   - 1 byte chip address+r/w bit then bc bytes
296   - of data.
297   - udelay(10) is 1 bit time at 100khz
298   - Doubled for slop. 20 is too small.
299   - */
300   - i=2*5*8;
301   - do {
302   - /* Get status */
303   - status = in_8(IIC_STS1);
304   - __asm__ volatile("eieio");
305   - udelay (10);
306   - i--;
307   - } while ((status & IIC_STS_PT) && !(status & IIC_STS_ERR)
308   - && (i>0));
309   -
310   - if (status & IIC_STS_ERR) {
311   - result = IIC_NOK;
312   - status = in_8 (IIC_EXTSTS1);
313   - /* Lost arbitration? */
314   - if (status & IIC_EXTSTS_LA)
315   - result = IIC_NOK_LA;
316   - /* Incomplete transfer? */
317   - if (status & IIC_EXTSTS_ICT)
318   - result = IIC_NOK_ICT;
319   - /* Transfer aborted? */
320   - if (status & IIC_EXTSTS_XFRA)
321   - result = IIC_NOK_XFRA;
322   - } else if ( status & IIC_STS_PT) {
323   - result = IIC_NOK_TOUT;
324   - }
325   - /* Command is reading => get buffer */
326   - if ((reading) && (result == IIC_OK)) {
327   - /* Are there data in buffer */
328   - if (status & IIC_STS_MDBS) {
329   - /*
330   - even if we have data we have to wait 4OPB clocks
331   - for it to hit the front of the FIFO, after that
332   - we can just read. We should check XFCNT here and
333   - if the FIFO is full there is no need to wait.
334   - */
335   - udelay (1);
336   - for(j=0;j<bc;j++) {
337   - ptr[tran+j] = in_8(IIC_MDBUF1);
338   - __asm__ volatile("eieio");
339   - }
340   - } else
341   - result = IIC_NOK_DATA;
342   - }
343   - creg = 0;
344   - tran+=bc;
345   - if( ptr == addr && tran == cnt ) {
346   - ptr = data;
347   - cnt = data_len;
348   - tran = 0;
349   - reading = cmd_type;
350   - if( reading )
351   - creg = IIC_CNTL_RPST;
352   - }
353   - }
354   - return (result);
355   -}
356   -
357   -int i2c_probe1 (uchar chip)
358   -{
359   - uchar buf[1];
360   -
361   - buf[0] = 0;
362   -
363   - /*
364   - * What is needed is to send the chip address and verify that the
365   - * address was <ACK>ed (i.e. there was a chip at that address which
366   - * drove the data line low).
367   - */
368   - return(i2c_transfer1 (1, chip << 1, 0,0, buf, 1) != 0);
369   -}
370   -
371   -
372   -int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
373   -{
374   - uchar xaddr[4];
375   - int ret;
376   -
377   - if ( alen > 4 ) {
378   - printf ("I2C read: addr len %d not supported\n", alen);
379   - return 1;
380   - }
381   -
382   - if ( alen > 0 ) {
383   - xaddr[0] = (addr >> 24) & 0xFF;
384   - xaddr[1] = (addr >> 16) & 0xFF;
385   - xaddr[2] = (addr >> 8) & 0xFF;
386   - xaddr[3] = addr & 0xFF;
387   - }
388   -
389   -
390   -#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
391   - /*
392   - * EEPROM chips that implement "address overflow" are ones
393   - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
394   - * address and the extra bits end up in the "chip address"
395   - * bit slots. This makes a 24WC08 (1Kbyte) chip look like
396   - * four 256 byte chips.
397   - *
398   - * Note that we consider the length of the address field to
399   - * still be one byte because the extra address bits are
400   - * hidden in the chip address.
401   - */
402   - if( alen > 0 )
403   - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
404   -#endif
405   - if( (ret = i2c_transfer1( 1, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) {
406   - printf( "I2c read: failed %d\n", ret);
407   - return 1;
408   - }
409   - return 0;
410   -}
411   -
412   -int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
413   -{
414   - uchar xaddr[4];
415   -
416   - if ( alen > 4 ) {
417   - printf ("I2C write: addr len %d not supported\n", alen);
418   - return 1;
419   -
420   - }
421   - if ( alen > 0 ) {
422   - xaddr[0] = (addr >> 24) & 0xFF;
423   - xaddr[1] = (addr >> 16) & 0xFF;
424   - xaddr[2] = (addr >> 8) & 0xFF;
425   - xaddr[3] = addr & 0xFF;
426   - }
427   -
428   -#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
429   - /*
430   - * EEPROM chips that implement "address overflow" are ones
431   - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
432   - * address and the extra bits end up in the "chip address"
433   - * bit slots. This makes a 24WC08 (1Kbyte) chip look like
434   - * four 256 byte chips.
435   - *
436   - * Note that we consider the length of the address field to
437   - * still be one byte because the extra address bits are
438   - * hidden in the chip address.
439   - */
440   - if( alen > 0 )
441   - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
442   -#endif
443   -
444   - return (i2c_transfer1( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0);
445   -}
446   -
447   -/*-----------------------------------------------------------------------
448   - * Read a register
449   - */
450   -uchar i2c_reg_read1(uchar i2c_addr, uchar reg)
451   -{
452   - uchar buf;
453   -
454   - i2c_read1(i2c_addr, reg, 1, &buf, (uchar)1);
455   -
456   - return(buf);
457   -}
458   -
459   -/*-----------------------------------------------------------------------
460   - * Write a register
461   - */
462   -void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val)
463   -{
464   - i2c_write1(i2c_addr, reg, 1, &val, 1);
465   -}
466   -
467   -
468   -int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
469   -{
470   - int j;
471   -#if defined(CONFIG_SYS_I2C_NOPROBES)
472   - int k, skip;
473   -#endif
474   -
475   - puts ("Valid chip addresses:");
476   - for(j = 0; j < 128; j++) {
477   -#if defined(CONFIG_SYS_I2C_NOPROBES)
478   - skip = 0;
479   - for (k = 0; k < sizeof(i2c_no_probes); k++){
480   - if (j == i2c_no_probes[k]){
481   - skip = 1;
482   - break;
483   - }
484   - }
485   - if (skip)
486   - continue;
487   -#endif
488   - if(i2c_probe1(j) == 0) {
489   - printf(" %02X", j);
490   - }
491   - }
492   - putc ('\n');
493   -
494   -#if defined(CONFIG_SYS_I2C_NOPROBES)
495   - puts ("Excluded chip addresses:");
496   - for( k = 0; k < sizeof(i2c_no_probes); k++ )
497   - printf(" %02X", i2c_no_probes[k] );
498   - putc ('\n');
499   -#endif
500   -
501   - return 0;
502   -}
503   -
504   -U_BOOT_CMD(
505   - iprobe1, 1, 1, do_i2c1_probe,
506   - "probe to discover valid I2C chip addresses",
507   - ""
508   -);
509   -
510   -#endif /* CONFIG_I2C_BUS1 */
board/sandburst/common/ppc440gx_i2c.h
1   -/*
2   - * Copyright (C) 2005 Sandburst Corporation
3   - *
4   - * See file CREDITS for list of people who contributed to this
5   - * project.
6   - *
7   - * This program is free software; you can redistribute it and/or
8   - * modify it under the terms of the GNU General Public License as
9   - * published by the Free Software Foundation; either version 2 of
10   - * the License, or (at your option) any later version.
11   - *
12   - * This program is distributed in the hope that it will be useful,
13   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
14   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15   - * GNU General Public License for more details.
16   - *
17   - * You should have received a copy of the GNU General Public License
18   - * along with this program; if not, write to the Free Software
19   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20   - * MA 02111-1307 USA
21   - */
22   -
23   -/*
24   - * Ported from i2c driver for ppc4xx by AS HARNOIS by
25   - * Travis B. Sawyer
26   - * Sandburst Corporation
27   - */
28   -#include <common.h>
29   -#include <asm/ppc4xx.h>
30   -#include <asm/ppc4xx-i2c.h>
31   -#include <i2c.h>
32   -
33   -#ifdef CONFIG_HARD_I2C
34   -
35   -#define I2C_BUS1_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
36   -#define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR
37   -#define IIC_MDBUF1 (&i2c->mdbuf)
38   -#define IIC_SDBUF1 (&i2c->sdbuf)
39   -#define IIC_LMADR1 (&i2c->lmadr)
40   -#define IIC_HMADR1 (&i2c->hmadr)
41   -#define IIC_CNTL1 (&i2c->cntl)
42   -#define IIC_MDCNTL1 (&i2c->mdcntl)
43   -#define IIC_STS1 (&i2c->sts)
44   -#define IIC_EXTSTS1 (&i2c->extsts)
45   -#define IIC_LSADR1 (&i2c->lsadr)
46   -#define IIC_HSADR1 (&i2c->hsadr)
47   -#define IIC_CLKDIV1 (&i2c->clkdiv)
48   -#define IIC_INTRMSK1 (&i2c->intrmsk)
49   -#define IIC_XFRCNT1 (&i2c->xfrcnt)
50   -#define IIC_XTCNTLSS1 (&i2c->xtcntlss)
51   -#define IIC_DIRECTCNTL1 (&i2c->directcntl)
52   -
53   -void i2c1_init (int speed, int slaveadd);
54   -int i2c_probe1 (uchar chip);
55   -int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
56   -int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
57   -uchar i2c_reg_read1(uchar i2c_addr, uchar reg);
58   -void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val);
59   -
60   -#endif /* CONFIG_HARD_I2C */
board/sandburst/common/sb_common.c
... ... @@ -26,7 +26,6 @@
26 26 #include <asm/io.h>
27 27 #include <spd_sdram.h>
28 28 #include <i2c.h>
29   -#include "ppc440gx_i2c.h"
30 29 #include "sb_common.h"
31 30  
32 31 DECLARE_GLOBAL_DATA_PTR;
... ... @@ -84,7 +83,7 @@
84 83  
85 84 /* Get the board serial number from eeprom */
86 85 /* Initialize I2C */
87   - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  86 + i2c_set_bus_num(0);
88 87  
89 88 /* Read 256 bytes in EEPROM */
90 89 i2c_read (0x50, 0, 1, buff, 0x100);
91 90  
92 91  
93 92  
94 93  
95 94  
96 95  
97 96  
98 97  
99 98  
100 99  
101 100  
102 101  
103 102  
104 103  
105 104  
106 105  
107 106  
... ... @@ -110,85 +109,87 @@
110 109 * Attempt to turn on 2 of the fans...
111 110 * Need to go through the bridge
112 111 */
  112 + i2c_set_bus_num(1);
113 113 puts ("FANS: ");
114 114  
115 115 /* select fan4 through the bridge */
116   - i2c_reg_write1(0x73, /* addr */
117   - 0x00, /* reg */
118   - 0x08); /* val = bus 4 */
  116 + i2c_reg_write(0x73, /* addr */
  117 + 0x00, /* reg */
  118 + 0x08); /* val = bus 4 */
119 119  
120 120 /* Turn on FAN 4 */
121   - i2c_reg_write1(0x2e,
122   - 1,
123   - 0x80);
  121 + i2c_reg_write(0x2e,
  122 + 1,
  123 + 0x80);
124 124  
125   - i2c_reg_write1(0x2e,
126   - 0,
127   - 0x19);
  125 + i2c_reg_write(0x2e,
  126 + 0,
  127 + 0x19);
128 128  
129 129 /* Deselect bus 4 on the bridge */
130   - i2c_reg_write1(0x73,
131   - 0x00,
132   - 0x00);
  130 + i2c_reg_write(0x73,
  131 + 0x00,
  132 + 0x00);
133 133  
134 134 /* select fan3 through the bridge */
135   - i2c_reg_write1(0x73, /* addr */
136   - 0x00, /* reg */
137   - 0x04); /* val = bus 3 */
  135 + i2c_reg_write(0x73, /* addr */
  136 + 0x00, /* reg */
  137 + 0x04); /* val = bus 3 */
138 138  
139 139 /* Turn on FAN 3 */
140   - i2c_reg_write1(0x2e,
141   - 1,
142   - 0x80);
  140 + i2c_reg_write(0x2e,
  141 + 1,
  142 + 0x80);
143 143  
144   - i2c_reg_write1(0x2e,
145   - 0,
146   - 0x19);
  144 + i2c_reg_write(0x2e,
  145 + 0,
  146 + 0x19);
147 147  
148 148 /* Deselect bus 3 on the bridge */
149   - i2c_reg_write1(0x73,
150   - 0x00,
151   - 0x00);
  149 + i2c_reg_write(0x73,
  150 + 0x00,
  151 + 0x00);
152 152  
153 153 /* select fan2 through the bridge */
154   - i2c_reg_write1(0x73, /* addr */
155   - 0x00, /* reg */
156   - 0x02); /* val = bus 4 */
  154 + i2c_reg_write(0x73, /* addr */
  155 + 0x00, /* reg */
  156 + 0x02); /* val = bus 4 */
157 157  
158 158 /* Turn on FAN 2 */
159   - i2c_reg_write1(0x2e,
160   - 1,
161   - 0x80);
  159 + i2c_reg_write(0x2e,
  160 + 1,
  161 + 0x80);
162 162  
163   - i2c_reg_write1(0x2e,
164   - 0,
165   - 0x19);
  163 + i2c_reg_write(0x2e,
  164 + 0,
  165 + 0x19);
166 166  
167 167 /* Deselect bus 2 on the bridge */
168   - i2c_reg_write1(0x73,
169   - 0x00,
170   - 0x00);
  168 + i2c_reg_write(0x73,
  169 + 0x00,
  170 + 0x00);
171 171  
172 172 /* select fan1 through the bridge */
173   - i2c_reg_write1(0x73, /* addr */
174   - 0x00, /* reg */
175   - 0x01); /* val = bus 0 */
  173 + i2c_reg_write(0x73, /* addr */
  174 + 0x00, /* reg */
  175 + 0x01); /* val = bus 0 */
176 176  
177 177 /* Turn on FAN 1 */
178   - i2c_reg_write1(0x2e,
179   - 1,
180   - 0x80);
  178 + i2c_reg_write(0x2e,
  179 + 1,
  180 + 0x80);
181 181  
182   - i2c_reg_write1(0x2e,
183   - 0,
184   - 0x19);
  182 + i2c_reg_write(0x2e,
  183 + 0,
  184 + 0x19);
185 185  
186 186 /* Deselect bus 1 on the bridge */
187   - i2c_reg_write1(0x73,
188   - 0x00,
189   - 0x00);
  187 + i2c_reg_write(0x73,
  188 + 0x00,
  189 + 0x00);
190 190  
191 191 puts ("on\n");
  192 + i2c_set_bus_num(0);
192 193  
193 194 return;
194 195  
... ... @@ -319,7 +320,7 @@
319 320 if (0 == macaddr_idx) {
320 321  
321 322 /* Initialize I2C */
322   - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  323 + i2c_set_bus_num(0);
323 324  
324 325 /* Read 256 bytes in EEPROM */
325 326 i2c_read (0x50, 0, 1, buff, 0x100);
board/sandburst/common/sb_common.h
... ... @@ -28,7 +28,6 @@
28 28 #include <asm/io.h>
29 29 #include <spd_sdram.h>
30 30 #include <i2c.h>
31   -#include "ppc440gx_i2c.h"
32 31  
33 32 /*
34 33 * GPIO Settings
board/sandburst/karef/Makefile
... ... @@ -40,8 +40,7 @@
40 40  
41 41 LIB = $(obj)lib$(BOARD).o
42 42  
43   -COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \
44   - ../common/sb_common.o
  43 +COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o
45 44  
46 45 SOBJS = init.o
47 46  
board/sandburst/karef/karef.c
... ... @@ -337,11 +337,6 @@
337 337 ************************************************************************/
338 338 int misc_init_f (void)
339 339 {
340   - /* Turn on i2c bus 1 */
341   - puts ("I2C1: ");
342   - i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
343   - puts ("ready\n");
344   -
345 340 /* Turn on fans 3 & 4 */
346 341 sbcommon_fans();
347 342  
board/sandburst/metrobox/Makefile
... ... @@ -39,8 +39,7 @@
39 39  
40 40 LIB = $(obj)lib$(BOARD).o
41 41  
42   -COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \
43   - ../common/sb_common.o
  42 +COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o
44 43 SOBJS = init.o
45 44  
46 45 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
board/sandburst/metrobox/metrobox.c
... ... @@ -30,7 +30,6 @@
30 30 #include <asm/io.h>
31 31 #include <spd_sdram.h>
32 32 #include <i2c.h>
33   -#include "../common/ppc440gx_i2c.h"
34 33 #include "../common/sb_common.h"
35 34 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \
36 35 defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
... ... @@ -305,11 +304,6 @@
305 304 ************************************************************************/
306 305 int misc_init_f (void)
307 306 {
308   - /* Turn on i2c bus 1 */
309   - puts ("I2C1: ");
310   - i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
311   - puts ("ready\n");
312   -
313 307 /* Turn on fans */
314 308 sbcommon_fans();
315 309  
drivers/i2c/Makefile
... ... @@ -36,7 +36,6 @@
36 36 COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
37 37 COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
38 38 COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
39   -COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o
40 39 COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
41 40 COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
42 41 COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
... ... @@ -45,6 +44,7 @@
45 44 COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
46 45 COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
47 46 COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
  47 +COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
48 48 COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
49 49 COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
50 50 COBJS-$(CONFIG_ZYNQ_I2C) += zynq_i2c.o
drivers/i2c/ppc4xx_i2c.c
... ... @@ -32,27 +32,29 @@
32 32 #include <i2c.h>
33 33 #include <asm/io.h>
34 34  
35   -#ifdef CONFIG_HARD_I2C
36   -
37 35 DECLARE_GLOBAL_DATA_PTR;
38 36  
39   -#if defined(CONFIG_I2C_MULTI_BUS)
40   -/*
41   - * Initialize the bus pointer to whatever one the SPD EEPROM is on.
42   - * Default is bus 0. This is necessary because the DDR initialization
43   - * runs from ROM, and we can't switch buses because we can't modify
44   - * the global variables.
45   - */
46   -#ifndef CONFIG_SYS_SPD_BUS_NUM
47   -#define CONFIG_SYS_SPD_BUS_NUM 0
  37 +static inline struct ppc4xx_i2c *ppc4xx_get_i2c(int hwadapnr)
  38 +{
  39 + unsigned long base;
  40 +
  41 +#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
  42 + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
  43 + defined(CONFIG_460EX) || defined(CONFIG_460GT)
  44 + base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + (hwadapnr * 0x100);
  45 +#elif defined(CONFIG_440) || defined(CONFIG_405EX)
  46 +/* all remaining 440 variants */
  47 + base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + (hwadapnr * 0x100);
  48 +#else
  49 +/* all 405 variants */
  50 + base = 0xEF600500 + (hwadapnr * 0x100);
48 51 #endif
49   -static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
50   - CONFIG_SYS_SPD_BUS_NUM;
51   -#endif /* CONFIG_I2C_MULTI_BUS */
  52 + return (struct ppc4xx_i2c *)base;
  53 +}
52 54  
53   -static void _i2c_bus_reset(void)
  55 +static void _i2c_bus_reset(struct i2c_adapter *adap)
54 56 {
55   - struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
  57 + struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
56 58 int i;
57 59 u8 dc;
58 60  
59 61  
60 62  
... ... @@ -91,11 +93,10 @@
91 93 out_8(&i2c->xtcntlss, 0);
92 94 }
93 95  
94   -void i2c_init(int speed, int slaveaddr)
  96 +static void ppc4xx_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
95 97 {
96   - struct ppc4xx_i2c *i2c;
  98 + struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
97 99 int val, divisor;
98   - int bus;
99 100  
100 101 #ifdef CONFIG_SYS_I2C_INIT_BOARD
101 102 /*
102 103  
103 104  
104 105  
105 106  
106 107  
107 108  
108 109  
109 110  
110 111  
111 112  
112 113  
113 114  
114 115  
... ... @@ -106,67 +107,57 @@
106 107 i2c_init_board();
107 108 #endif
108 109  
109   - for (bus = 0; bus < CONFIG_SYS_MAX_I2C_BUS; bus++) {
110   - I2C_SET_BUS(bus);
  110 + /* Handle possible failed I2C state */
  111 + /* FIXME: put this into i2c_init_board()? */
  112 + _i2c_bus_reset(adap);
111 113  
112   - /* Set i2c pointer after calling I2C_SET_BUS() */
113   - i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
  114 + /* clear lo master address */
  115 + out_8(&i2c->lmadr, 0);
114 116  
115   - /* Handle possible failed I2C state */
116   - /* FIXME: put this into i2c_init_board()? */
117   - _i2c_bus_reset();
  117 + /* clear hi master address */
  118 + out_8(&i2c->hmadr, 0);
118 119  
119   - /* clear lo master address */
120   - out_8(&i2c->lmadr, 0);
  120 + /* clear lo slave address */
  121 + out_8(&i2c->lsadr, 0);
121 122  
122   - /* clear hi master address */
123   - out_8(&i2c->hmadr, 0);
  123 + /* clear hi slave address */
  124 + out_8(&i2c->hsadr, 0);
124 125  
125   - /* clear lo slave address */
126   - out_8(&i2c->lsadr, 0);
  126 + /* Clock divide Register */
  127 + /* set divisor according to freq_opb */
  128 + divisor = (get_OPB_freq() - 1) / 10000000;
  129 + if (divisor == 0)
  130 + divisor = 1;
  131 + out_8(&i2c->clkdiv, divisor);
127 132  
128   - /* clear hi slave address */
129   - out_8(&i2c->hsadr, 0);
  133 + /* no interrupts */
  134 + out_8(&i2c->intrmsk, 0);
130 135  
131   - /* Clock divide Register */
132   - /* set divisor according to freq_opb */
133   - divisor = (get_OPB_freq() - 1) / 10000000;
134   - if (divisor == 0)
135   - divisor = 1;
136   - out_8(&i2c->clkdiv, divisor);
  136 + /* clear transfer count */
  137 + out_8(&i2c->xfrcnt, 0);
137 138  
138   - /* no interrupts */
139   - out_8(&i2c->intrmsk, 0);
  139 + /* clear extended control & stat */
  140 + /* write 1 in SRC SRS SWC SWS to clear these fields */
  141 + out_8(&i2c->xtcntlss, 0xF0);
140 142  
141   - /* clear transfer count */
142   - out_8(&i2c->xfrcnt, 0);
  143 + /* Mode Control Register
  144 + Flush Slave/Master data buffer */
  145 + out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
143 146  
144   - /* clear extended control & stat */
145   - /* write 1 in SRC SRS SWC SWS to clear these fields */
146   - out_8(&i2c->xtcntlss, 0xF0);
  147 + val = in_8(&i2c->mdcntl);
147 148  
148   - /* Mode Control Register
149   - Flush Slave/Master data buffer */
150   - out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
  149 + /* Ignore General Call, slave transfers are ignored,
  150 + * disable interrupts, exit unknown bus state, enable hold
  151 + * SCL 100kHz normaly or FastMode for 400kHz and above
  152 + */
151 153  
152   - val = in_8(&i2c->mdcntl);
  154 + val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL;
  155 + if (speed >= 400000)
  156 + val |= IIC_MDCNTL_FSM;
  157 + out_8(&i2c->mdcntl, val);
153 158  
154   - /* Ignore General Call, slave transfers are ignored,
155   - * disable interrupts, exit unknown bus state, enable hold
156   - * SCL 100kHz normaly or FastMode for 400kHz and above
157   - */
158   -
159   - val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL;
160   - if (speed >= 400000)
161   - val |= IIC_MDCNTL_FSM;
162   - out_8(&i2c->mdcntl, val);
163   -
164   - /* clear control reg */
165   - out_8(&i2c->cntl, 0x00);
166   - }
167   -
168   - /* set to SPD bus as default bus upon powerup */
169   - I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
  159 + /* clear control reg */
  160 + out_8(&i2c->cntl, 0x00);
170 161 }
171 162  
172 163 /*
173 164  
... ... @@ -194,14 +185,15 @@
194 185 *
195 186 * It does not check XFRCNT.
196 187 */
197   -static int i2c_transfer(unsigned char cmd_type,
  188 +static int _i2c_transfer(struct i2c_adapter *adap,
  189 + unsigned char cmd_type,
198 190 unsigned char chip,
199 191 unsigned char addr[],
200 192 unsigned char addr_len,
201 193 unsigned char data[],
202 194 unsigned short data_len)
203 195 {
204   - struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
  196 + struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
205 197 u8 *ptr;
206 198 int reading;
207 199 int tran, cnt;
... ... @@ -345,7 +337,7 @@
345 337 return result;
346 338 }
347 339  
348   -int i2c_probe(uchar chip)
  340 +static int ppc4xx_i2c_probe(struct i2c_adapter *adap, uchar chip)
349 341 {
350 342 uchar buf[1];
351 343  
352 344  
... ... @@ -356,11 +348,11 @@
356 348 * address was <ACK>ed (i.e. there was a chip at that address which
357 349 * drove the data line low).
358 350 */
359   - return (i2c_transfer(1, chip << 1, 0, 0, buf, 1) != 0);
  351 + return (_i2c_transfer(adap, 1, chip << 1, 0, 0, buf, 1) != 0);
360 352 }
361 353  
362   -static int ppc4xx_i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
363   - int len, int read)
  354 +static int ppc4xx_i2c_transfer(struct i2c_adapter *adap, uchar chip, uint addr,
  355 + int alen, uchar *buffer, int len, int read)
364 356 {
365 357 uchar xaddr[4];
366 358 int ret;
367 359  
368 360  
369 361  
370 362  
371 363  
372 364  
373 365  
374 366  
375 367  
... ... @@ -394,44 +386,51 @@
394 386 chip |= ((addr >> (alen * 8)) &
395 387 CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
396 388 #endif
397   - if ((ret = i2c_transfer(read, chip << 1, &xaddr[4 - alen], alen,
398   - buffer, len)) != 0) {
  389 + ret = _i2c_transfer(adap, read, chip << 1, &xaddr[4 - alen], alen,
  390 + buffer, len);
  391 + if (ret) {
399 392 printf("I2C %s: failed %d\n", read ? "read" : "write", ret);
400   -
401 393 return 1;
402 394 }
403 395  
404 396 return 0;
405 397 }
406 398  
407   -int i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
  399 +static int ppc4xx_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
  400 + int alen, uchar *buffer, int len)
408 401 {
409   - return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 1);
  402 + return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 1);
410 403 }
411 404  
412   -int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
  405 +static int ppc4xx_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
  406 + int alen, uchar *buffer, int len)
413 407 {
414   - return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 0);
  408 + return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 0);
415 409 }
416 410  
417   -#if defined(CONFIG_I2C_MULTI_BUS)
418   -/*
419   - * Functions for multiple I2C bus handling
420   - */
421   -unsigned int i2c_get_bus_num(void)
  411 +static unsigned int ppc4xx_i2c_set_bus_speed(struct i2c_adapter *adap,
  412 + unsigned int speed)
422 413 {
423   - return i2c_bus_num;
424   -}
425   -
426   -int i2c_set_bus_num(unsigned int bus)
427   -{
428   - if (bus >= CONFIG_SYS_MAX_I2C_BUS)
  414 + if (speed != adap->speed)
429 415 return -1;
430   -
431   - i2c_bus_num = bus;
432   -
433   - return 0;
  416 + return speed;
434 417 }
435   -#endif /* CONFIG_I2C_MULTI_BUS */
436   -#endif /* CONFIG_HARD_I2C */
  418 +
  419 +/*
  420 + * Register ppc4xx i2c adapters
  421 + */
  422 +#ifdef CONFIG_SYS_I2C_PPC4XX_CH0
  423 +U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_0, ppc4xx_i2c_init, ppc4xx_i2c_probe,
  424 + ppc4xx_i2c_read, ppc4xx_i2c_write,
  425 + ppc4xx_i2c_set_bus_speed,
  426 + CONFIG_SYS_I2C_PPC4XX_SPEED_0,
  427 + CONFIG_SYS_I2C_PPC4XX_SLAVE_0, 0)
  428 +#endif
  429 +#ifdef CONFIG_SYS_I2C_PPC4XX_CH1
  430 +U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_1, ppc4xx_i2c_init, ppc4xx_i2c_probe,
  431 + ppc4xx_i2c_read, ppc4xx_i2c_write,
  432 + ppc4xx_i2c_set_bus_speed,
  433 + CONFIG_SYS_I2C_PPC4XX_SPEED_1,
  434 + CONFIG_SYS_I2C_PPC4XX_SLAVE_1, 1)
  435 +#endif
include/configs/APC405.h
... ... @@ -306,10 +306,11 @@
306 306 /*
307 307 * I2C EEPROM (CAT24WC16) for environment
308 308 */
309   -#define CONFIG_HARD_I2C /* I2c with hardware support */
310   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
311   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
312   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  309 +#define CONFIG_SYS_I2C
  310 +#define CONFIG_SYS_I2C_PPC4XX
  311 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  312 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  313 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
313 314  
314 315 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
315 316 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/ASH405.h
... ... @@ -247,10 +247,11 @@
247 247 /*-----------------------------------------------------------------------
248 248 * I2C EEPROM (CAT24WC16) for environment
249 249 */
250   -#define CONFIG_HARD_I2C /* I2c with hardware support */
251   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
252   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
253   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  250 +#define CONFIG_SYS_I2C
  251 +#define CONFIG_SYS_I2C_PPC4XX
  252 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  253 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  254 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
254 255  
255 256 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
256 257 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/CANBT.h
... ... @@ -180,14 +180,14 @@
180 180 /*-----------------------------------------------------------------------
181 181 * I2C EEPROM (CAT24WC08) for environment
182 182 */
183   -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
184   -#define CONFIG_HARD_I2C /* I2C with hardware support */
185   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
186   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
187   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  183 +#define CONFIG_SYS_I2C
  184 +#define CONFIG_SYS_I2C_PPC4XX
  185 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  186 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  187 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
188 188  
189   -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
190   -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
  189 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
  190 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
191 191 /* mask of address bits that overflow into the "EEPROM chip address" */
192 192 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
193 193  
include/configs/CATcenter.h
... ... @@ -402,10 +402,11 @@
402 402 /*-----------------------------------------------------------------------
403 403 * I2C EEPROM (CAT24WC16) for environment
404 404 */
405   -#define CONFIG_HARD_I2C /* I2c with hardware support */
406   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
407   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
408   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  405 +#define CONFIG_SYS_I2C
  406 +#define CONFIG_SYS_I2C_PPC4XX
  407 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  408 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  409 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
409 410  
410 411 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
411 412 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/CMS700.h
... ... @@ -226,10 +226,11 @@
226 226 /*-----------------------------------------------------------------------
227 227 * I2C EEPROM (CAT24WC16) for environment
228 228 */
229   -#define CONFIG_HARD_I2C /* I2c with hardware support */
230   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
231   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
232   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  229 +#define CONFIG_SYS_I2C
  230 +#define CONFIG_SYS_I2C_PPC4XX
  231 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  232 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  233 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
233 234  
234 235 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
235 236 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/CPCI2DP.h
... ... @@ -211,10 +211,11 @@
211 211 /*-----------------------------------------------------------------------
212 212 * I2C EEPROM (CAT24WC16) for environment
213 213 */
214   -#define CONFIG_HARD_I2C /* I2c with hardware support */
215   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
216   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
217   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  214 +#define CONFIG_SYS_I2C
  215 +#define CONFIG_SYS_I2C_PPC4XX
  216 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  217 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  218 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
218 219  
219 220 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
220 221 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/CPCI405.h
... ... @@ -260,10 +260,11 @@
260 260 /*-----------------------------------------------------------------------
261 261 * I2C EEPROM (CAT24WC08) for environment
262 262 */
263   -#define CONFIG_HARD_I2C /* I2c with hardware support */
264   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
265   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
266   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  263 +#define CONFIG_SYS_I2C
  264 +#define CONFIG_SYS_I2C_PPC4XX
  265 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  266 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  267 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
267 268  
268 269 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
269 270 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/CPCI4052.h
... ... @@ -287,10 +287,11 @@
287 287 /*-----------------------------------------------------------------------
288 288 * I2C EEPROM (CAT24WC16) for environment
289 289 */
290   -#define CONFIG_HARD_I2C /* I2c with hardware support */
291   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
292   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
293   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  290 +#define CONFIG_SYS_I2C
  291 +#define CONFIG_SYS_I2C_PPC4XX
  292 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  293 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  294 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
294 295  
295 296 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
296 297 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/CPCI405AB.h
... ... @@ -263,10 +263,11 @@
263 263 /*-----------------------------------------------------------------------
264 264 * I2C EEPROM (CAT24WC32) for environment
265 265 */
266   -#define CONFIG_HARD_I2C /* I2c with hardware support */
267   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
268   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
269   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  266 +#define CONFIG_SYS_I2C
  267 +#define CONFIG_SYS_I2C_PPC4XX
  268 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  269 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  270 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
270 271  
271 272 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC32 */
272 273 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
include/configs/CPCI405DT.h
... ... @@ -282,10 +282,11 @@
282 282 /*-----------------------------------------------------------------------
283 283 * I2C EEPROM (CAT24WC16) for environment
284 284 */
285   -#define CONFIG_HARD_I2C /* I2c with hardware support */
286   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
287   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
288   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  285 +#define CONFIG_SYS_I2C
  286 +#define CONFIG_SYS_I2C_PPC4XX
  287 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  288 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  289 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
289 290  
290 291 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
291 292 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/CPCIISER4.h
... ... @@ -196,10 +196,11 @@
196 196 /*-----------------------------------------------------------------------
197 197 * I2C EEPROM (CAT24WC08) for environment
198 198 */
199   -#define CONFIG_HARD_I2C /* I2C with hardware support */
200   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
201   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
202   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  199 +#define CONFIG_SYS_I2C
  200 +#define CONFIG_SYS_I2C_PPC4XX
  201 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  202 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  203 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
203 204  
204 205 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
205 206 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/CRAYL1.h
... ... @@ -76,11 +76,12 @@
76 76 #define CONFIG_SERVERIP 10.0.0.1
77 77 #define CONFIG_ETHADDR 00:40:a6:80:14:5
78 78 */
79   -#define CONFIG_HARD_I2C 1 /* hardware support for i2c */
80   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
  79 +#define CONFIG_SYS_I2C
  80 +#define CONFIG_SYS_I2C_PPC4XX
  81 +#define CONFIG_SYS_I2C_PPC4XX_CH0
81 82 #define CONFIG_SDRAM_BANK0 1
82   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
83   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  83 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  84 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
84 85 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
85 86 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
86 87 #define CONFIG_IDENT_STRING "Cray L1"
include/configs/DP405.h
... ... @@ -178,10 +178,11 @@
178 178 /*-----------------------------------------------------------------------
179 179 * I2C EEPROM (CAT24WC16) for environment
180 180 */
181   -#define CONFIG_HARD_I2C /* I2c with hardware support */
182   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
183   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
184   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  181 +#define CONFIG_SYS_I2C
  182 +#define CONFIG_SYS_I2C_PPC4XX
  183 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  184 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  185 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
185 186  
186 187 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
187 188 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/DU405.h
... ... @@ -197,10 +197,11 @@
197 197 /*-----------------------------------------------------------------------
198 198 * I2C EEPROM (CAT24WC08) for environment
199 199 */
200   -#define CONFIG_HARD_I2C /* I2c with hardware support */
201   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
202   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
203   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  200 +#define CONFIG_SYS_I2C
  201 +#define CONFIG_SYS_I2C_PPC4XX
  202 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  203 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  204 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
204 205  
205 206 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
206 207 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/DU440.h
... ... @@ -170,18 +170,20 @@
170 170 /*
171 171 * I2C
172 172 */
173   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
174   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
175   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
176   -#define CONFIG_SYS_I2C_SLAVE 0x7F
177   -#define CONFIG_I2C_MULTI_BUS 1
  173 +#define CONFIG_SYS_I2C
  174 +#define CONFIG_SYS_I2C_PPC4XX
  175 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  176 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  177 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
  178 +#define CONFIG_SYS_I2C_PPC4XX_CH1
  179 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 100000
  180 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
178 181  
179 182 #define CONFIG_SYS_SPD_BUS_NUM 0
180 183 #define IIC1_MCP3021_ADDR 0x4d
181 184 #define IIC1_USB2507_ADDR 0x2c
182   -#ifdef CONFIG_I2C_MULTI_BUS
183   -#define CONFIG_SYS_I2C_NOPROBES {{1, IIC1_USB2507_ADDR}}
184   -#endif
  185 +#define CONFIG_SYS_I2C_NOPROBES { {1, IIC1_USB2507_ADDR} }
  186 +
185 187 #define CONFIG_SYS_I2C_MULTI_EEPROMS
186 188 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
187 189 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
include/configs/G2000.h
... ... @@ -298,10 +298,11 @@
298 298 /*-----------------------------------------------------------------------
299 299 * I2C EEPROM (CAT24WC16) for environment
300 300 */
301   -#define CONFIG_HARD_I2C /* I2c with hardware support */
302   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
303   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
304   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  301 +#define CONFIG_SYS_I2C
  302 +#define CONFIG_SYS_I2C_PPC4XX
  303 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  304 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  305 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
305 306  
306 307 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
307 308 /* CAT24WC08/16... */
include/configs/HH405.h
... ... @@ -334,14 +334,15 @@
334 334 /*-----------------------------------------------------------------------
335 335 * I2C EEPROM (CAT24WC16) for environment
336 336 */
337   -#define CONFIG_HARD_I2C /* I2c with hardware support */
338   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
  337 +#define CONFIG_SYS_I2C
  338 +#define CONFIG_SYS_I2C_PPC4XX
  339 +#define CONFIG_SYS_I2C_PPC4XX_CH0
339 340 #if 0 /* test-only */
340   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  341 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
341 342 #else
342   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
  343 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
343 344 #endif
344   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  345 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
345 346  
346 347 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
347 348 #define CONFIG_SYS_EEPROM_WREN 1
include/configs/HUB405.h
... ... @@ -246,10 +246,11 @@
246 246 /*-----------------------------------------------------------------------
247 247 * I2C EEPROM (CAT24WC16) for environment
248 248 */
249   -#define CONFIG_HARD_I2C /* I2c with hardware support */
250   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
251   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
252   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  249 +#define CONFIG_SYS_I2C
  250 +#define CONFIG_SYS_I2C_PPC4XX
  251 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  252 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  253 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
253 254  
254 255 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
255 256 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/JSE.h
... ... @@ -210,10 +210,11 @@
210 210  
211 211 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
212 212  
213   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
214   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
215   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
216   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  213 +#define CONFIG_SYS_I2C
  214 +#define CONFIG_SYS_I2C_PPC4XX
  215 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  216 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  217 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
217 218  
218 219  
219 220 /*-----------------------------------------------------------------------
include/configs/KAREF.h
... ... @@ -133,13 +133,15 @@
133 133 /*-----------------------------------------------------------------------
134 134 * I2C
135 135 *----------------------------------------------------------------------*/
136   -#define CONFIG_HARD_I2C 1 /* I2C hardware support */
137   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
138   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */
139   -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
140   -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
141   -#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */
142   -
  136 +#define CONFIG_SYS_I2C
  137 +#define CONFIG_SYS_I2C_PPC4XX
  138 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  139 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  140 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
  141 +#define CONFIG_SYS_I2C_PPC4XX_CH1
  142 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
  143 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
  144 +#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
143 145  
144 146 /*-----------------------------------------------------------------------
145 147 * Environment
include/configs/METROBOX.h
... ... @@ -195,13 +195,15 @@
195 195 /*-----------------------------------------------------------------------
196 196 * I2C
197 197 *----------------------------------------------------------------------*/
198   -#define CONFIG_HARD_I2C 1 /* I2C hardware support */
199   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
200   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */
201   -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
202   -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
203   -#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */
204   -
  198 +#define CONFIG_SYS_I2C
  199 +#define CONFIG_SYS_I2C_PPC4XX
  200 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  201 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  202 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
  203 +#define CONFIG_SYS_I2C_PPC4XX_CH1
  204 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
  205 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
  206 +#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
205 207  
206 208 /*-----------------------------------------------------------------------
207 209 * Environment
include/configs/MIP405.h
... ... @@ -98,10 +98,11 @@
98 98 * The Atmel EEPROM uses 16Bit addressing.
99 99 ***************************************************************/
100 100  
101   -#define CONFIG_HARD_I2C /* I2c with hardware support */
102   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
103   -#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */
104   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  101 +#define CONFIG_SYS_I2C
  102 +#define CONFIG_SYS_I2C_PPC4XX
  103 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  104 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000
  105 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
105 106  
106 107 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 /* EEPROM 24C128/256 */
107 108 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
include/configs/OCRTC.h
... ... @@ -217,10 +217,11 @@
217 217 /*-----------------------------------------------------------------------
218 218 * I2C EEPROM (CAT24WC08) for environment
219 219 */
220   -#define CONFIG_HARD_I2C /* I2c with hardware support */
221   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
222   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
223   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  220 +#define CONFIG_SYS_I2C
  221 +#define CONFIG_SYS_I2C_PPC4XX
  222 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  223 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  224 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
224 225  
225 226 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
226 227 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/ORSG.h
... ... @@ -213,10 +213,11 @@
213 213 /*-----------------------------------------------------------------------
214 214 * I2C EEPROM (CAT24WC08) for environment
215 215 */
216   -#define CONFIG_HARD_I2C /* I2c with hardware support */
217   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
218   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
219   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  216 +#define CONFIG_SYS_I2C
  217 +#define CONFIG_SYS_I2C_PPC4XX
  218 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  219 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  220 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
220 221  
221 222 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
222 223 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/PCI405.h
... ... @@ -209,10 +209,11 @@
209 209 /*-----------------------------------------------------------------------
210 210 * I2C EEPROM (CAT24WC16) for environment
211 211 */
212   -#define CONFIG_HARD_I2C /* I2c with hardware support */
213   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
214   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
215   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  212 +#define CONFIG_SYS_I2C
  213 +#define CONFIG_SYS_I2C_PPC4XX
  214 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  215 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  216 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
216 217  
217 218 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
218 219 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/PIP405.h
... ... @@ -87,10 +87,11 @@
87 87 * EEPROM of the SDRAM
88 88 * The Atmel EEPROM uses 16Bit addressing.
89 89 ***************************************************************/
90   -#define CONFIG_HARD_I2C /* I2c with hardware support */
91   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
92   -#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */
93   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  90 +#define CONFIG_SYS_I2C
  91 +#define CONFIG_SYS_I2C_PPC4XX
  92 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  93 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000
  94 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
94 95  
95 96 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
96 97 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
include/configs/PLU405.h
... ... @@ -281,10 +281,11 @@
281 281 /*
282 282 * I2C EEPROM (24WC16) for environment
283 283 */
284   -#define CONFIG_HARD_I2C /* I2c with hardware support */
285   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
286   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
287   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  284 +#define CONFIG_SYS_I2C
  285 +#define CONFIG_SYS_I2C_PPC4XX
  286 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  287 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  288 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
288 289  
289 290 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24WC16 */
290 291 #define CONFIG_SYS_EEPROM_WREN 1
include/configs/PMC405.h
... ... @@ -239,10 +239,11 @@
239 239 /*
240 240 * I2C EEPROM (CAT24WC16) for environment
241 241 */
242   -#define CONFIG_HARD_I2C /* I2c with hardware support */
243   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
244   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
245   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  242 +#define CONFIG_SYS_I2C
  243 +#define CONFIG_SYS_I2C_PPC4XX
  244 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  245 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  246 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
246 247  
247 248 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24W16 */
248 249 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/PMC405DE.h
... ... @@ -217,10 +217,11 @@
217 217 /*
218 218 * I2C EEPROM (24W16) for environment
219 219 */
220   -#define CONFIG_HARD_I2C /* I2c with hardware support */
221   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
222   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
223   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  220 +#define CONFIG_SYS_I2C
  221 +#define CONFIG_SYS_I2C_PPC4XX
  222 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  223 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  224 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
224 225  
225 226 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24W16 */
226 227 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/PMC440.h
... ... @@ -225,12 +225,14 @@
225 225 /*-----------------------------------------------------------------------
226 226 * I2C
227 227 *----------------------------------------------------------------------*/
228   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
229   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
230   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
231   -#define CONFIG_SYS_I2C_SLAVE 0x7F
232   -
233   -#define CONFIG_I2C_MULTI_BUS 1
  228 +#define CONFIG_SYS_I2C
  229 +#define CONFIG_SYS_I2C_PPC4XX
  230 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  231 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  232 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
  233 +#define CONFIG_SYS_I2C_PPC4XX_CH1
  234 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000
  235 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
234 236  
235 237 #define CONFIG_SYS_I2C_MULTI_EEPROMS
236 238  
include/configs/PPChameleonEVB.h
... ... @@ -419,10 +419,11 @@
419 419 /*-----------------------------------------------------------------------
420 420 * I2C EEPROM (CAT24WC16) for environment
421 421 */
422   -#define CONFIG_HARD_I2C /* I2c with hardware support */
423   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
424   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
425   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  422 +#define CONFIG_SYS_I2C
  423 +#define CONFIG_SYS_I2C_PPC4XX
  424 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  425 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  426 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
426 427  
427 428 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
428 429 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/VOH405.h
... ... @@ -280,10 +280,11 @@
280 280 /*-----------------------------------------------------------------------
281 281 * I2C EEPROM (CAT24WC16) for environment
282 282 */
283   -#define CONFIG_HARD_I2C /* I2c with hardware support */
284   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
285   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
286   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  283 +#define CONFIG_SYS_I2C
  284 +#define CONFIG_SYS_I2C_PPC4XX
  285 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  286 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  287 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
287 288  
288 289 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
289 290 #define CONFIG_SYS_EEPROM_WREN 1
include/configs/VOM405.h
... ... @@ -205,10 +205,11 @@
205 205 /*
206 206 * I2C EEPROM (CAT24WC16) for environment
207 207 */
208   -#define CONFIG_HARD_I2C /* I2c with hardware support */
209   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
210   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
211   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  208 +#define CONFIG_SYS_I2C
  209 +#define CONFIG_SYS_I2C_PPC4XX
  210 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  211 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  212 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
212 213  
213 214 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
214 215 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/W7OLMC.h
... ... @@ -279,10 +279,11 @@
279 279 /*-----------------------------------------------------------------------
280 280 * I2C EEPROM (CAT24WC08) for environment
281 281 */
282   -#define CONFIG_HARD_I2C /* I2c with hardware support */
283   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
284   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
285   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  282 +#define CONFIG_SYS_I2C
  283 +#define CONFIG_SYS_I2C_PPC4XX
  284 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  285 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  286 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
286 287  
287 288 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
288 289 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/W7OLMG.h
... ... @@ -286,10 +286,11 @@
286 286 /*-----------------------------------------------------------------------
287 287 * I2C EEPROM (ATMEL 24C04N)
288 288 */
289   -#define CONFIG_HARD_I2C 1 /* Hardware assisted I2C */
290   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
291   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
292   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  289 +#define CONFIG_SYS_I2C
  290 +#define CONFIG_SYS_I2C_PPC4XX
  291 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  292 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  293 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
293 294  
294 295 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM ATMEL 24C04N */
295 296 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/WUH405.h
... ... @@ -244,10 +244,11 @@
244 244 /*-----------------------------------------------------------------------
245 245 * I2C EEPROM (CAT24WC16) for environment
246 246 */
247   -#define CONFIG_HARD_I2C /* I2c with hardware support */
248   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
249   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
250   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  247 +#define CONFIG_SYS_I2C
  248 +#define CONFIG_SYS_I2C_PPC4XX
  249 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  250 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  251 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
251 252  
252 253 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
253 254 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/acadia.h
... ... @@ -206,7 +206,7 @@
206 206 /*-----------------------------------------------------------------------
207 207 * I2C
208 208 *----------------------------------------------------------------------*/
209   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  209 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
210 210  
211 211 #define CONFIG_SYS_I2C_MULTI_EEPROMS
212 212 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/alpr.h
... ... @@ -121,11 +121,12 @@
121 121 /*-----------------------------------------------------------------------
122 122 * I2C
123 123 *----------------------------------------------------------------------*/
124   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
125   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
126   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
127   -#define CONFIG_SYS_I2C_SLAVE 0x7F
128   -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
  124 +#define CONFIG_SYS_I2C
  125 +#define CONFIG_SYS_I2C_PPC4XX
  126 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  127 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  128 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
  129 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */
129 130  
130 131 /*-----------------------------------------------------------------------
131 132 * I2C EEPROM (PCF8594C)
include/configs/amcc-common.h
... ... @@ -42,9 +42,10 @@
42 42 /*
43 43 * I2C
44 44 */
45   -#define CONFIG_HARD_I2C /* I2C with hardware support */
46   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
47   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  45 +#define CONFIG_SYS_I2C
  46 +#define CONFIG_SYS_I2C_PPC4XX
  47 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  48 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
48 49  
49 50 /*
50 51 * Ethernet/EMAC/PHY
include/configs/bamboo.h
... ... @@ -222,7 +222,7 @@
222 222 /*-----------------------------------------------------------------------
223 223 * I2C
224 224 *----------------------------------------------------------------------*/
225   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  225 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
226 226  
227 227 #define CONFIG_SYS_I2C_MULTI_EEPROMS
228 228 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/bluestone.h
... ... @@ -122,7 +122,7 @@
122 122 /*
123 123 * I2C
124 124 */
125   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
  125 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
126 126 #define CONFIG_SYS_I2C_MULTI_EEPROMS
127 127 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
128 128 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
include/configs/bubinga.h
... ... @@ -134,9 +134,9 @@
134 134 * I2C stuff
135 135 *-----------------------------------------------------------------------
136 136 */
137   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  137 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
138 138  
139   -#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */
  139 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* avoid i2c probe hangup (?) */
140 140 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
141 141  
142 142 #if defined(CONFIG_CMD_EEPROM)
include/configs/canyonlands.h
... ... @@ -329,7 +329,7 @@
329 329 /*-----------------------------------------------------------------------
330 330 * I2C
331 331 *----------------------------------------------------------------------*/
332   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
  332 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
333 333  
334 334 #define CONFIG_SYS_I2C_MULTI_EEPROMS
335 335 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/csb272.h
... ... @@ -175,10 +175,11 @@
175 175 * I2C configuration
176 176 *
177 177 */
178   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
179   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
180   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
181   -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
  178 +#define CONFIG_SYS_I2C
  179 +#define CONFIG_SYS_I2C_PPC4XX
  180 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  181 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  182 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* I2C slave address */
182 183  
183 184 /*
184 185 * MII PHY configuration
include/configs/csb472.h
... ... @@ -174,10 +174,11 @@
174 174 * I2C configuration
175 175 *
176 176 */
177   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
178   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
179   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
180   -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
  177 +#define CONFIG_SYS_I2C
  178 +#define CONFIG_SYS_I2C_PPC4XX
  179 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  180 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  181 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* I2C slave address */
181 182  
182 183 /*
183 184 * MII PHY configuration
include/configs/dlvision-10g.h
... ... @@ -114,7 +114,7 @@
114 114 /*
115 115 * I2C stuff
116 116 */
117   -#define CONFIG_SYS_I2C_SPEED 100000
  117 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
118 118  
119 119 /* Temp sensor/hwmon/dtt */
120 120 #define CONFIG_DTT_LM63 1 /* National LM63 */
include/configs/dlvision.h
... ... @@ -107,7 +107,7 @@
107 107 /*
108 108 * I2C stuff
109 109 */
110   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address*/
  110 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
111 111  
112 112 /*
113 113 * FLASH organization
include/configs/ebony.h
... ... @@ -138,7 +138,7 @@
138 138 /*-----------------------------------------------------------------------
139 139 * I2C
140 140 *----------------------------------------------------------------------*/
141   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  141 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
142 142  
143 143 #define CONFIG_SYS_I2C_MULTI_EEPROMS
144 144 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/gdppc440etx.h
... ... @@ -145,7 +145,7 @@
145 145 /*
146 146 * I2C
147 147 */
148   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed+slave address*/
  148 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
149 149  
150 150 /*
151 151 * Default environment variables
include/configs/icon.h
... ... @@ -120,9 +120,8 @@
120 120 /*
121 121 * I2C
122 122 */
123   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
  123 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
124 124  
125   -#define CONFIG_I2C_MULTI_BUS
126 125 #define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
127 126  
128 127 #define CONFIG_SYS_I2C_MULTI_EEPROMS
include/configs/intip.h
... ... @@ -228,7 +228,7 @@
228 228 /*
229 229 * I2C
230 230 */
231   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
  231 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
232 232  
233 233 #define CONFIG_SYS_I2C_MULTI_EEPROMS
234 234 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/io.h
... ... @@ -114,7 +114,7 @@
114 114 /*
115 115 * I2C stuff
116 116 */
117   -#define CONFIG_SYS_I2C_SPEED 100000
  117 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
118 118  
119 119 /* Temp sensor/hwmon/dtt */
120 120 #define CONFIG_DTT_LM63 1 /* National LM63 */
include/configs/io64.h
... ... @@ -340,7 +340,7 @@
340 340 /*-----------------------------------------------------------------------
341 341 * I2C
342 342 *----------------------------------------------------------------------*/
343   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  343 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
344 344  
345 345 #define CONFIG_PCA9698 1 /* NXP PCA9698 */
346 346  
include/configs/iocon.h
... ... @@ -110,11 +110,11 @@
110 110 /*
111 111 * I2C stuff
112 112 */
113   -#undef CONFIG_HARD_I2C
114 113 #define CONFIG_SYS_I2C
115   -#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
116   -#define CONFIG_SYS_I2C_SOFT_SPEED 400000
117   -#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
  114 +#define CONFIG_SYS_I2C_PPC4XX
  115 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  116 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  117 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
118 118  
119 119 /*
120 120 * Software (bit-bang) I2C driver configuration
include/configs/katmai.h
... ... @@ -119,9 +119,8 @@
119 119 /*-----------------------------------------------------------------------
120 120 * I2C
121 121 *----------------------------------------------------------------------*/
122   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
  122 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
123 123  
124   -#define CONFIG_I2C_MULTI_BUS
125 124 #define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
126 125  
127 126 #define IIC0_BOOTPROM_ADDR 0x50
include/configs/kilauea.h
... ... @@ -385,7 +385,7 @@
385 385 /*-----------------------------------------------------------------------
386 386 * I2C
387 387 *----------------------------------------------------------------------*/
388   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  388 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
389 389  
390 390 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */
391 391 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
include/configs/korat.h
... ... @@ -155,10 +155,11 @@
155 155 /*
156 156 * I2C
157 157 */
158   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
159   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
160   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
161   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  158 +#define CONFIG_SYS_I2C
  159 +#define CONFIG_SYS_I2C_PPC4XX
  160 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  161 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  162 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
162 163  
163 164 #define CONFIG_SYS_I2C_MULTI_EEPROMS
164 165 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/luan.h
... ... @@ -134,7 +134,7 @@
134 134 /*-----------------------------------------------------------------------
135 135 * I2C
136 136 *----------------------------------------------------------------------*/
137   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  137 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
138 138  
139 139 #define CONFIG_SYS_I2C_MULTI_EEPROMS
140 140 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/lwmon5.h
... ... @@ -298,10 +298,11 @@
298 298 /*
299 299 * I2C
300 300 */
301   -#define CONFIG_HARD_I2C /* I2C with hardware support */
302   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
303   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
304   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  301 +#define CONFIG_SYS_I2C
  302 +#define CONFIG_SYS_I2C_PPC4XX
  303 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  304 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  305 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
305 306  
306 307 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* RTC */
307 308 #define CONFIG_SYS_I2C_EEPROM_CPU_ADDR 0x52 /* EEPROM (CPU Modul) */
include/configs/makalu.h
... ... @@ -201,7 +201,7 @@
201 201 /*-----------------------------------------------------------------------
202 202 * I2C
203 203 *----------------------------------------------------------------------*/
204   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  204 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
205 205  
206 206 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
207 207 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */
include/configs/neo.h
... ... @@ -117,7 +117,7 @@
117 117 /*
118 118 * I2C stuff
119 119 */
120   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
  120 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
121 121  
122 122 /* RTC */
123 123 #define CONFIG_RTC_DS1337
include/configs/ocotea.h
... ... @@ -151,7 +151,7 @@
151 151 /*-----------------------------------------------------------------------
152 152 * I2C
153 153 *----------------------------------------------------------------------*/
154   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  154 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
155 155  
156 156 #define CONFIG_SYS_I2C_MULTI_EEPROMS
157 157 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/p3p440.h
... ... @@ -97,11 +97,12 @@
97 97 /*-----------------------------------------------------------------------
98 98 * I2C
99 99 *----------------------------------------------------------------------*/
100   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
101   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
102   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
103   -#define CONFIG_SYS_I2C_SLAVE 0x7F
104   -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
  100 +#define CONFIG_SYS_I2C
  101 +#define CONFIG_SYS_I2C_PPC4XX
  102 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  103 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  104 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
  105 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */
105 106  
106 107 /*-----------------------------------------------------------------------
107 108 * I2C RTC
include/configs/pcs440ep.h
... ... @@ -139,10 +139,11 @@
139 139 /*-----------------------------------------------------------------------
140 140 * I2C
141 141 *----------------------------------------------------------------------*/
142   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
143   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
144   -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
145   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  142 +#define CONFIG_SYS_I2C
  143 +#define CONFIG_SYS_I2C_PPC4XX
  144 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  145 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  146 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
146 147  
147 148 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa4>>1)
148 149 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
include/configs/quad100hd.h
... ... @@ -152,10 +152,11 @@
152 152 /*-----------------------------------------------------------------------
153 153 * I2C
154 154 *----------------------------------------------------------------------*/
155   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
156   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
157   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
158   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  155 +#define CONFIG_SYS_I2C
  156 +#define CONFIG_SYS_I2C_PPC4XX
  157 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  158 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  159 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
159 160  
160 161 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
161 162 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* bytes of address */
include/configs/redwood.h
... ... @@ -110,13 +110,13 @@
110 110 /*-----------------------------------------------------------------------
111 111 * I2C
112 112 *----------------------------------------------------------------------*/
113   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
  113 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
114 114  
115 115 #define IIC0_BOOTPROM_ADDR 0x50
116 116 #define IIC0_ALT_BOOTPROM_ADDR 0x54
117 117  
118 118 /* Don't probe these addrs */
119   -#define CONFIG_SYS_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54}
  119 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} }
120 120  
121 121 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
122 122  
include/configs/sbc405.h
... ... @@ -168,10 +168,11 @@
168 168  
169 169 #define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */
170 170  
171   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
172   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
173   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
174   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  171 +#define CONFIG_SYS_I2C
  172 +#define CONFIG_SYS_I2C_PPC4XX
  173 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  174 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  175 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
175 176  
176 177 /*-----------------------------------------------------------------------
177 178 * PCI stuff
include/configs/sc3.h
... ... @@ -246,15 +246,16 @@
246 246 * IIC stuff
247 247 *-----------------------------------------------------------------------
248 248 */
249   -#define CONFIG_HARD_I2C /* I2C with hardware support */
250   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
  249 +#define CONFIG_SYS_I2C
  250 +#define CONFIG_SYS_I2C_PPC4XX
  251 +#define CONFIG_SYS_I2C_PPC4XX_CH0
251 252  
252 253 #define I2C_INIT
253 254 #define I2C_ACTIVE 0
254 255 #define I2C_TRISTATE 0
255 256  
256   -#define CONFIG_SYS_I2C_SPEED 100000 /* use the standard 100kHz speed */
257   -#define CONFIG_SYS_I2C_SLAVE 0x7F /* mask valid bits */
  257 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
  258 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* mask valid bits */
258 259  
259 260 #define CONFIG_RTC_DS1337
260 261 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
include/configs/sequoia.h
... ... @@ -232,7 +232,7 @@
232 232 /*
233 233 * I2C
234 234 */
235   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  235 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
236 236  
237 237 #define CONFIG_SYS_I2C_MULTI_EEPROMS
238 238 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/t3corp.h
... ... @@ -319,7 +319,7 @@
319 319 /*
320 320 * I2C
321 321 */
322   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
  322 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
323 323  
324 324 #define CONFIG_SYS_I2C_MULTI_EEPROMS
325 325 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/taihu.h
... ... @@ -138,9 +138,9 @@
138 138 * I2C stuff
139 139 *-----------------------------------------------------------------------
140 140 */
141   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  141 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
142 142  
143   -#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */
  143 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* avoid i2c probe hangup (?) */
144 144 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
145 145  
146 146 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */
include/configs/taishan.h
... ... @@ -133,7 +133,7 @@
133 133 /*-----------------------------------------------------------------------
134 134 * I2C
135 135 *----------------------------------------------------------------------*/
136   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  136 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
137 137  
138 138 #undef CONFIG_SYS_I2C_MULTI_EEPROMS
139 139 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
include/configs/walnut.h
... ... @@ -95,7 +95,7 @@
95 95 * I2C stuff
96 96 *-----------------------------------------------------------------------
97 97 */
98   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  98 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
99 99  
100 100 #define CONFIG_SYS_I2C_MULTI_EEPROMS
101 101 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/xpedite1000.h
... ... @@ -145,11 +145,11 @@
145 145 /*
146 146 * I2C
147 147 */
148   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
149   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
150   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
151   -#define CONFIG_SYS_I2C_SLAVE 0x7f
152   -#define CONFIG_I2C_MULTI_BUS
  148 +#define CONFIG_SYS_I2C
  149 +#define CONFIG_SYS_I2C_PPC4XX
  150 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  151 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  152 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
153 153  
154 154 /* I2C EEPROM */
155 155 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
include/configs/yosemite.h
... ... @@ -137,7 +137,7 @@
137 137 /*-----------------------------------------------------------------------
138 138 * I2C
139 139 *----------------------------------------------------------------------*/
140   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  140 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
141 141  
142 142 #define CONFIG_SYS_I2C_MULTI_EEPROMS
143 143 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
include/configs/yucca.h
... ... @@ -120,13 +120,13 @@
120 120 /*-----------------------------------------------------------------------
121 121 * I2C
122 122 *----------------------------------------------------------------------*/
123   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  123 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
124 124  
125 125 #define IIC0_BOOTPROM_ADDR 0x50
126 126 #define IIC0_ALT_BOOTPROM_ADDR 0x54
127 127  
128 128 /* Don't probe these addrs */
129   -#define CONFIG_SYS_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54}
  129 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} }
130 130  
131 131 /* #if defined(CONFIG_CMD_EEPROM) */
132 132 /* #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 */ /* I2C boot EEPROM */
include/configs/zeus.h
... ... @@ -168,10 +168,11 @@
168 168 /*-----------------------------------------------------------------------
169 169 * I2C
170 170 *----------------------------------------------------------------------*/
171   -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
172   -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
173   -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
174   -#define CONFIG_SYS_I2C_SLAVE 0x7F
  171 +#define CONFIG_SYS_I2C
  172 +#define CONFIG_SYS_I2C_PPC4XX
  173 +#define CONFIG_SYS_I2C_PPC4XX_CH0
  174 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  175 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
175 176  
176 177 /* these are for the ST M24C02 2kbit serial i2c eeprom */
177 178 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */