Commit 8915891b77983a11b4ecd7c4b9a50f0b74fc2c82

Authored by Haibo Chen
1 parent c421756879

MLK-21176 mmc: correct the HS400 initialization process

After the commit b9a2a0e2e9c0 ("mmc: Add support for downgrading
HS200/HS400 to HS mode"), it add a parameter in mmc_set_card_speed()
which indicates that the HS200/HS400 to HS downgrade is happening.

During the HS400 initialization, first select to HS200, and config
the related clock rate, then downgrade to HS mode. So here also need
to config the downgrade value to be true, make sure in the function
mmc_set_card_speed(), after switch to HS mode, first config the
clock rate, then read the EXT_CSD. Otherwise read EXT_CSD in HS mode
at wrong clock rate, e.g. 200MHz, may lead to uncertain result.

Test on i.MX8QM MEK board, some Micron eMMC will stuck in transfer
mode in this case, and USDHC will never get data transfer complete
status, cause the uboot hang.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 0ba8e1c6efa2e9c34c9b54105d6c50ee293ec1d7)

Showing 1 changed file with 2 additions and 7 deletions Side-by-side Diff

... ... @@ -1924,8 +1924,7 @@
1924 1924 }
1925 1925  
1926 1926 /* Set back to HS */
1927   - mmc_set_card_speed(mmc, MMC_HS, false);
1928   - mmc_set_clock(mmc, mmc_mode2freq(mmc, MMC_HS), false);
  1927 + mmc_set_card_speed(mmc, MMC_HS, true);
1929 1928  
1930 1929 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
1931 1930 EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG);
1932 1931  
... ... @@ -1962,13 +1961,9 @@
1962 1961 {
1963 1962 int err;
1964 1963  
1965   - err = mmc_set_card_speed(mmc, MMC_HS, false);
  1964 + err = mmc_set_card_speed(mmc, MMC_HS, true);
1966 1965 if (err)
1967 1966 return err;
1968   -
1969   - /* configure the bus mode (host) */
1970   - mmc_select_mode(mmc, MMC_HS);
1971   - mmc_set_clock(mmc, mmc->tran_speed, false);
1972 1967  
1973 1968 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1974 1969 EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_8 |