Commit 8953d866644184e5b1088ab170a34d45a6f3c6dd
Committed by
Stefano Babic
1 parent
3baa9ec44a
Exists in
smarc_8mq_lf_v2020.04
and in
17 other branches
gpio: mxc: add i.MX8M support
Add i.MX8M GPIO support. There are 4 GPIO banks on i.MX8M. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
Showing 1 changed file with 15 additions and 7 deletions Side-by-side Diff
drivers/gpio/mxc_gpio.c
... | ... | @@ -41,13 +41,13 @@ |
41 | 41 | [2] = GPIO3_BASE_ADDR, |
42 | 42 | #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ |
43 | 43 | defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ |
44 | - defined(CONFIG_MX7) | |
44 | + defined(CONFIG_MX7) || defined(CONFIG_MX8M) | |
45 | 45 | [3] = GPIO4_BASE_ADDR, |
46 | 46 | #endif |
47 | 47 | #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ |
48 | - defined(CONFIG_MX7) | |
48 | + defined(CONFIG_MX7) || defined(CONFIG_MX8M) | |
49 | 49 | [4] = GPIO5_BASE_ADDR, |
50 | -#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) | |
50 | +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || defined(CONFIG_MX8M)) | |
51 | 51 | [5] = GPIO6_BASE_ADDR, |
52 | 52 | #endif |
53 | 53 | #endif |
54 | 54 | |
55 | 55 | |
56 | 56 | |
... | ... | @@ -349,13 +349,17 @@ |
349 | 349 | { 1, (struct gpio_regs *)GPIO2_BASE_ADDR }, |
350 | 350 | { 2, (struct gpio_regs *)GPIO3_BASE_ADDR }, |
351 | 351 | #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ |
352 | - defined(CONFIG_MX53) || defined(CONFIG_MX6) | |
352 | + defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ | |
353 | + defined(CONFIG_MX8M) | |
353 | 354 | { 3, (struct gpio_regs *)GPIO4_BASE_ADDR }, |
354 | 355 | #endif |
355 | -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) | |
356 | +#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ | |
357 | + defined(CONFIG_MX8M) | |
356 | 358 | { 4, (struct gpio_regs *)GPIO5_BASE_ADDR }, |
359 | +#ifndef CONFIG_MX8M | |
357 | 360 | { 5, (struct gpio_regs *)GPIO6_BASE_ADDR }, |
358 | 361 | #endif |
362 | +#endif | |
359 | 363 | #if defined(CONFIG_MX53) || defined(CONFIG_MX6) |
360 | 364 | { 6, (struct gpio_regs *)GPIO7_BASE_ADDR }, |
361 | 365 | #endif |
362 | 366 | |
363 | 367 | |
364 | 368 | |
... | ... | @@ -366,12 +370,16 @@ |
366 | 370 | { "gpio_mxc", &mxc_plat[1] }, |
367 | 371 | { "gpio_mxc", &mxc_plat[2] }, |
368 | 372 | #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ |
369 | - defined(CONFIG_MX53) || defined(CONFIG_MX6) | |
373 | + defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ | |
374 | + defined(CONFIG_MX8M) | |
370 | 375 | { "gpio_mxc", &mxc_plat[3] }, |
371 | 376 | #endif |
372 | -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) | |
377 | +#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ | |
378 | + defined(CONFIG_MX8M) | |
373 | 379 | { "gpio_mxc", &mxc_plat[4] }, |
380 | +#ifndef CONFIG_MX8M | |
374 | 381 | { "gpio_mxc", &mxc_plat[5] }, |
382 | +#endif | |
375 | 383 | #endif |
376 | 384 | #if defined(CONFIG_MX53) || defined(CONFIG_MX6) |
377 | 385 | { "gpio_mxc", &mxc_plat[6] }, |