Eric Lee / smarc-uboot

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Commit 8a681f4c5aa15db51ad0209734859c9fe7c29cfd

Authored by Levin Du
Committed by Kever Yang
1 parent 81fed78c0a
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

rockchip: rk3399: Add ROC-RK3399-PC support 

Add initial support for ROC-RK3399-PC board.

Specification
- Rockchip RK3399
- LPDDR4 4GiB
- eMMC slot
- SD card slot
- RTL8211E 1Gbps
- HDMI Out, DP, MIPI DSI/CSI, EDP
- PCIe M.2
- USB 2.0, USB-3.0
- USB C Type

Commit details of rk3399-roc-pc.dts sync from Linux v5.2:
"arm64: dts: rockchip: add support for ROC-RK3399-PC board"
(sha1: 8bb878cf20ae10809c36db96993bfce7026d062b)

Signed-off-by: Levin Du <djw@t-chip.com.cn>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Showing 5 changed files with 766 additions and 0 deletions Side-by-side Diff

arch/arm/dts/Makefile
Diff comments   View file @ 8a681f4
... ... @@ -119,6 +119,7 @@
119 119 rk3399-puma-ddr1333.dtb \
120 120 rk3399-puma-ddr1600.dtb \
121 121 rk3399-puma-ddr1866.dtb \
  122 + rk3399-roc-pc.dtb \
122 123 rk3399-rock-pi-4.dtb \
123 124 rk3399-rock960.dtb \
124 125 rk3399-rockpro64.dtb
arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
Diff comments   View file @ 8a681f4
  1 +// SPDX-License-Identifier: GPL-2.0+
  2 +/*
  3 + * Copyright (C) 2019 Levin Du <djw@t-chip.com.cn>
  4 + */
  5 +
  6 +#include "rk3399-u-boot.dtsi"
  7 +#include "rk3399-sdram-lpddr4-100.dtsi"
  8 +
  9 +/ {
  10 + chosen {
  11 + u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
  12 + };
  13 +};
  14 +
  15 +&vdd_log {
  16 + regulator-min-microvolt = <430000>;
  17 + regulator-init-microvolt = <950000>;
  18 +};
arch/arm/dts/rk3399-roc-pc.dts
Diff comments   View file @ 8a681f4
  1 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2 +/*
  3 + * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
  4 + */
  5 +
  6 +/dts-v1/;
  7 +#include <dt-bindings/pwm/pwm.h>
  8 +#include "rk3399.dtsi"
  9 +#include "rk3399-opp.dtsi"
  10 +
  11 +/ {
  12 + model = "Firefly ROC-RK3399-PC Board";
  13 + compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399";
  14 +
  15 + chosen {
  16 + stdout-path = "serial2:1500000n8";
  17 + };
  18 +
  19 + backlight: backlight {
  20 + compatible = "pwm-backlight";
  21 + pwms = <&pwm0 0 25000 0>;
  22 + };
  23 +
  24 + clkin_gmac: external-gmac-clock {
  25 + compatible = "fixed-clock";
  26 + clock-frequency = <125000000>;
  27 + clock-output-names = "clkin_gmac";
  28 + #clock-cells = <0>;
  29 + };
  30 +
  31 + sdio_pwrseq: sdio-pwrseq {
  32 + compatible = "mmc-pwrseq-simple";
  33 + clocks = <&rk808 1>;
  34 + clock-names = "ext_clock";
  35 + pinctrl-names = "default";
  36 + pinctrl-0 = <&wifi_enable_h>;
  37 +
  38 + /*
  39 + * On the module itself this is one of these (depending
  40 + * on the actual card populated):
  41 + * - SDIO_RESET_L_WL_REG_ON
  42 + * - PDN (power down when low)
  43 + */
  44 + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
  45 + };
  46 +
  47 + vcc_vbus_typec0: vcc-vbus-typec0 {
  48 + compatible = "regulator-fixed";
  49 + regulator-name = "vcc_vbus_typec0";
  50 + regulator-always-on;
  51 + regulator-boot-on;
  52 + regulator-min-microvolt = <5000000>;
  53 + regulator-max-microvolt = <5000000>;
  54 + };
  55 +
  56 + /*
  57 + * should be placed inside mp8859, but not until mp8859 has
  58 + * its own dt-binding.
  59 + */
  60 + vcc12v_sys: mp8859-dcdc1 {
  61 + compatible = "regulator-fixed";
  62 + regulator-name = "vcc12v_sys";
  63 + regulator-always-on;
  64 + regulator-boot-on;
  65 + regulator-min-microvolt = <12000000>;
  66 + regulator-max-microvolt = <12000000>;
  67 + vin-supply = <&vcc_vbus_typec0>;
  68 + };
  69 +
  70 + /* switched by pmic_sleep */
  71 + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
  72 + compatible = "regulator-fixed";
  73 + regulator-name = "vcc1v8_s3";
  74 + regulator-always-on;
  75 + regulator-boot-on;
  76 + regulator-min-microvolt = <1800000>;
  77 + regulator-max-microvolt = <1800000>;
  78 + vin-supply = <&vcc_1v8>;
  79 + };
  80 +
  81 + vcc3v3_sys: vcc3v3-sys {
  82 + compatible = "regulator-fixed";
  83 + regulator-name = "vcc3v3_sys";
  84 + regulator-always-on;
  85 + regulator-boot-on;
  86 + regulator-min-microvolt = <3300000>;
  87 + regulator-max-microvolt = <3300000>;
  88 + vin-supply = <&vcc12v_sys>;
  89 + };
  90 +
  91 + /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
  92 + vcc5v0_host: vcc5v0-host-regulator {
  93 + compatible = "regulator-fixed";
  94 + enable-active-high;
  95 + gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
  96 + pinctrl-names = "default";
  97 + pinctrl-0 = <&vcc5v0_host_en &hub_rst>;
  98 + regulator-name = "vcc5v0_host";
  99 + regulator-always-on;
  100 + vin-supply = <&vcc_sys>;
  101 + };
  102 +
  103 + vcc_vbus_typec1: vcc-vbus-typec1 {
  104 + compatible = "regulator-fixed";
  105 + enable-active-high;
  106 + gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
  107 + pinctrl-names = "default";
  108 + pinctrl-0 = <&vcc_vbus_typec1_en>;
  109 + regulator-name = "vcc_vbus_typec1";
  110 + regulator-always-on;
  111 + vin-supply = <&vcc_sys>;
  112 + };
  113 +
  114 + vcc_sys: vcc-sys {
  115 + compatible = "regulator-fixed";
  116 + regulator-name = "vcc_sys";
  117 + regulator-always-on;
  118 + regulator-boot-on;
  119 + regulator-min-microvolt = <5000000>;
  120 + regulator-max-microvolt = <5000000>;
  121 + vin-supply = <&vcc12v_sys>;
  122 + };
  123 +
  124 + vdd_log: vdd-log {
  125 + compatible = "pwm-regulator";
  126 + pwms = <&pwm2 0 25000 1>;
  127 + regulator-name = "vdd_log";
  128 + regulator-always-on;
  129 + regulator-boot-on;
  130 + regulator-min-microvolt = <800000>;
  131 + regulator-max-microvolt = <1400000>;
  132 + vin-supply = <&vcc3v3_sys>;
  133 + };
  134 +};
  135 +
  136 +&cpu_l0 {
  137 + cpu-supply = <&vdd_cpu_l>;
  138 +};
  139 +
  140 +&cpu_l1 {
  141 + cpu-supply = <&vdd_cpu_l>;
  142 +};
  143 +
  144 +&cpu_l2 {
  145 + cpu-supply = <&vdd_cpu_l>;
  146 +};
  147 +
  148 +&cpu_l3 {
  149 + cpu-supply = <&vdd_cpu_l>;
  150 +};
  151 +
  152 +&cpu_b0 {
  153 + cpu-supply = <&vdd_cpu_b>;
  154 +};
  155 +
  156 +&cpu_b1 {
  157 + cpu-supply = <&vdd_cpu_b>;
  158 +};
  159 +
  160 +&emmc_phy {
  161 + status = "okay";
  162 +};
  163 +
  164 +&gmac {
  165 + assigned-clocks = <&cru SCLK_RMII_SRC>;
  166 + assigned-clock-parents = <&clkin_gmac>;
  167 + clock_in_out = "input";
  168 + phy-supply = <&vcc_lan>;
  169 + phy-mode = "rgmii";
  170 + pinctrl-names = "default";
  171 + pinctrl-0 = <&rgmii_pins>;
  172 + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
  173 + snps,reset-active-low;
  174 + snps,reset-delays-us = <0 10000 50000>;
  175 + tx_delay = <0x28>;
  176 + rx_delay = <0x11>;
  177 + status = "okay";
  178 +};
  179 +
  180 +&hdmi {
  181 + ddc-i2c-bus = <&i2c3>;
  182 + pinctrl-names = "default";
  183 + pinctrl-0 = <&hdmi_cec>;
  184 + status = "okay";
  185 +};
  186 +
  187 +&i2c0 {
  188 + clock-frequency = <400000>;
  189 + i2c-scl-rising-time-ns = <168>;
  190 + i2c-scl-falling-time-ns = <4>;
  191 + status = "okay";
  192 +
  193 + rk808: pmic@1b {
  194 + compatible = "rockchip,rk808";
  195 + reg = <0x1b>;
  196 + interrupt-parent = <&gpio1>;
  197 + interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
  198 + #clock-cells = <1>;
  199 + clock-output-names = "xin32k", "rk808-clkout2";
  200 + pinctrl-names = "default";
  201 + pinctrl-0 = <&pmic_int_l>;
  202 + rockchip,system-power-controller;
  203 + wakeup-source;
  204 +
  205 + vcc1-supply = <&vcc3v3_sys>;
  206 + vcc2-supply = <&vcc3v3_sys>;
  207 + vcc3-supply = <&vcc3v3_sys>;
  208 + vcc4-supply = <&vcc3v3_sys>;
  209 + vcc6-supply = <&vcc3v3_sys>;
  210 + vcc7-supply = <&vcc3v3_sys>;
  211 + vcc8-supply = <&vcc3v3_sys>;
  212 + vcc9-supply = <&vcc3v3_sys>;
  213 + vcc10-supply = <&vcc3v3_sys>;
  214 + vcc11-supply = <&vcc3v3_sys>;
  215 + vcc12-supply = <&vcc3v3_sys>;
  216 + vddio-supply = <&vcc1v8_pmu>;
  217 +
  218 + regulators {
  219 + vdd_center: DCDC_REG1 {
  220 + regulator-name = "vdd_center";
  221 + regulator-always-on;
  222 + regulator-boot-on;
  223 + regulator-min-microvolt = <750000>;
  224 + regulator-max-microvolt = <1350000>;
  225 + regulator-ramp-delay = <6001>;
  226 + regulator-state-mem {
  227 + regulator-off-in-suspend;
  228 + };
  229 + };
  230 +
  231 + vdd_cpu_l: DCDC_REG2 {
  232 + regulator-name = "vdd_cpu_l";
  233 + regulator-always-on;
  234 + regulator-boot-on;
  235 + regulator-min-microvolt = <750000>;
  236 + regulator-max-microvolt = <1350000>;
  237 + regulator-ramp-delay = <6001>;
  238 + regulator-state-mem {
  239 + regulator-off-in-suspend;
  240 + };
  241 + };
  242 +
  243 + vcc_ddr: DCDC_REG3 {
  244 + regulator-name = "vcc_ddr";
  245 + regulator-always-on;
  246 + regulator-boot-on;
  247 + regulator-state-mem {
  248 + regulator-on-in-suspend;
  249 + };
  250 + };
  251 +
  252 + vcc_1v8: DCDC_REG4 {
  253 + regulator-name = "vcc_1v8";
  254 + regulator-always-on;
  255 + regulator-boot-on;
  256 + regulator-min-microvolt = <1800000>;
  257 + regulator-max-microvolt = <1800000>;
  258 + regulator-state-mem {
  259 + regulator-on-in-suspend;
  260 + regulator-suspend-microvolt = <1800000>;
  261 + };
  262 + };
  263 +
  264 + vcca1v8_codec: LDO_REG1 {
  265 + regulator-name = "vcca1v8_codec";
  266 + regulator-always-on;
  267 + regulator-boot-on;
  268 + regulator-min-microvolt = <1800000>;
  269 + regulator-max-microvolt = <1800000>;
  270 + regulator-state-mem {
  271 + regulator-off-in-suspend;
  272 + };
  273 + };
  274 +
  275 + vcc1v8_hdmi: LDO_REG2 {
  276 + regulator-name = "vcc1v8_hdmi";
  277 + regulator-always-on;
  278 + regulator-boot-on;
  279 + regulator-min-microvolt = <1800000>;
  280 + regulator-max-microvolt = <1800000>;
  281 + regulator-state-mem {
  282 + regulator-off-in-suspend;
  283 + };
  284 + };
  285 +
  286 + vcc1v8_pmu: LDO_REG3 {
  287 + regulator-name = "vcc1v8_pmu";
  288 + regulator-always-on;
  289 + regulator-boot-on;
  290 + regulator-min-microvolt = <1800000>;
  291 + regulator-max-microvolt = <1800000>;
  292 + regulator-state-mem {
  293 + regulator-on-in-suspend;
  294 + regulator-suspend-microvolt = <1800000>;
  295 + };
  296 + };
  297 +
  298 + vcc_sdio: LDO_REG4 {
  299 + regulator-name = "vcc_sdio";
  300 + regulator-always-on;
  301 + regulator-boot-on;
  302 + regulator-min-microvolt = <1800000>;
  303 + regulator-max-microvolt = <3000000>;
  304 + regulator-state-mem {
  305 + regulator-on-in-suspend;
  306 + regulator-suspend-microvolt = <3000000>;
  307 + };
  308 + };
  309 +
  310 + vcca3v0_codec: LDO_REG5 {
  311 + regulator-name = "vcca3v0_codec";
  312 + regulator-always-on;
  313 + regulator-boot-on;
  314 + regulator-min-microvolt = <3000000>;
  315 + regulator-max-microvolt = <3000000>;
  316 + regulator-state-mem {
  317 + regulator-off-in-suspend;
  318 + };
  319 + };
  320 +
  321 + vcc_1v5: LDO_REG6 {
  322 + regulator-name = "vcc_1v5";
  323 + regulator-always-on;
  324 + regulator-boot-on;
  325 + regulator-min-microvolt = <1500000>;
  326 + regulator-max-microvolt = <1500000>;
  327 + regulator-state-mem {
  328 + regulator-on-in-suspend;
  329 + regulator-suspend-microvolt = <1500000>;
  330 + };
  331 + };
  332 +
  333 + vcca0v9_hdmi: LDO_REG7 {
  334 + regulator-name = "vcca0v9_hdmi";
  335 + regulator-always-on;
  336 + regulator-boot-on;
  337 + regulator-min-microvolt = <900000>;
  338 + regulator-max-microvolt = <900000>;
  339 + regulator-state-mem {
  340 + regulator-off-in-suspend;
  341 + };
  342 + };
  343 +
  344 + vcc_3v0: LDO_REG8 {
  345 + regulator-name = "vcc_3v0";
  346 + regulator-always-on;
  347 + regulator-boot-on;
  348 + regulator-min-microvolt = <3000000>;
  349 + regulator-max-microvolt = <3000000>;
  350 + regulator-state-mem {
  351 + regulator-on-in-suspend;
  352 + regulator-suspend-microvolt = <3000000>;
  353 + };
  354 + };
  355 +
  356 + vcc3v3_s3: vcc_lan: SWITCH_REG1 {
  357 + regulator-name = "vcc3v3_s3";
  358 + regulator-always-on;
  359 + regulator-boot-on;
  360 + regulator-state-mem {
  361 + regulator-off-in-suspend;
  362 + };
  363 + };
  364 +
  365 + vcc3v3_s0: SWITCH_REG2 {
  366 + regulator-name = "vcc3v3_s0";
  367 + regulator-always-on;
  368 + regulator-boot-on;
  369 + regulator-state-mem {
  370 + regulator-off-in-suspend;
  371 + };
  372 + };
  373 + };
  374 + };
  375 +
  376 + vdd_cpu_b: regulator@40 {
  377 + compatible = "silergy,syr827";
  378 + reg = <0x40>;
  379 + fcs,suspend-voltage-selector = <1>;
  380 + pinctrl-names = "default";
  381 + pinctrl-0 = <&vsel1_gpio>;
  382 + regulator-name = "vdd_cpu_b";
  383 + regulator-min-microvolt = <712500>;
  384 + regulator-max-microvolt = <1500000>;
  385 + regulator-ramp-delay = <1000>;
  386 + regulator-always-on;
  387 + regulator-boot-on;
  388 + vin-supply = <&vcc3v3_sys>;
  389 +
  390 + regulator-state-mem {
  391 + regulator-off-in-suspend;
  392 + };
  393 + };
  394 +
  395 + vdd_gpu: regulator@41 {
  396 + compatible = "silergy,syr828";
  397 + reg = <0x41>;
  398 + fcs,suspend-voltage-selector = <1>;
  399 + pinctrl-names = "default";
  400 + pinctrl-0 = <&vsel2_gpio>;
  401 + regulator-name = "vdd_gpu";
  402 + regulator-min-microvolt = <712500>;
  403 + regulator-max-microvolt = <1500000>;
  404 + regulator-ramp-delay = <1000>;
  405 + regulator-always-on;
  406 + regulator-boot-on;
  407 + vin-supply = <&vcc3v3_sys>;
  408 +
  409 + regulator-state-mem {
  410 + regulator-off-in-suspend;
  411 + };
  412 + };
  413 +};
  414 +
  415 +&i2c1 {
  416 + i2c-scl-rising-time-ns = <300>;
  417 + i2c-scl-falling-time-ns = <15>;
  418 + status = "okay";
  419 +};
  420 +
  421 +&i2c3 {
  422 + i2c-scl-rising-time-ns = <450>;
  423 + i2c-scl-falling-time-ns = <15>;
  424 + status = "okay";
  425 +};
  426 +
  427 +&i2c4 {
  428 + i2c-scl-rising-time-ns = <600>;
  429 + i2c-scl-falling-time-ns = <20>;
  430 + status = "okay";
  431 +
  432 + fusb1: usb-typec@22 {
  433 + compatible = "fcs,fusb302";
  434 + reg = <0x22>;
  435 + interrupt-parent = <&gpio1>;
  436 + interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
  437 + pinctrl-names = "default";
  438 + pinctrl-0 = <&fusb1_int>;
  439 + vbus-supply = <&vcc_vbus_typec1>;
  440 + status = "okay";
  441 + };
  442 +};
  443 +
  444 +&i2c7 {
  445 + i2c-scl-rising-time-ns = <600>;
  446 + i2c-scl-falling-time-ns = <20>;
  447 + status = "okay";
  448 +
  449 + fusb0: usb-typec@22 {
  450 + compatible = "fcs,fusb302";
  451 + reg = <0x22>;
  452 + interrupt-parent = <&gpio1>;
  453 + interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
  454 + pinctrl-names = "default";
  455 + pinctrl-0 = <&fusb0_int>;
  456 + vbus-supply = <&vcc_vbus_typec0>;
  457 + status = "okay";
  458 + };
  459 +};
  460 +
  461 +&i2s0 {
  462 + rockchip,playback-channels = <8>;
  463 + rockchip,capture-channels = <8>;
  464 + status = "okay";
  465 +};
  466 +
  467 +&i2s1 {
  468 + rockchip,playback-channels = <2>;
  469 + rockchip,capture-channels = <2>;
  470 + status = "okay";
  471 +};
  472 +
  473 +&i2s2 {
  474 + status = "okay";
  475 +};
  476 +
  477 +&io_domains {
  478 + audio-supply = <&vcca1v8_codec>;
  479 + bt656-supply = <&vcc_3v0>;
  480 + gpio1830-supply = <&vcc_3v0>;
  481 + sdmmc-supply = <&vcc_sdio>;
  482 + status = "okay";
  483 +};
  484 +
  485 +&pmu_io_domains {
  486 + pmu1830-supply = <&vcc_3v0>;
  487 + status = "okay";
  488 +};
  489 +
  490 +&pinctrl {
  491 + lcd-panel {
  492 + lcd_panel_reset: lcd-panel-reset {
  493 + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
  494 + };
  495 + };
  496 +
  497 + pmic {
  498 + vsel1_gpio: vsel1-gpio {
  499 + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
  500 + };
  501 +
  502 + vsel2_gpio: vsel2-gpio {
  503 + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
  504 + };
  505 + };
  506 +
  507 + sdio-pwrseq {
  508 + wifi_enable_h: wifi-enable-h {
  509 + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
  510 + };
  511 + };
  512 +
  513 + pmic {
  514 + pmic_int_l: pmic-int-l {
  515 + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
  516 + };
  517 + };
  518 +
  519 + usb2 {
  520 + vcc5v0_host_en: vcc5v0-host-en {
  521 + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
  522 + };
  523 +
  524 + hub_rst: hub-rst {
  525 + rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_output_high>;
  526 + };
  527 + };
  528 +
  529 + usb-typec {
  530 + vcc_vbus_typec1_en: vcc-vbus-typec1-en {
  531 + rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
  532 + };
  533 + };
  534 +
  535 + fusb30x {
  536 + fusb0_int: fusb0-int {
  537 + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
  538 + };
  539 +
  540 + fusb1_int: fusb1-int {
  541 + rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
  542 + };
  543 + };
  544 +};
  545 +
  546 +&pwm0 {
  547 + status = "okay";
  548 +};
  549 +
  550 +&pwm2 {
  551 + status = "okay";
  552 +};
  553 +
  554 +&saradc {
  555 + vref-supply = <&vcca1v8_s3>;
  556 + status = "okay";
  557 +};
  558 +
  559 +&sdmmc {
  560 + bus-width = <4>;
  561 + cap-mmc-highspeed;
  562 + cap-sd-highspeed;
  563 + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
  564 + disable-wp;
  565 + max-frequency = <150000000>;
  566 + pinctrl-names = "default";
  567 + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
  568 + status = "okay";
  569 +};
  570 +
  571 +&sdhci {
  572 + bus-width = <8>;
  573 + mmc-hs400-1_8v;
  574 + mmc-hs400-enhanced-strobe;
  575 + non-removable;
  576 + status = "okay";
  577 +};
  578 +
  579 +&tcphy0 {
  580 + status = "okay";
  581 +};
  582 +
  583 +&tcphy1 {
  584 + status = "okay";
  585 +};
  586 +
  587 +&tsadc {
  588 + /* tshut mode 0:CRU 1:GPIO */
  589 + rockchip,hw-tshut-mode = <1>;
  590 + /* tshut polarity 0:LOW 1:HIGH */
  591 + rockchip,hw-tshut-polarity = <1>;
  592 + status = "okay";
  593 +};
  594 +
  595 +&u2phy0 {
  596 + status = "okay";
  597 +
  598 + u2phy0_otg: otg-port {
  599 + phy-supply = <&vcc_vbus_typec0>;
  600 + status = "okay";
  601 + };
  602 +
  603 + u2phy0_host: host-port {
  604 + phy-supply = <&vcc5v0_host>;
  605 + status = "okay";
  606 + };
  607 +};
  608 +
  609 +&u2phy1 {
  610 + status = "okay";
  611 +
  612 + u2phy1_otg: otg-port {
  613 + phy-supply = <&vcc_vbus_typec1>;
  614 + status = "okay";
  615 + };
  616 +
  617 + u2phy1_host: host-port {
  618 + phy-supply = <&vcc5v0_host>;
  619 + status = "okay";
  620 + };
  621 +};
  622 +
  623 +&uart0 {
  624 + pinctrl-names = "default";
  625 + pinctrl-0 = <&uart0_xfer &uart0_cts>;
  626 + status = "okay";
  627 +};
  628 +
  629 +&uart2 {
  630 + status = "okay";
  631 +};
  632 +
  633 +&usb_host0_ehci {
  634 + status = "okay";
  635 +};
  636 +
  637 +&usb_host0_ohci {
  638 + status = "okay";
  639 +};
  640 +
  641 +&usb_host1_ehci {
  642 + status = "okay";
  643 +};
  644 +
  645 +&usb_host1_ohci {
  646 + status = "okay";
  647 +};
  648 +
  649 +&usbdrd3_0 {
  650 + status = "okay";
  651 +};
  652 +
  653 +&usbdrd_dwc3_0 {
  654 + status = "okay";
  655 +};
  656 +
  657 +&usbdrd3_1 {
  658 + status = "okay";
  659 +};
  660 +
  661 +&usbdrd_dwc3_1 {
  662 + status = "okay";
  663 + dr_mode = "host";
  664 +};
  665 +
  666 +&vopb {
  667 + status = "okay";
  668 +};
  669 +
  670 +&vopb_mmu {
  671 + status = "okay";
  672 +};
  673 +
  674 +&vopl {
  675 + status = "okay";
  676 +};
  677 +
  678 +&vopl_mmu {
  679 + status = "okay";
  680 +};
board/rockchip/evb_rk3399/MAINTAINERS
Diff comments   View file @ 8a681f4
... ... @@ -49,6 +49,12 @@
49 49 F: arch/arm/dts/rk3399-u-boot.dtsi
50 50 F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi
51 51  
  52 +ROC-RK3399-PC
  53 +M: Levin Du <djw@t-chip.com.cn>
  54 +S: Maintained
  55 +F: configs/roc-rk3399-pc_defconfig
  56 +F: arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
  57 +
52 58 ROCK-PI-4
53 59 M: Akash Gajjar <akash@openedev.com>
54 60 M: Jagan Teki <jagan@amarulasolutions.com>
configs/roc-rk3399-pc_defconfig
Diff comments   View file @ 8a681f4
  1 +CONFIG_ARM=y
  2 +CONFIG_ARCH_ROCKCHIP=y
  3 +CONFIG_SYS_TEXT_BASE=0x00200000
  4 +CONFIG_SPL_LIBCOMMON_SUPPORT=y
  5 +CONFIG_SPL_LIBGENERIC_SUPPORT=y
  6 +CONFIG_SYS_MALLOC_F_LEN=0x4000
  7 +CONFIG_ROCKCHIP_RK3399=y
  8 +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
  9 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
  10 +CONFIG_DEBUG_UART_CLOCK=24000000
  11 +CONFIG_SPL_STACK_R_ADDR=0x80000
  12 +CONFIG_DEBUG_UART=y
  13 +CONFIG_NR_DRAM_BANKS=1
  14 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
  15 +# CONFIG_DISPLAY_CPUINFO is not set
  16 +CONFIG_DISPLAY_BOARDINFO_LATE=y
  17 +CONFIG_SPL_STACK_R=y
  18 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
  19 +CONFIG_CMD_BOOTZ=y
  20 +CONFIG_CMD_GPT=y
  21 +CONFIG_CMD_MMC=y
  22 +CONFIG_CMD_SF=y
  23 +CONFIG_CMD_USB=y
  24 +# CONFIG_CMD_SETEXPR is not set
  25 +CONFIG_CMD_TIME=y
  26 +CONFIG_SPL_OF_CONTROL=y
  27 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
  28 +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
  29 +CONFIG_TPL=y
  30 +CONFIG_ENV_IS_IN_MMC=y
  31 +CONFIG_RAM_RK3399_LPDDR4=y
  32 +CONFIG_ROCKCHIP_GPIO=y
  33 +CONFIG_SYS_I2C_ROCKCHIP=y
  34 +CONFIG_MMC_DW=y
  35 +CONFIG_MMC_DW_ROCKCHIP=y
  36 +CONFIG_MMC_SDHCI=y
  37 +CONFIG_MMC_SDHCI_ROCKCHIP=y
  38 +CONFIG_DM_ETH=y
  39 +CONFIG_ETH_DESIGNWARE=y
  40 +CONFIG_GMAC_ROCKCHIP=y
  41 +CONFIG_PMIC_RK8XX=y
  42 +CONFIG_REGULATOR_PWM=y
  43 +CONFIG_REGULATOR_RK8XX=y
  44 +CONFIG_PWM_ROCKCHIP=y
  45 +CONFIG_BAUDRATE=1500000
  46 +CONFIG_DEBUG_UART_SHIFT=2
  47 +CONFIG_SYSRESET=y
  48 +CONFIG_USB=y
  49 +CONFIG_USB_XHCI_HCD=y
  50 +CONFIG_USB_XHCI_DWC3=y
  51 +CONFIG_USB_EHCI_HCD=y
  52 +CONFIG_USB_EHCI_GENERIC=y
  53 +CONFIG_USB_HOST_ETHER=y
  54 +CONFIG_USB_ETHER_ASIX=y
  55 +CONFIG_USB_ETHER_ASIX88179=y
  56 +CONFIG_USB_ETHER_MCS7830=y
  57 +CONFIG_USB_ETHER_RTL8152=y
  58 +CONFIG_USB_ETHER_SMSC95XX=y
  59 +CONFIG_USE_TINY_PRINTF=y
  60 +CONFIG_SPL_TINY_MEMSET=y
  61 +CONFIG_ERRNO_STR=y