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Commit 8a8f084e4ffa0e2357790cd92b69301eaeb2834d

Authored by Chandan Nath
Committed by Albert ARIBAUD
1 parent 876bdd6d46
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ARM:AM33XX: Add SPL support for AM335X EVM 

This patch is added to support SPL feature on AM335X
platform. In this patch, MMC1 is configured as boot
device for SPL and support for other devices will be
added in the next patch series.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>

Showing 17 changed files with 252 additions and 143 deletions Side-by-side Diff

arch/arm/cpu/armv7/am33xx/Makefile
Diff comments   View file @ 8a8f084
... ... @@ -16,8 +16,6 @@
16 16  
17 17 LIB = $(obj)lib$(SOC).o
18 18  
19   -SOBJS := lowlevel_init.o
20   -
21 19 COBJS += clock.o
22 20 COBJS += sys_info.o
23 21 COBJS += ddr.o
arch/arm/cpu/armv7/am33xx/board.c
Diff comments   View file @ 8a8f084
... ... @@ -19,19 +19,31 @@
19 19 #include <common.h>
20 20 #include <asm/arch/cpu.h>
21 21 #include <asm/arch/hardware.h>
  22 +#include <asm/arch/omap.h>
22 23 #include <asm/arch/ddr_defs.h>
23 24 #include <asm/arch/clock.h>
  25 +#include <asm/arch/mmc_host_def.h>
  26 +#include <asm/arch/common_def.h>
24 27 #include <asm/io.h>
  28 +#include <asm/omap_common.h>
25 29  
26 30 DECLARE_GLOBAL_DATA_PTR;
27 31  
28 32 struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
29 33 struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
  34 +struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
30 35  
  36 +/* UART Defines */
  37 +#ifdef CONFIG_SPL_BUILD
  38 +#define UART_RESET (0x1 << 1)
  39 +#define UART_CLK_RUNNING_MASK 0x1
  40 +#define UART_SMART_IDLE_EN (0x1 << 0x3)
  41 +#endif
  42 +
31 43 /*
32 44 * early system init of muxing and clocks.
33 45 */
34   -void s_init(u32 in_ddr)
  46 +void s_init(void)
35 47 {
36 48 /* WDT1 is already running when the bootloader gets control
37 49 * Disable it to avoid "random" resets
38 50  
39 51  
40 52  
... ... @@ -43,12 +55,37 @@
43 55 while (readl(&wdtimer->wdtwwps) != 0x0)
44 56 ;
45 57  
  58 +#ifdef CONFIG_SPL_BUILD
46 59 /* Setup the PLLs and the clocks for the peripherals */
47   -#ifdef CONFIG_SETUP_PLL
48 60 pll_init();
  61 +
  62 + /* UART softreset */
  63 + u32 regVal;
  64 +
  65 + enable_uart0_pin_mux();
  66 +
  67 + regVal = readl(&uart_base->uartsyscfg);
  68 + regVal |= UART_RESET;
  69 + writel(regVal, &uart_base->uartsyscfg);
  70 + while ((readl(&uart_base->uartsyssts) &
  71 + UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
  72 + ;
  73 +
  74 + /* Disable smart idle */
  75 + regVal = readl(&uart_base->uartsyscfg);
  76 + regVal |= UART_SMART_IDLE_EN;
  77 + writel(regVal, &uart_base->uartsyscfg);
  78 +
  79 + /* Initialize the Timer */
  80 + init_timer();
  81 +
  82 + preloader_console_init();
  83 +
  84 + config_ddr();
49 85 #endif
50   - if (!in_ddr)
51   - config_ddr();
  86 +
  87 + /* Enable MMC0 */
  88 + enable_mmc0_pin_mux();
52 89 }
53 90  
54 91 /* Initialize timer */
... ... @@ -71,4 +108,10 @@
71 108 return omap_mmc_init(0);
72 109 }
73 110 #endif
  111 +
  112 +void setup_clocks_for_console(void)
  113 +{
  114 + /* Not yet implemented */
  115 + return;
  116 +}
arch/arm/cpu/armv7/am33xx/config.mk
Diff comments   View file @ 8a8f084
  1 +#
  2 +# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  3 +#
  4 +# This program is free software; you can redistribute it and/or
  5 +# modify it under the terms of the GNU General Public License as
  6 +# published by the Free Software Foundation; either version 2 of
  7 +# the License, or (at your option) any later version.
  8 +#
  9 +# This program is distributed "as is" WITHOUT ANY WARRANTY of any
  10 +# kind, whether express or implied; without even the implied warranty
  11 +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12 +# GNU General Public License for more details.
  13 +#
  14 +ifdef CONFIG_SPL_BUILD
  15 +ALL-y += $(OBJTREE)/MLO
  16 +else
  17 +ALL-y += $(obj)u-boot.img
  18 +endif
arch/arm/cpu/armv7/am33xx/emif4.c
Diff comments   View file @ 8a8f084
... ... @@ -46,7 +46,7 @@
46 46 }
47 47  
48 48  
49   -#ifdef CONFIG_AM335X_CONFIG_DDR
  49 +#ifdef CONFIG_SPL_BUILD
50 50 static void data_macro_config(int dataMacroNum)
51 51 {
52 52 struct ddr_data data;
arch/arm/cpu/armv7/am33xx/lowlevel_init.S
View file @ 8a8f084
1   -/*
2   - * lowlevel_init.S
3   - *
4   - * AM33XX low level initialization.
5   - *
6   - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7   - *
8   - * Initial Code by:
9   - * Mansoor Ahamed <mansoor.ahamed@ti.com>
10   - *
11   - * This program is free software; you can redistribute it and/or
12   - * modify it under the terms of the GNU General Public License as
13   - * published by the Free Software Foundation; either version 2 of
14   - * the License, or (at your option) any later version.
15   - *
16   - * This program is distributed "as is" WITHOUT ANY WARRANTY of any
17   - * kind, whether express or implied; without even the implied warranty
18   - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19   - * GNU General Public License for more details.
20   - */
21   -
22   -#include <config.h>
23   -#include <asm/arch/hardware.h>
24   -
25   -_mark1:
26   - .word mark1
27   -_lowlevel_init1:
28   - .word lowlevel_init
29   -_s_init_start:
30   - .word s_init_start
31   -
32   -_TEXT_BASE:
33   - .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
34   -
35   -/*****************************************************************************
36   - * lowlevel_init: - Platform low level init.
37   - ****************************************************************************/
38   -.globl lowlevel_init
39   -lowlevel_init:
40   -
41   - /* The link register is saved in ip by start.S */
42   - mov r6, ip
43   - /* check if we are already running from RAM */
44   - ldr r2, _lowlevel_init1
45   - ldr r3, _TEXT_BASE
46   - sub r4, r2, r3
47   - sub r0, pc, r4
48   - ldr sp, SRAM_STACK
49   -mark1:
50   - ldr r5, _mark1
51   - sub r5, r5, r2 /* bytes between mark1 and lowlevel_init */
52   - sub r0, r0, r5 /* r0 <- _start w.r.t current place of execution */
53   - mov r10, #0x0 /* r10 has in_ddr used by s_init() */
54   -
55   - ands r0, r0, #0xC0000000
56   - /* MSB 2 bits <> 0 then we are in ocmc or DDR */
57   - cmp r0, #0x80000000
58   - bne s_init_start
59   - mov r10, #0x01
60   - b s_init_start
61   -
62   -s_init_start:
63   - mov r0, r10 /* passing in_ddr in r0 */
64   - bl s_init
65   - /* back to arch calling code */
66   - mov pc, r6
67   - /* the literal pools origin */
68   - .ltorg
69   -
70   -SRAM_STACK:
71   - /* Place stack at the top */
72   - .word LOW_LEVEL_SRAM_STACK
arch/arm/cpu/armv7/omap-common/Makefile
Diff comments   View file @ 8a8f084
... ... @@ -37,6 +37,10 @@
37 37 COBJS += hwinit-common.o
38 38 COBJS += clocks-common.o
39 39 COBJS += emif-common.o
  40 +endif
  41 +
  42 +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
  43 +COBJS += boot-common.o
40 44 SOBJS += lowlevel_init.o
41 45 endif
42 46  
arch/arm/cpu/armv7/omap-common/boot-common.c
Diff comments   View file @ 8a8f084
  1 +/*
  2 + * boot-common.c
  3 + *
  4 + * Common bootmode functions for omap based boards
  5 + *
  6 + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  7 + *
  8 + * This program is free software; you can redistribute it and/or
  9 + * modify it under the terms of the GNU General Public License as
  10 + * published by the Free Software Foundation; either version 2 of
  11 + * the License, or (at your option) any later version.
  12 + *
  13 + * This program is distributed in the hope that it will be useful,
  14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
  16 + * GNU General Public License for more details.
  17 + */
  18 +
  19 +#include <common.h>
  20 +#include <asm/omap_common.h>
  21 +#include <asm/arch/omap.h>
  22 +
  23 +/*
  24 + * This is used to verify if the configuration header
  25 + * was executed by rom code prior to control of transfer
  26 + * to the bootloader. SPL is responsible for saving and
  27 + * passing the boot_params pointer to the u-boot.
  28 + */
  29 +struct omap_boot_parameters boot_params __attribute__ ((section(".data")));
  30 +
  31 +#ifdef CONFIG_SPL_BUILD
  32 +/*
  33 + * We use static variables because global data is not ready yet.
  34 + * Initialized data is available in SPL right from the beginning.
  35 + * We would not typically need to save these parameters in regular
  36 + * U-Boot. This is needed only in SPL at the moment.
  37 + */
  38 +u32 omap_bootmode = MMCSD_MODE_FAT;
  39 +
  40 +u32 omap_boot_device(void)
  41 +{
  42 + return (u32) (boot_params.omap_bootdevice);
  43 +}
  44 +
  45 +u32 omap_boot_mode(void)
  46 +{
  47 + return omap_bootmode;
  48 +}
  49 +#endif
arch/arm/cpu/armv7/omap-common/hwinit-common.c
Diff comments   View file @ 8a8f084
... ... @@ -35,34 +35,6 @@
35 35  
36 36 DECLARE_GLOBAL_DATA_PTR;
37 37  
38   -/*
39   - * This is used to verify if the configuration header
40   - * was executed by rom code prior to control of transfer
41   - * to the bootloader. SPL is responsible for saving and
42   - * passing the boot_params pointer to the u-boot.
43   - */
44   -struct omap_boot_parameters boot_params __attribute__ ((section(".data")));
45   -
46   -#ifdef CONFIG_SPL_BUILD
47   -/*
48   - * We use static variables because global data is not ready yet.
49   - * Initialized data is available in SPL right from the beginning.
50   - * We would not typically need to save these parameters in regular
51   - * U-Boot. This is needed only in SPL at the moment.
52   - */
53   -u32 omap_bootmode = MMCSD_MODE_FAT;
54   -
55   -u32 omap_boot_device(void)
56   -{
57   - return (u32) (boot_params.omap_bootdevice);
58   -}
59   -
60   -u32 omap_boot_mode(void)
61   -{
62   - return omap_bootmode;
63   -}
64   -#endif
65   -
66 38 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
67 39 {
68 40 int i;
arch/arm/include/asm/arch-am33xx/common_def.h
Diff comments   View file @ 8a8f084
  1 +/*
  2 + * common_def.h
  3 + *
  4 + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  5 + *
  6 + * This program is free software; you can redistribute it and/or
  7 + * modify it under the terms of the GNU General Public License as
  8 + * published by the Free Software Foundation version 2.
  9 + *
  10 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11 + * kind, whether express or implied; without even the implied warranty
  12 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13 + * GNU General Public License for more details.
  14 + */
  15 +
  16 +#ifndef __COMMON_DEF_H__
  17 +#define __COMMON_DEF_H__
  18 +
  19 +extern void enable_uart0_pin_mux(void);
  20 +extern void enable_mmc0_pin_mux(void);
  21 +
  22 +#endif/*__COMMON_DEF_H__ */
arch/arm/include/asm/arch-am33xx/omap.h
Diff comments   View file @ 8a8f084
  1 +/*
  2 + * omap.h
  3 + *
  4 + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  5 + *
  6 + * Author:
  7 + * Chandan Nath <chandan.nath@ti.com>
  8 + *
  9 + * Derived from OMAP4 work by
  10 + * Aneesh V <aneesh@ti.com>
  11 + *
  12 + * This program is free software; you can redistribute it and/or
  13 + * modify it under the terms of the GNU General Public License as
  14 + * published by the Free Software Foundation; either version 2 of
  15 + * the License, or (at your option) any later version.
  16 + *
  17 + * This program is distributed in the hope that it will be useful,
  18 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
  20 + * GNU General Public License for more details.
  21 + */
  22 +
  23 +#ifndef _OMAP_H_
  24 +#define _OMAP_H_
  25 +
  26 +/*
  27 + * Non-secure SRAM Addresses
  28 + * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE
  29 + * at 0x40304000(EMU base) so that our code works for both EMU and GP
  30 + */
  31 +#define NON_SECURE_SRAM_START 0x40304000
  32 +#define NON_SECURE_SRAM_END 0x4030E000
  33 +#define LOW_LEVEL_SRAM_STACK 0x4030B7FC
  34 +
  35 +/* ROM code defines */
  36 +/* Boot device */
  37 +#define BOOT_DEVICE_MASK 0xFF
  38 +#define BOOT_DEVICE_OFFSET 0x8
  39 +#define DEV_DESC_PTR_OFFSET 0x4
  40 +#define DEV_DATA_PTR_OFFSET 0x18
  41 +#define BOOT_MODE_OFFSET 0x8
  42 +#define RESET_REASON_OFFSET 0x9
  43 +#define CH_FLAGS_OFFSET 0xA
  44 +
  45 +#define CH_FLAGS_CHSETTINGS (0x1 << 0)
  46 +#define CH_FLAGS_CHRAM (0x1 << 1)
  47 +#define CH_FLAGS_CHFLASH (0x1 << 2)
  48 +#define CH_FLAGS_CHMMCSD (0x1 << 3)
  49 +
  50 +#ifndef __ASSEMBLY__
  51 +struct omap_boot_parameters {
  52 + char *boot_message;
  53 + unsigned int mem_boot_descriptor;
  54 + unsigned char omap_bootdevice;
  55 + unsigned char reset_reason;
  56 + unsigned char ch_flags;
  57 +};
  58 +#endif
  59 +#endif
arch/arm/include/asm/arch-am33xx/sys_proto.h
Diff comments   View file @ 8a8f084
... ... @@ -29,5 +29,6 @@
29 29 #endif
30 30  
31 31 u32 get_device_type(void);
  32 +void setup_clocks_for_console(void);
32 33 #endif
arch/arm/include/asm/omap_common.h
Diff comments   View file @ 8a8f084
... ... @@ -62,6 +62,11 @@
62 62 #define BOOT_DEVICE_MMC2 5 /*emmc*/
63 63 #define BOOT_DEVICE_MMC1 6
64 64 #define BOOT_DEVICE_XIPWAIT 7
  65 +#elif defined(CONFIG_AM33XX) /* AM33XX */
  66 +#define BOOT_DEVICE_NAND 5
  67 +#define BOOT_DEVICE_MMC1 8
  68 +#define BOOT_DEVICE_MMC2 0
  69 +#define BOOT_DEVICE_UART 65
65 70 #endif
66 71  
67 72 /* Boot type */
board/ti/am335x/common_def.h
View file @ 8a8f084
1   -/*
2   - * common_def.h
3   - *
4   - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
5   - *
6   - * This program is free software; you can redistribute it and/or
7   - * modify it under the terms of the GNU General Public License as
8   - * published by the Free Software Foundation version 2.
9   - *
10   - * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11   - * kind, whether express or implied; without even the implied warranty
12   - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13   - * GNU General Public License for more details.
14   - */
15   -
16   -#ifndef __COMMON_DEF_H__
17   -#define __COMMON_DEF_H__
18   -
19   -extern void enable_uart0_pin_mux(void);
20   -extern void configure_evm_pin_mux(unsigned char daughter_board_id,
21   - unsigned short daughter_board_profile,
22   - unsigned char daughter_board_flag);
23   -
24   -#endif/*__COMMON_DEF_H__ */
board/ti/am335x/evm.c
Diff comments   View file @ 8a8f084
... ... @@ -16,7 +16,7 @@
16 16 #include <common.h>
17 17 #include <asm/arch/cpu.h>
18 18 #include <asm/arch/hardware.h>
19   -#include "common_def.h"
  19 +#include <asm/arch/common_def.h>
20 20 #include <serial.h>
21 21  
22 22 DECLARE_GLOBAL_DATA_PTR;
board/ti/am335x/mux.c
Diff comments   View file @ 8a8f084
... ... @@ -14,7 +14,7 @@
14 14 */
15 15  
16 16 #include <config.h>
17   -#include "common_def.h"
  17 +#include <asm/arch/common_def.h>
18 18 #include <asm/arch/hardware.h>
19 19 #include <asm/io.h>
20 20  
include/configs/am335x_evm.h
Diff comments   View file @ 8a8f084
... ... @@ -26,8 +26,6 @@
26 26 #include <asm/arch/cpu.h>
27 27 #include <asm/arch/hardware.h>
28 28  
29   -#define CONFIG_SETUP_PLL
30   -#define CONFIG_AM335X_CONFIG_DDR
31 29 #define CONFIG_ENV_SIZE 0x400
32 30 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 * 1024))
33 31 #define CONFIG_SYS_PROMPT "U-Boot# "
... ... @@ -118,7 +116,44 @@
118 116  
119 117 #define CONFIG_ENV_IS_NOWHERE
120 118  
121   -#define CONFIG_SYS_TEXT_BASE 0x402f0400
  119 +/* Defines for SPL */
  120 +#define CONFIG_SPL
  121 +#define CONFIG_SPL_TEXT_BASE 0x402F0400
  122 +#define CONFIG_SPL_MAX_SIZE (46 * 1024)
  123 +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
  124 +
  125 +#define CONFIG_SPL_BSS_START_ADDR 0x80000000
  126 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
  127 +
  128 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
  129 +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
  130 +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
  131 +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
  132 +#define CONFIG_SPL_MMC_SUPPORT
  133 +#define CONFIG_SPL_FAT_SUPPORT
  134 +
  135 +#define CONFIG_SPL_LIBCOMMON_SUPPORT
  136 +#define CONFIG_SPL_LIBDISK_SUPPORT
  137 +#define CONFIG_SPL_LIBGENERIC_SUPPORT
  138 +#define CONFIG_SPL_SERIAL_SUPPORT
  139 +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
  140 +
  141 +/*
  142 + * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  143 + * 64 bytes before this address should be set aside for u-boot.img's
  144 + * header. That is 0x800FFFC0--0x80100000 should not be used for any
  145 + * other needs.
  146 + */
  147 +#define CONFIG_SYS_TEXT_BASE 0x80800000
  148 +#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
  149 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
  150 +
  151 +/* Since SPL did pll and ddr initialization for us,
  152 + * we don't need to do it twice.
  153 + */
  154 +#ifndef CONFIG_SPL_BUILD
  155 +#define CONFIG_SKIP_LOWLEVEL_INIT
  156 +#endif
122 157  
123 158 /* Unsupported features */
124 159 #undef CONFIG_USE_IRQ
... ... @@ -58,15 +58,9 @@
58 58 LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/libdma.o
59 59 LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/memory.o
60 60  
61   -ifeq ($(SOC),omap3)
  61 +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
62 62 LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
63 63 endif
64   -ifeq ($(SOC),omap4)
65   -LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
66   -endif
67   -ifeq ($(SOC),omap5)
68   -LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
69   -endif
70 64  
71 65 START := $(addprefix $(SPLTREE)/,$(START))
72 66 LIBS := $(addprefix $(SPLTREE)/,$(sort $(LIBS-y)))
... ... @@ -100,6 +94,11 @@
100 94 sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
101 95  
102 96 ifdef CONFIG_OMAP
  97 +$(OBJTREE)/MLO: $(obj)u-boot-spl.bin
  98 + $(OBJTREE)/tools/mkimage -T omapimage \
  99 + -a $(CONFIG_SPL_TEXT_BASE) -d $< $@
  100 +endif
  101 +ifdef CONFIG_AM33XX
103 102 $(OBJTREE)/MLO: $(obj)u-boot-spl.bin
104 103 $(OBJTREE)/tools/mkimage -T omapimage \
105 104 -a $(CONFIG_SPL_TEXT_BASE) -d $< $@