Blackfin: cm-bf537e: new board port

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: cm-bf537e: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger
1 parent e82d8a1f02
Showing 12 changed files with 525 additions and 2 deletions Side-by-side Diff
MAINTAINERS
MAKEALL
Makefile
board/cm-bf537e/.gitignore
board/cm-bf537e/Makefile
board/cm-bf537e/cm-bf537e.c
board/cm-bf537e/config.mk
board/cm-bf537e/flash.c
board/cm-bf537e/gpio_cfi_flash.c
board/cm-bf537e/gpio_cfi_flash.h
board/cm-bf537e/u-boot.lds.S
include/configs/cm-bf537e.h
@@ -875,6 +875,7 @@
 Blackfin Team <u-boot-devel@blackfin.uclinux.org>
  
 	CM-BF533	BF533
+	CM-BF537E	BF537
  
 #########################################################################
 # End of MAINTAINERS list						#
@@ -807,6 +807,7 @@
 	bf548-ezkit	\
 	bf561-ezkit	\
 	cm-bf533	\
+	cm-bf537e	\
 "
  
 #########################################################################
@@ -3391,7 +3391,7 @@
 	bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
  
 # Bluetechnix tinyboards
-BFIN_BOARDS += cm-bf533
+BFIN_BOARDS += cm-bf533 cm-bf537e
  
 $(BFIN_BOARDS:%=%_config)	: unconfig
 	@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
@@ -3567,7 +3567,7 @@
 	       $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds  \
 	       $(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \
 	       $(obj)board/bf5{33,37}-stamp/u-boot.lds			  \
-	       $(obj)board/cm-bf533/u-boot.lds				  \
+	       $(obj)board/cm-bf5{33,37e}/u-boot.lds			  \
 	       $(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
 	@rm -f $(obj)include/bmp_logo.h
 	@rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}
+/u-boot.lds
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	:= $(BOARD).o flash.o gpio_cfi_flash.o
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+$(obj)u-boot.lds: u-boot.lds.S
+	$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2005-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <config.h>
+#include <command.h>
+#include <net.h>
+#include <netdev.h>
+#include <asm/blackfin.h>
+#include <asm/net.h>
+#include "gpio_cfi_flash.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+	printf("Board: Bluetechnix CM-BF537E board\n");
+	printf("       Support: http://www.bluetechnix.at/\n");
+	return 0;
+}
+
+phys_size_t initdram(int board_type)
+{
+	gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
+	return gd->bd->bi_memsize;
+}
+
+#ifdef CONFIG_BFIN_MAC
+static void board_init_enetaddr(uchar *mac_addr)
+{
+	puts("Warning: Generating 'random' MAC address\n");
+	bfin_gen_rand_mac(mac_addr);
+	eth_setenv_enetaddr("ethaddr", mac_addr);
+}
+
+int board_eth_init(bd_t *bis)
+{
+	return bfin_EMAC_initialize(bis);
+}
+#endif
+
+int misc_init_r(void)
+{
+#ifdef CONFIG_BFIN_MAC
+	uchar enetaddr[6];
+	if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+		board_init_enetaddr(enetaddr);
+#endif
+
+	gpio_cfi_flash_init();
+
+	return 0;
+}
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# This is not actually used for Blackfin boards so do not change it
+#TEXT_BASE = do-not-use-me
+
+LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
+
+# Set some default LDR flags based on boot mode.
+LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
+LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
+/*
+ * flash.c - helper commands for working with GPIO-assisted flash
+ *
+ * Copyright (c) 2005-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/blackfin.h>
+#include "gpio_cfi_flash.h"
+
+int do_pf(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	ulong faddr = CONFIG_SYS_FLASH_BASE;
+	ushort data;
+	ulong dflg;
+
+	if (argc > 1) {
+		dflg = simple_strtoul(argv[1], NULL, 16);
+		faddr |= (dflg << 21);
+		gpio_cfi_flash_swizzle((void *)faddr);
+	} else {
+		data = bfin_read_PORTFIO();
+		printf("Port F data %04x (PF4:%i)\n", data, !!(data & PF4));
+	}
+
+	return 0;
+}
+
+U_BOOT_CMD(pf, 3, 0, do_pf,
+	"set/clear PF4 GPIO flash bank switch\n",
+	"<pf4> - set PF4 GPIO pin state\n");
+/*
+ * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
+ *
+ * Copyright (c) 2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <asm/blackfin.h>
+#include <asm/io.h>
+#include "gpio_cfi_flash.h"
+
+#define GPIO_PIN_1  PF4
+#define GPIO_MASK_1 (1 << 21)
+#define GPIO_MASK   (GPIO_MASK_1)
+
+void *gpio_cfi_flash_swizzle(void *vaddr)
+{
+	unsigned long addr = (unsigned long)vaddr;
+
+	if (addr & GPIO_MASK_1)
+		bfin_write_PORTFIO_SET(GPIO_PIN_1);
+	else
+		bfin_write_PORTFIO_CLEAR(GPIO_PIN_1);
+
+#ifdef GPIO_MASK_2
+	if (addr & GPIO_MASK_2)
+		bfin_write_PORTGIO_SET(GPIO_PIN_2);
+	else
+		bfin_write_PORTGIO_CLEAR(GPIO_PIN_2);
+#endif
+
+	SSYNC();
+
+	return (void *)(addr & ~GPIO_MASK);
+}
+
+#define __raw_writeq(value, addr) *(volatile u64 *)addr = value
+#define __raw_readq(addr) *(volatile u64 *)addr
+
+#define MAKE_FLASH(size, sfx) \
+void flash_write##size(u##size value, void *addr) \
+{ \
+	__raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \
+} \
+u##size flash_read##size(void *addr) \
+{ \
+	return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
+}
+MAKE_FLASH(8, b)  /* flash_write8()  flash_read8() */
+MAKE_FLASH(16, w) /* flash_write16() flash_write16() */
+MAKE_FLASH(32, l) /* flash_write32() flash_write32() */
+MAKE_FLASH(64, q) /* flash_write64() flash_write64() */
+
+void gpio_cfi_flash_init(void)
+{
+	bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() | GPIO_PIN_1);
+	gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE);
+}
+/*
+ * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
+ *
+ * Copyright (c) 2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+void *gpio_cfi_flash_swizzle(void *vaddr);
+void gpio_cfi_flash_init(void);
+/*
+ * U-boot - u-boot.lds.S
+ *
+ * Copyright (c) 2005-2008 Analog Device Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <asm/blackfin.h>
+#undef ALIGN
+#undef ENTRY
+#undef bfin
+
+/* If we don't actually load anything into L1 data, this will avoid
+ * a syntax error.  If we do actually load something into L1 data,
+ * we'll get a linker memory load error (which is what we'd want).
+ * This is here in the first place so we can quickly test building
+ * for different CPU's which may lack non-cache L1 data.
+ */
+#ifndef L1_DATA_B_SRAM
+# define L1_DATA_B_SRAM      CONFIG_SYS_MONITOR_BASE
+# define L1_DATA_B_SRAM_SIZE 0
+#endif
+
+OUTPUT_ARCH(bfin)
+
+MEMORY
+{
+	ram     : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
+	l1_code : ORIGIN = L1_INST_SRAM,            LENGTH = L1_INST_SRAM_SIZE
+	l1_data : ORIGIN = L1_DATA_B_SRAM,          LENGTH = L1_DATA_B_SRAM_SIZE
+}
+
+ENTRY(_start)
+SECTIONS
+{
+	.text :
+	{
+		cpu/blackfin/start.o (.text .text.*)
+
+#ifdef ENV_IS_EMBEDDED
+		/* WARNING - the following is hand-optimized to fit within
+		 * the sector before the environment sector. If it throws
+		 * an error during compilation remove an object here to get
+		 * it linked after the configuration sector.
+		 */
+
+		cpu/blackfin/traps.o		(.text .text.*)
+		cpu/blackfin/interrupt.o	(.text .text.*)
+		cpu/blackfin/serial.o		(.text .text.*)
+		common/dlmalloc.o		(.text .text.*)
+		lib_generic/crc32.o		(.text .text.*)
+
+		. = DEFINED(env_offset) ? env_offset : .;
+		common/env_embedded.o	(.text .text.*)
+#endif
+
+		__initcode_start = .;
+		cpu/blackfin/initcode.o (.text .text.*)
+		__initcode_end = .;
+
+		*(.text .text.*)
+	} >ram
+
+	.rodata :
+	{
+		. = ALIGN(4);
+		*(.rodata .rodata.*)
+		*(.rodata1)
+		*(.eh_frame)
+		. = ALIGN(4);
+	} >ram
+
+	.data :
+	{
+		. = ALIGN(256);
+		*(.data .data.*)
+		*(.data1)
+		*(.sdata)
+		*(.sdata2)
+		*(.dynamic)
+		CONSTRUCTORS
+	} >ram
+
+	.u_boot_cmd :
+	{
+		___u_boot_cmd_start = .;
+		*(.u_boot_cmd)
+		___u_boot_cmd_end = .;
+	} >ram
+
+	.text_l1 :
+	{
+		. = ALIGN(4);
+		__stext_l1 = .;
+		*(.l1.text)
+		. = ALIGN(4);
+		__etext_l1 = .;
+	} >l1_code AT>ram
+	__stext_l1_lma = LOADADDR(.text_l1);
+
+	.data_l1 :
+	{
+		. = ALIGN(4);
+		__sdata_l1 = .;
+		*(.l1.data)
+		*(.l1.bss)
+		. = ALIGN(4);
+		__edata_l1 = .;
+	} >l1_data AT>ram
+	__sdata_l1_lma = LOADADDR(.data_l1);
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start = .;
+		*(.sbss) *(.scommon)
+		*(.dynbss)
+		*(.bss .bss.*)
+		*(COMMON)
+		__bss_end = .;
+	} >ram
+}
+/*
+ * U-boot - Configuration file for CM-BF537E board
+ */
+
+#ifndef __CONFIG_CM_BF537E_H__
+#define __CONFIG_CM_BF537E_H__
+
+#include <asm/blackfin-config-pre.h>
+
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU             bf537-0.2
+#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS
+
+
+/*
+ * Clock Settings
+ *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ *	SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz					*/
+#define CONFIG_CLKIN_HZ			25000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN		*/
+/*                                                1 = CLKIN / 2		*/
+#define CONFIG_CLKIN_HALF		0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass	*/
+/*                                                1 = bypass PLL	*/
+#define CONFIG_PLL_BYPASS		0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL		*/
+/* Values can range from 0-63 (where 0 means 64)			*/
+#define CONFIG_VCO_MULT			21
+/* CCLK_DIV controls the core clock divider				*/
+/* Values can be 1, 2, 4, or 8 ONLY					*/
+#define CONFIG_CCLK_DIV			1
+/* SCLK_DIV controls the system clock divider				*/
+/* Values can range from 1-15						*/
+#define CONFIG_SCLK_DIV			4
+
+
+/*
+ * Memory Settings
+ */
+#define CONFIG_MEM_ADD_WDTH	9
+#define CONFIG_MEM_SIZE		32
+
+#define CONFIG_EBIU_SDRRC_VAL	0x3f8
+#define CONFIG_EBIU_SDGCTL_VAL	0x9111cd
+
+#define CONFIG_EBIU_AMGCTL_VAL	(AMBEN_ALL)
+#define CONFIG_EBIU_AMBCTL0_VAL	(B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
+#define CONFIG_EBIU_AMBCTL1_VAL	(B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
+
+#define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
+#define CONFIG_SYS_MALLOC_LEN	(128 * 1024)
+
+
+/*
+ * Network Settings
+ */
+#ifndef __ADSPBF534__
+#define ADI_CMDS_NETWORK	1
+#define CONFIG_BFIN_MAC
+#define CONFIG_NETCONSOLE	1
+#define CONFIG_NET_MULTI	1
+#endif
+#define CONFIG_HOSTNAME		cm-bf537e
+/* Uncomment next line to use fixed MAC address */
+/* #define CONFIG_ETHADDR	02:80:ad:20:31:e8 */
+
+
+/*
+ * Flash Settings
+ */
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+#define CONFIG_SYS_FLASH_BASE		0x20000000
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	32
+
+
+/*
+ * Env Storage Settings
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_OFFSET	0x4000
+#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_SECT_SIZE	0x20000
+#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
+#define ENV_IS_EMBEDDED
+#else
+#define ENV_IS_EMBEDDED_CUSTOM
+#endif
+
+
+/*
+ * I2C Settings
+ */
+#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_HARD_I2C		1
+#define CONFIG_SYS_I2C_SPEED	50000
+#define CONFIG_SYS_I2C_SLAVE	0
+
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_MISC_INIT_R
+#define CONFIG_RTC_BFIN
+#define CONFIG_UART_CONSOLE	0
+
+
+/*
+ * Pull in common ADI header for remaining command/environment setup
+ */
+#include <configs/bfin_adi_common.h>
+
+#include <asm/blackfin-config-post.h>
+
+#endif
...	...	@@ -875,6 +875,7 @@
875	875	Blackfin Team <u-boot-devel@blackfin.uclinux.org>
876	876
877	877	CM-BF533 BF533
	878	+ CM-BF537E BF537
878	879
879	880	#########################################################################
880	881	# End of MAINTAINERS list #
...	...	@@ -807,6 +807,7 @@
807	807	bf548-ezkit \
808	808	bf561-ezkit \
809	809	cm-bf533 \
	810	+ cm-bf537e \
810	811	"
811	812
812	813	#########################################################################
...	...	@@ -3391,7 +3391,7 @@
3391	3391	bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
3392	3392
3393	3393	# Bluetechnix tinyboards
3394		-BFIN_BOARDS += cm-bf533
	3394	+BFIN_BOARDS += cm-bf533 cm-bf537e
3395	3395
3396	3396	$(BFIN_BOARDS:%=%_config) : unconfig
3397	3397	@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
...	...	@@ -3567,7 +3567,7 @@
3567	3567	$(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
3568	3568	$(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \
3569	3569	$(obj)board/bf5{33,37}-stamp/u-boot.lds \
3570		- $(obj)board/cm-bf533/u-boot.lds \
	3570	+ $(obj)board/cm-bf5{33,37e}/u-boot.lds \
3571	3571	$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
3572	3572	@rm -f $(obj)include/bmp_logo.h
3573	3573	@rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}
	1	+#
	2	+# U-boot - Makefile
	3	+#
	4	+# Copyright (c) 2005-2008 Analog Device Inc.
	5	+#
	6	+# (C) Copyright 2000-2006
	7	+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	8	+#
	9	+# See file CREDITS for list of people who contributed to this
	10	+# project.
	11	+#
	12	+# This program is free software; you can redistribute it and/or
	13	+# modify it under the terms of the GNU General Public License as
	14	+# published by the Free Software Foundation; either version 2 of
	15	+# the License, or (at your option) any later version.
	16	+#
	17	+# This program is distributed in the hope that it will be useful,
	18	+# but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	+# GNU General Public License for more details.
	21	+#
	22	+# You should have received a copy of the GNU General Public License
	23	+# along with this program; if not, write to the Free Software
	24	+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	25	+# MA 02111-1307 USA
	26	+#
	27	+
	28	+include $(TOPDIR)/config.mk
	29	+
	30	+LIB = $(obj)lib$(BOARD).a
	31	+
	32	+COBJS-y := $(BOARD).o flash.o gpio_cfi_flash.o
	33	+
	34	+SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
	35	+OBJS := $(addprefix $(obj),$(COBJS-y))
	36	+SOBJS := $(addprefix $(obj),$(SOBJS-y))
	37	+
	38	+$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
	39	+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
	40	+
	41	+$(obj)u-boot.lds: u-boot.lds.S
	42	+ $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
	43	+
	44	+clean:
	45	+ rm -f $(SOBJS) $(OBJS)
	46	+
	47	+distclean: clean
	48	+ rm -f $(LIB) core *.bak $(obj).depend
	49	+
	50	+#########################################################################
	51	+
	52	+# defines $(obj).depend target
	53	+include $(SRCTREE)/rules.mk
	54	+
	55	+sinclude $(obj).depend
	56	+
	57	+#########################################################################
	1	+/*
	2	+ * U-boot - main board file
	3	+ *
	4	+ * Copyright (c) 2005-2009 Analog Devices Inc.
	5	+ *
	6	+ * Licensed under the GPL-2 or later.
	7	+ */
	8	+
	9	+#include <common.h>
	10	+#include <config.h>
	11	+#include <command.h>
	12	+#include <net.h>
	13	+#include <netdev.h>
	14	+#include <asm/blackfin.h>
	15	+#include <asm/net.h>
	16	+#include "gpio_cfi_flash.h"
	17	+
	18	+DECLARE_GLOBAL_DATA_PTR;
	19	+
	20	+int checkboard(void)
	21	+{
	22	+ printf("Board: Bluetechnix CM-BF537E board\n");
	23	+ printf(" Support: http://www.bluetechnix.at/\n");
	24	+ return 0;
	25	+}
	26	+
	27	+phys_size_t initdram(int board_type)
	28	+{
	29	+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
	30	+ gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
	31	+ return gd->bd->bi_memsize;
	32	+}
	33	+
	34	+#ifdef CONFIG_BFIN_MAC
	35	+static void board_init_enetaddr(uchar *mac_addr)
	36	+{
	37	+ puts("Warning: Generating 'random' MAC address\n");
	38	+ bfin_gen_rand_mac(mac_addr);
	39	+ eth_setenv_enetaddr("ethaddr", mac_addr);
	40	+}
	41	+
	42	+int board_eth_init(bd_t *bis)
	43	+{
	44	+ return bfin_EMAC_initialize(bis);
	45	+}
	46	+#endif
	47	+
	48	+int misc_init_r(void)
	49	+{
	50	+#ifdef CONFIG_BFIN_MAC
	51	+ uchar enetaddr[6];
	52	+ if (!eth_getenv_enetaddr("ethaddr", enetaddr))
	53	+ board_init_enetaddr(enetaddr);
	54	+#endif
	55	+
	56	+ gpio_cfi_flash_init();
	57	+
	58	+ return 0;
	59	+}
	1	+#
	2	+# Copyright (c) 2005-2008 Analog Device Inc.
	3	+#
	4	+# (C) Copyright 2001
	5	+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	6	+#
	7	+# See file CREDITS for list of people who contributed to this
	8	+# project.
	9	+#
	10	+# This program is free software; you can redistribute it and/or
	11	+# modify it under the terms of the GNU General Public License as
	12	+# published by the Free Software Foundation; either version 2 of
	13	+# the License, or (at your option) any later version.
	14	+#
	15	+# This program is distributed in the hope that it will be useful,
	16	+# but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	+# GNU General Public License for more details.
	19	+#
	20	+# You should have received a copy of the GNU General Public License
	21	+# along with this program; if not, write to the Free Software
	22	+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	+# MA 02111-1307 USA
	24	+#
	25	+
	26	+# This is not actually used for Blackfin boards so do not change it
	27	+#TEXT_BASE = do-not-use-me
	28	+
	29	+LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
	30	+
	31	+# Set some default LDR flags based on boot mode.
	32	+LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
	33	+LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
	1	+/*
	2	+ * flash.c - helper commands for working with GPIO-assisted flash
	3	+ *
	4	+ * Copyright (c) 2005-2009 Analog Devices Inc.
	5	+ *
	6	+ * Licensed under the GPL-2 or later.
	7	+ */
	8	+
	9	+#include <common.h>
	10	+#include <command.h>
	11	+#include <asm/blackfin.h>
	12	+#include "gpio_cfi_flash.h"
	13	+
	14	+int do_pf(cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	15	+{
	16	+ ulong faddr = CONFIG_SYS_FLASH_BASE;
	17	+ ushort data;
	18	+ ulong dflg;
	19	+
	20	+ if (argc > 1) {
	21	+ dflg = simple_strtoul(argv[1], NULL, 16);
	22	+ faddr \|= (dflg << 21);
	23	+ gpio_cfi_flash_swizzle((void *)faddr);
	24	+ } else {
	25	+ data = bfin_read_PORTFIO();
	26	+ printf("Port F data %04x (PF4:%i)\n", data, !!(data & PF4));
	27	+ }
	28	+
	29	+ return 0;
	30	+}
	31	+
	32	+U_BOOT_CMD(pf, 3, 0, do_pf,
	33	+ "set/clear PF4 GPIO flash bank switch\n",
	34	+ "<pf4> - set PF4 GPIO pin state\n");
	1	+/*
	2	+ * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
	3	+ *
	4	+ * Copyright (c) 2009 Analog Devices Inc.
	5	+ *
	6	+ * Licensed under the GPL-2 or later.
	7	+ */
	8	+
	9	+#include <common.h>
	10	+#include <asm/blackfin.h>
	11	+#include <asm/io.h>
	12	+#include "gpio_cfi_flash.h"
	13	+
	14	+#define GPIO_PIN_1 PF4
	15	+#define GPIO_MASK_1 (1 << 21)
	16	+#define GPIO_MASK (GPIO_MASK_1)
	17	+
	18	+void gpio_cfi_flash_swizzle(void vaddr)
	19	+{
	20	+ unsigned long addr = (unsigned long)vaddr;
	21	+
	22	+ if (addr & GPIO_MASK_1)
	23	+ bfin_write_PORTFIO_SET(GPIO_PIN_1);
	24	+ else
	25	+ bfin_write_PORTFIO_CLEAR(GPIO_PIN_1);
	26	+
	27	+#ifdef GPIO_MASK_2
	28	+ if (addr & GPIO_MASK_2)
	29	+ bfin_write_PORTGIO_SET(GPIO_PIN_2);
	30	+ else
	31	+ bfin_write_PORTGIO_CLEAR(GPIO_PIN_2);
	32	+#endif
	33	+
	34	+ SSYNC();
	35	+
	36	+ return (void *)(addr & ~GPIO_MASK);
	37	+}
	38	+
	39	+#define __raw_writeq(value, addr) (volatile u64 )addr = value
	40	+#define __raw_readq(addr) (volatile u64 )addr
	41	+
	42	+#define MAKE_FLASH(size, sfx) \
	43	+void flash_write##size(u##size value, void *addr) \
	44	+{ \
	45	+ __raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \
	46	+} \
	47	+u##size flash_read##size(void *addr) \
	48	+{ \
	49	+ return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
	50	+}
	51	+MAKE_FLASH(8, b) /* flash_write8() flash_read8() */
	52	+MAKE_FLASH(16, w) /* flash_write16() flash_write16() */
	53	+MAKE_FLASH(32, l) /* flash_write32() flash_write32() */
	54	+MAKE_FLASH(64, q) /* flash_write64() flash_write64() */
	55	+
	56	+void gpio_cfi_flash_init(void)
	57	+{
	58	+ bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() \| GPIO_PIN_1);
	59	+ gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE);
	60	+}
	1	+/*
	2	+ * U-boot - u-boot.lds.S
	3	+ *
	4	+ * Copyright (c) 2005-2008 Analog Device Inc.
	5	+ *
	6	+ * (C) Copyright 2000-2004
	7	+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	8	+ *
	9	+ * See file CREDITS for list of people who contributed to this
	10	+ * project.
	11	+ *
	12	+ * This program is free software; you can redistribute it and/or
	13	+ * modify it under the terms of the GNU General Public License as
	14	+ * published by the Free Software Foundation; either version 2 of
	15	+ * the License, or (at your option) any later version.
	16	+ *
	17	+ * This program is distributed in the hope that it will be useful,
	18	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	+ * GNU General Public License for more details.
	21	+ *
	22	+ * You should have received a copy of the GNU General Public License
	23	+ * along with this program; if not, write to the Free Software
	24	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	25	+ * MA 02111-1307 USA
	26	+ */
	27	+
	28	+#include <config.h>
	29	+#include <asm/blackfin.h>
	30	+#undef ALIGN
	31	+#undef ENTRY
	32	+#undef bfin
	33	+
	34	+/* If we don't actually load anything into L1 data, this will avoid
	35	+ * a syntax error. If we do actually load something into L1 data,
	36	+ * we'll get a linker memory load error (which is what we'd want).
	37	+ * This is here in the first place so we can quickly test building
	38	+ * for different CPU's which may lack non-cache L1 data.
	39	+ */
	40	+#ifndef L1_DATA_B_SRAM
	41	+# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
	42	+# define L1_DATA_B_SRAM_SIZE 0
	43	+#endif
	44	+
	45	+OUTPUT_ARCH(bfin)
	46	+
	47	+MEMORY
	48	+{
	49	+ ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
	50	+ l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
	51	+ l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
	52	+}
	53	+
	54	+ENTRY(_start)
	55	+SECTIONS
	56	+{
	57	+ .text :
	58	+ {
	59	+ cpu/blackfin/start.o (.text .text.*)
	60	+
	61	+#ifdef ENV_IS_EMBEDDED
	62	+ /* WARNING - the following is hand-optimized to fit within
	63	+ * the sector before the environment sector. If it throws
	64	+ * an error during compilation remove an object here to get
	65	+ * it linked after the configuration sector.
	66	+ */
	67	+
	68	+ cpu/blackfin/traps.o (.text .text.*)
	69	+ cpu/blackfin/interrupt.o (.text .text.*)
	70	+ cpu/blackfin/serial.o (.text .text.*)
	71	+ common/dlmalloc.o (.text .text.*)
	72	+ lib_generic/crc32.o (.text .text.*)
	73	+
	74	+ . = DEFINED(env_offset) ? env_offset : .;
	75	+ common/env_embedded.o (.text .text.*)
	76	+#endif
	77	+
	78	+ __initcode_start = .;
	79	+ cpu/blackfin/initcode.o (.text .text.*)
	80	+ __initcode_end = .;
	81	+
	82	+ (.text .text.)
	83	+ } >ram
	84	+
	85	+ .rodata :
	86	+ {
	87	+ . = ALIGN(4);
	88	+ (.rodata .rodata.)
	89	+ *(.rodata1)
	90	+ *(.eh_frame)
	91	+ . = ALIGN(4);
	92	+ } >ram
	93	+
	94	+ .data :
	95	+ {
	96	+ . = ALIGN(256);
	97	+ (.data .data.)
	98	+ *(.data1)
	99	+ *(.sdata)
	100	+ *(.sdata2)
	101	+ *(.dynamic)
	102	+ CONSTRUCTORS
	103	+ } >ram
	104	+
	105	+ .u_boot_cmd :
	106	+ {
	107	+ ___u_boot_cmd_start = .;
	108	+ *(.u_boot_cmd)
	109	+ ___u_boot_cmd_end = .;
	110	+ } >ram
	111	+
	112	+ .text_l1 :
	113	+ {
	114	+ . = ALIGN(4);
	115	+ __stext_l1 = .;
	116	+ *(.l1.text)
	117	+ . = ALIGN(4);
	118	+ __etext_l1 = .;
	119	+ } >l1_code AT>ram
	120	+ __stext_l1_lma = LOADADDR(.text_l1);
	121	+
	122	+ .data_l1 :
	123	+ {
	124	+ . = ALIGN(4);
	125	+ __sdata_l1 = .;
	126	+ *(.l1.data)
	127	+ *(.l1.bss)
	128	+ . = ALIGN(4);
	129	+ __edata_l1 = .;
	130	+ } >l1_data AT>ram
	131	+ __sdata_l1_lma = LOADADDR(.data_l1);
	132	+
	133	+ .bss :
	134	+ {
	135	+ . = ALIGN(4);
	136	+ __bss_start = .;
	137	+ (.sbss) (.scommon)
	138	+ *(.dynbss)
	139	+ (.bss .bss.)
	140	+ *(COMMON)
	141	+ __bss_end = .;
	142	+ } >ram
	143	+}
	1	+/*
	2	+ * U-boot - Configuration file for CM-BF537E board
	3	+ */
	4	+
	5	+#ifndef __CONFIG_CM_BF537E_H__
	6	+#define __CONFIG_CM_BF537E_H__
	7	+
	8	+#include <asm/blackfin-config-pre.h>
	9	+
	10	+
	11	+/*
	12	+ * Processor Settings
	13	+ */
	14	+#define CONFIG_BFIN_CPU bf537-0.2
	15	+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
	16	+
	17	+
	18	+/*
	19	+ * Clock Settings
	20	+ * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
	21	+ * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
	22	+ */
	23	+/* CONFIG_CLKIN_HZ is any value in Hz */
	24	+#define CONFIG_CLKIN_HZ 25000000
	25	+/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
	26	+/* 1 = CLKIN / 2 */
	27	+#define CONFIG_CLKIN_HALF 0
	28	+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
	29	+/* 1 = bypass PLL */
	30	+#define CONFIG_PLL_BYPASS 0
	31	+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
	32	+/* Values can range from 0-63 (where 0 means 64) */
	33	+#define CONFIG_VCO_MULT 21
	34	+/* CCLK_DIV controls the core clock divider */
	35	+/* Values can be 1, 2, 4, or 8 ONLY */
	36	+#define CONFIG_CCLK_DIV 1
	37	+/* SCLK_DIV controls the system clock divider */
	38	+/* Values can range from 1-15 */
	39	+#define CONFIG_SCLK_DIV 4
	40	+
	41	+
	42	+/*
	43	+ * Memory Settings
	44	+ */
	45	+#define CONFIG_MEM_ADD_WDTH 9
	46	+#define CONFIG_MEM_SIZE 32
	47	+
	48	+#define CONFIG_EBIU_SDRRC_VAL 0x3f8
	49	+#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
	50	+
	51	+#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
	52	+#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 \| B1RAT_11 \| B1HT_2 \| B1ST_3 \| B0WAT_7 \| B0RAT_11 \| B0HT_2 \| B0ST_3)
	53	+#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 \| B3RAT_11 \| B3HT_2 \| B3ST_3 \| B2WAT_7 \| B2RAT_11 \| B2HT_2 \| B2ST_3)
	54	+
	55	+#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
	56	+#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
	57	+
	58	+
	59	+/*
	60	+ * Network Settings
	61	+ */
	62	+#ifndef __ADSPBF534__
	63	+#define ADI_CMDS_NETWORK 1
	64	+#define CONFIG_BFIN_MAC
	65	+#define CONFIG_NETCONSOLE 1
	66	+#define CONFIG_NET_MULTI 1
	67	+#endif
	68	+#define CONFIG_HOSTNAME cm-bf537e
	69	+/* Uncomment next line to use fixed MAC address */
	70	+/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
	71	+
	72	+
	73	+/*
	74	+ * Flash Settings
	75	+ */
	76	+#define CONFIG_FLASH_CFI_DRIVER
	77	+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
	78	+#define CONFIG_SYS_FLASH_BASE 0x20000000
	79	+#define CONFIG_SYS_FLASH_CFI
	80	+#define CONFIG_SYS_FLASH_PROTECTION
	81	+#define CONFIG_SYS_MAX_FLASH_BANKS 1
	82	+#define CONFIG_SYS_MAX_FLASH_SECT 32
	83	+
	84	+
	85	+/*
	86	+ * Env Storage Settings
	87	+ */
	88	+#define CONFIG_ENV_IS_IN_FLASH 1
	89	+#define CONFIG_ENV_OFFSET 0x4000
	90	+#define CONFIG_ENV_SIZE 0x2000
	91	+#define CONFIG_ENV_SECT_SIZE 0x20000
	92	+#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
	93	+#define ENV_IS_EMBEDDED
	94	+#else
	95	+#define ENV_IS_EMBEDDED_CUSTOM
	96	+#endif
	97	+
	98	+
	99	+/*
	100	+ * I2C Settings
	101	+ */
	102	+#define CONFIG_BFIN_TWI_I2C 1
	103	+#define CONFIG_HARD_I2C 1
	104	+#define CONFIG_SYS_I2C_SPEED 50000
	105	+#define CONFIG_SYS_I2C_SLAVE 0
	106	+
	107	+
	108	+/*
	109	+ * Misc Settings
	110	+ */
	111	+#define CONFIG_BAUDRATE 115200
	112	+#define CONFIG_MISC_INIT_R
	113	+#define CONFIG_RTC_BFIN
	114	+#define CONFIG_UART_CONSOLE 0
	115	+
	116	+
	117	+/*
	118	+ * Pull in common ADI header for remaining command/environment setup
	119	+ */
	120	+#include <configs/bfin_adi_common.h>
	121	+
	122	+#include <asm/blackfin-config-post.h>
	123	+
	124	+#endif