Eric Lee / smarc-uboot

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Commit 8c5224c9f5c8a24ff5153f018e10a3ac4da5783a

Authored by Bin Meng
Committed by Simon Glass
1 parent 405d8205d7
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

x86: Use consistent name XXX_ADDR for binary blob flash address 

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

Showing 6 changed files with 7 additions and 7 deletions Side-by-side Diff

... ... @@ -958,7 +958,7 @@
958 958 endif
959 959  
960 960 ifneq ($(CONFIG_HAVE_MRC),)
961   -IFDTOOL_FLAGS += -w $(CONFIG_X86_MRC_START):$(srctree)/board/$(BOARDDIR)/mrc.bin
  961 +IFDTOOL_FLAGS += -w $(CONFIG_X86_MRC_ADDR):$(srctree)/board/$(BOARDDIR)/mrc.bin
962 962 endif
963 963  
964 964 ifneq ($(CONFIG_X86_OPTION_ROM_ADDR),)
arch/x86/cpu/ivybridge/sdram.c
Diff comments   View file @ 8c5224c
... ... @@ -177,7 +177,7 @@
177 177  
178 178 debug("PEI data at %p, size %x:\n", pei_data, sizeof(*pei_data));
179 179  
180   - data = (char *)CONFIG_X86_MRC_START;
  180 + data = (char *)CONFIG_X86_MRC_ADDR;
181 181 if (data) {
182 182 int rv;
183 183 int (*func)(struct pei_data *);
arch/x86/cpu/queensbay/Kconfig
Diff comments   View file @ 8c5224c
... ... @@ -29,7 +29,7 @@
29 29 The filename of the file to use as Firmware Support Package binary
30 30 in the board directory.
31 31  
32   -config FSP_LOCATION
  32 +config FSP_ADDR
33 33 hex "Firmware Support Package binary location"
34 34 depends on HAVE_FSP
35 35 default 0xfffc0000
... ... @@ -65,7 +65,7 @@
65 65 The filename of the file to use as Chipset Micro Code state machine
66 66 binary in the board directory.
67 67  
68   -config CMC_LOCATION
  68 +config CMC_ADDR
69 69 hex "Chipset Micro Code state machine binary location"
70 70 depends on HAVE_CMC
71 71 default 0xfffb0000
arch/x86/cpu/queensbay/fsp_support.c
Diff comments   View file @ 8c5224c
... ... @@ -64,7 +64,7 @@
64 64 volatile register u8 *fsp asm("eax");
65 65  
66 66 /* Initalize the FSP base */
67   - fsp = (u8 *)CONFIG_FSP_LOCATION;
  67 + fsp = (u8 *)CONFIG_FSP_ADDR;
68 68  
69 69 /* Check the FV signature, _FVH */
70 70 if (((struct fv_header_t *)fsp)->sign == 0x4856465F) {
arch/x86/cpu/queensbay/tnc_car.S
Diff comments   View file @ 8c5224c
... ... @@ -29,7 +29,7 @@
29 29 mov %eax, %ebp
30 30  
31 31 /* sanity test */
32   - cmp $CONFIG_FSP_LOCATION, %eax
  32 + cmp $CONFIG_FSP_ADDR, %eax
33 33 jb die
34 34  
35 35 /* calculate TempRamInitEntry address */
include/configs/chromebook_link.h
Diff comments   View file @ 8c5224c
... ... @@ -25,7 +25,7 @@
25 25  
26 26 #define CONFIG_X86_RESET_VECTOR
27 27 #define CONFIG_NR_DRAM_BANKS 8
28   -#define CONFIG_X86_MRC_START 0xfffa0000
  28 +#define CONFIG_X86_MRC_ADDR 0xfffa0000
29 29 #define CONFIG_CACHE_MRC_SIZE_KB 512
30 30  
31 31 #define CONFIG_COREBOOT_SERIAL