imx: ventana: add GW5904 support

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

imx: ventana: add GW5904 support
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey · Stefano Babic
1 parent b4f4b0f54b
Showing 10 changed files with 340 additions and 16 deletions Side-by-side Diff
board/gateworks/gw_ventana/common.c
board/gateworks/gw_ventana/common.h
board/gateworks/gw_ventana/eeprom.c
board/gateworks/gw_ventana/gw_ventana.c
board/gateworks/gw_ventana/gw_ventana_spl.c
board/gateworks/gw_ventana/ventana_eeprom.h
configs/gwventana_emmc_defconfig
configs/gwventana_gw5904_defconfig
configs/gwventana_nand_defconfig
include/configs/gw_ventana.h
@@ -38,6 +38,19 @@
 }
  
 /* MMC */
+static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
+	IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
 static iomux_v3_cfg_t const usdhc3_pads[] = {
 	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -352,6 +365,41 @@
 	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
 };
  
+static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
+	/* USB_HUBRST# */
+	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+	/* DIOI2C_DIS# */
+	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+	/* UART_RS485 */
+	IOMUX_PADS(PAD_DISP0_DAT2__GPIO4_IO23 | DIO_PAD_CFG),
+	/* UART_HALF */
+	IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 | DIO_PAD_CFG),
+	/* SKT1_WDIS# */
+	IOMUX_PADS(PAD_DISP0_DAT17__GPIO5_IO11 | DIO_PAD_CFG),
+	/* SKT1_RST# */
+	IOMUX_PADS(PAD_DISP0_DAT18__GPIO5_IO12 | DIO_PAD_CFG),
+	/* SKT2_WDIS# */
+	IOMUX_PADS(PAD_DISP0_DAT19__GPIO5_IO13 | DIO_PAD_CFG),
+	/* SKT2_RST# */
+	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+	/* M2_OFF# */
+	IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15 | DIO_PAD_CFG),
+	/* M2_WDIS# */
+	IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | DIO_PAD_CFG),
+	/* M2_RST# */
+	IOMUX_PADS(PAD_SD2_DAT2__GPIO1_IO13 | DIO_PAD_CFG),
+};
+
 /* Digital I/O */
 struct dio_cfg gw51xx_dio[] = {
 	{
@@ -566,6 +614,81 @@
 	},
 };
  
+struct dio_cfg gw5904_dio[] = {
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+		IMX_GPIO_NR(1, 16),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+		IMX_GPIO_NR(1, 19),
+		{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+		2
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+		IMX_GPIO_NR(1, 17),
+		{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+		3
+	},
+	{
+		{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
+		IMX_GPIO_NR(1, 20),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D0__GPIO2_IO00) },
+		IMX_GPIO_NR(2, 0),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D1__GPIO2_IO01) },
+		IMX_GPIO_NR(2, 1),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02) },
+		IMX_GPIO_NR(2, 2),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03) },
+		IMX_GPIO_NR(2, 3),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04) },
+		IMX_GPIO_NR(2, 4),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D5__GPIO2_IO05) },
+		IMX_GPIO_NR(2, 5),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D6__GPIO2_IO06) },
+		IMX_GPIO_NR(2, 6),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D7__GPIO2_IO07) },
+		IMX_GPIO_NR(2, 7),
+		{ 0, 0 },
+		0
+	},
+};
+
 /*
  * Board Specific GPIO
  */
@@ -588,6 +711,7 @@
 		.dioi2c_en = IMX_GPIO_NR(4,  5),
 		.pcie_sson = IMX_GPIO_NR(1, 20),
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
  
 	/* GW51xx */
@@ -631,6 +755,7 @@
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
  
 	/* GW53xx */
@@ -654,6 +779,7 @@
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
  
 	/* GW54xx */
@@ -679,6 +805,7 @@
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
  
 	/* GW551x */
  
@@ -726,7 +853,25 @@
 		.wdis = IMX_GPIO_NR(7, 12),
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
+
+	/* GW5904 */
+	{
+		.gpio_pads = gw5904_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw5904_gpio_pads)/2,
+		.dio_cfg = gw5904_dio,
+		.dio_num = ARRAY_SIZE(gw5904_dio),
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 0),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
+	},
 };
  
 void setup_iomux_gpio(int board, struct ventana_board_info *info)
@@ -834,6 +979,30 @@
 		gpio_direction_input(gpio_cfg[board].vsel_pin);
 		gpio_cfg[board].usd_vsel = !gpio_get_value(gpio_cfg[board].vsel_pin);
 	}
+
+	/* microSD CD */
+	if (gpio_cfg[board].mmc_cd) {
+		gpio_request(gpio_cfg[board].mmc_cd, "sd_cd");
+		gpio_direction_input(gpio_cfg[board].mmc_cd);
+	}
+
+	/* Anything else board specific */
+	switch(board) {
+	case GW5904:
+		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
+		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
+		gpio_request(IMX_GPIO_NR(5, 12), "skt1_rst#");
+		gpio_direction_output(IMX_GPIO_NR(5, 12), 1);
+		gpio_request(IMX_GPIO_NR(5, 13), "skt2_wdis#");
+		gpio_direction_output(IMX_GPIO_NR(5, 13), 1);
+		gpio_request(IMX_GPIO_NR(1, 15), "m2_off#");
+		gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
+		gpio_request(IMX_GPIO_NR(1, 14), "m2_wdis#");
+		gpio_direction_output(IMX_GPIO_NR(1, 14), 1);
+		gpio_request(IMX_GPIO_NR(1, 13), "m2_rst#");
+		gpio_direction_output(IMX_GPIO_NR(1, 13), 1);
+		break;
+	}
 }
  
 /* setup GPIO pinmux and default configuration per baseboard and env */
  
  
  
  
@@ -995,20 +1164,57 @@
  
 int board_mmc_init(bd_t *bis)
 {
-	/* Only one USDHC controller on Ventana */
-	SETUP_IOMUX_PADS(usdhc3_pads);
-	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-	usdhc_cfg.max_bus_width = 4;
+	struct ventana_board_info ventana_info;
+	int board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+	int ret;
  
-	return fsl_esdhc_initialize(bis, &usdhc_cfg);
+	switch (board_type) {
+	case GW52xx:
+	case GW53xx:
+	case GW54xx:
+	case GW553x:
+		/* usdhc3: 4bit microSD */
+		SETUP_IOMUX_PADS(usdhc3_pads);
+		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg.max_bus_width = 4;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg);
+	case GW5904:
+		/* usdhc3: 8bit eMMC */
+		SETUP_IOMUX_PADS(gw5904_emmc_pads);
+		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg.max_bus_width = 8;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg);
+	default:
+		/* doesn't have MMC */
+		return -1;
+	}
 }
  
 int board_mmc_getcd(struct mmc *mmc)
 {
+	struct ventana_board_info ventana_info;
+	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+	int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+	int gpio = gpio_cfg[board].mmc_cd;
+
 	/* Card Detect */
-	gpio_request(GP_SD3_CD, "sd_cd");
-	gpio_direction_input(GP_SD3_CD);
-	return !gpio_get_value(GP_SD3_CD);
+	switch (board) {
+	case GW5904:
+		/* emmc is always present */
+		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
+			return 1;
+		break;
+	}
+
+	if (gpio) {
+		debug("%s: gpio%d=%d\n", __func__, gpio, gpio_get_value(gpio));
+		return !gpio_get_value(gpio);
+	}
+
+	return -1;
 }
+
 #endif /* CONFIG_FSL_ESDHC */
@@ -13,7 +13,6 @@
  
 /* GPIO's common to all baseboards */
 #define GP_PHY_RST	IMX_GPIO_NR(1, 30)
-#define GP_SD3_CD	IMX_GPIO_NR(7, 0)
 #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
 #define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
  
@@ -79,6 +78,7 @@
 	int rs232_en;
 	int otgpwr_en;
 	int vsel_pin;
+	int mmc_cd;
 	/* various features */
 	bool usd_vsel;
 };
@@ -64,6 +64,7 @@
 	if (strncasecmp((const char *)info->model, "GW5400-A", 8) == 0)
 		baseboard = '0';
  
+	type = GW_UNKNOWN;
 	switch (baseboard) {
 	case '0': /* original GW5400-A prototype */
 		type = GW54proto;
@@ -91,10 +92,10 @@
 			type = GW553x;
 			break;
 		}
-		/* fall through */
-	default:
-		printf("EEPROM: Unknown model in EEPROM: %s\n", info->model);
-		type = GW_UNKNOWN;
+		break;
+	case '9':
+		if (info->model[4] == '0' && info->model[5] == '4')
+			type = GW5904;
 		break;
 	}
 	return type;
@@ -132,8 +132,9 @@
 	/* toggle PHY_RST# */
 	gpio_request(gpio, "phy_rst#");
 	gpio_direction_output(gpio, 0);
-	mdelay(2);
+	mdelay(10);
 	gpio_set_value(gpio, 1);
+	mdelay(100);
 }
  
 #ifdef CONFIG_USB_EHCI_MX6
@@ -231,6 +232,38 @@
  
 	return 0;
 }
+
+#ifdef CONFIG_MV88E61XX_SWITCH
+int mv88e61xx_hw_reset(struct phy_device *phydev)
+{
+	struct mii_dev *bus = phydev->bus;
+
+	/* GPIO[0] output, CLK125 */
+	debug("enabling RGMII_REFCLK\n");
+	bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
+		   0x1a /*MV_SCRATCH_MISC*/,
+		   (1 << 15) | (0x62 /*MV_GPIO_DIR*/ << 8) | 0xfe);
+	bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
+		   0x1a /*MV_SCRATCH_MISC*/,
+		   (1 << 15) | (0x68 /*MV_GPIO01_CNTL*/ << 8) | 7);
+
+	/* RGMII delay - Physical Control register bit[15:14] */
+	debug("setting port%d RGMII rx/tx delay\n", CONFIG_MV88E61XX_CPU_PORT);
+	/* forced 1000mbps full-duplex link */
+	bus->write(bus, 0x10 + CONFIG_MV88E61XX_CPU_PORT, 0, 1, 0xc0fe);
+	phydev->autoneg = AUTONEG_DISABLE;
+	phydev->speed = SPEED_1000;
+	phydev->duplex = DUPLEX_FULL;
+
+	/* LED configuration: 7:4-green (8=Activity)  3:0 amber (9=10Link) */
+	bus->write(bus, 0x10, 0, 0x16, 0x8089);
+	bus->write(bus, 0x11, 0, 0x16, 0x8089);
+	bus->write(bus, 0x12, 0, 0x16, 0x8089);
+	bus->write(bus, 0x13, 0, 0x16, 0x8089);
+
+	return 0;
+}
+#endif // CONFIG_MV88E61XX_SWITCH
  
 int board_eth_init(bd_t *bis)
 {
@@ -608,6 +608,20 @@
 	memset(__bss_start, 0, __bss_end - __bss_start);
 }
  
+void board_boot_order(u32 *spl_boot_list)
+{
+	spl_boot_list[0] = spl_boot_device();
+	switch (spl_boot_list[0]) {
+	case BOOT_DEVICE_NAND:
+		spl_boot_list[1] = BOOT_DEVICE_MMC1;
+		spl_boot_list[2] = BOOT_DEVICE_UART;
+		break;
+	case BOOT_DEVICE_MMC1:
+		spl_boot_list[1] = BOOT_DEVICE_UART;
+		break;
+	}
+}
+
 /* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
 /* its our chance to print info about boot device */
 void spl_board_init(void)
@@ -112,6 +112,7 @@
 	GW551x,
 	GW552x,
 	GW553x,
+	GW5904,
 	GW_UNKNOWN,
 	GW_BADCRC,
 };
@@ -45,6 +45,7 @@
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_DM=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_VIDEO=y
+CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
+# CONFIG_SYS_STDIO_DEREGISTER is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Ventana > "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_DM=y
+CONFIG_PHYLIB=y
+CONFIG_MV88E61XX_SWITCH=y
+CONFIG_MV88E61XX_CPU_PORT=5
+CONFIG_MV88E61XX_PHY_PORTS=0xf
+CONFIG_MV88E61XX_FIXED_PORTS=0x0
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Gateworks"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
@@ -46,6 +46,7 @@
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_DM=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
@@ -152,7 +152,6 @@
 #define IMX_FEC_BASE             ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE      RGMII
 #define CONFIG_FEC_MXC_PHYADDR   0
-#define CONFIG_PHYLIB
 #define CONFIG_ARP_TIMEOUT       200UL
  
 /* USB Configs */
...	...	@@ -38,6 +38,19 @@
38	38	}
39	39
40	40	/* MMC */
	41	+static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
	42	+ IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	43	+ IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	44	+ IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	45	+ IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	46	+ IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	47	+ IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	48	+ IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	49	+ IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	50	+ IOMUX_PADS(PAD_SD3_CLK__SD3_CLK \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	51	+ IOMUX_PADS(PAD_SD3_CMD__SD3_CMD \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	52	+ IOMUX_PADS(PAD_SD3_RST__SD3_RESET \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
	53	+};
41	54	static iomux_v3_cfg_t const usdhc3_pads[] = {
42	55	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
43	56	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD \| MUX_PAD_CTRL(USDHC_PAD_CTRL)),
...	...	@@ -352,6 +365,41 @@
352	365	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 \| DIO_PAD_CFG),
353	366	};
354	367
	368	+static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
	369	+ /* USB_HUBRST# */
	370	+ IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 \| DIO_PAD_CFG),
	371	+ /* PANLEDG# */
	372	+ IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 \| DIO_PAD_CFG),
	373	+ /* PANLEDR# */
	374	+ IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 \| DIO_PAD_CFG),
	375	+ /* MX6_LOCLED# */
	376	+ IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 \| DIO_PAD_CFG),
	377	+ /* IOEXP_PWREN# */
	378	+ IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 \| DIO_PAD_CFG),
	379	+ /* IOEXP_IRQ# */
	380	+ IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 \| MUX_PAD_CTRL(IRQ_PAD_CTRL)),
	381	+ /* DIOI2C_DIS# */
	382	+ IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 \| DIO_PAD_CFG),
	383	+ /* UART_RS485 */
	384	+ IOMUX_PADS(PAD_DISP0_DAT2__GPIO4_IO23 \| DIO_PAD_CFG),
	385	+ /* UART_HALF */
	386	+ IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 \| DIO_PAD_CFG),
	387	+ /* SKT1_WDIS# */
	388	+ IOMUX_PADS(PAD_DISP0_DAT17__GPIO5_IO11 \| DIO_PAD_CFG),
	389	+ /* SKT1_RST# */
	390	+ IOMUX_PADS(PAD_DISP0_DAT18__GPIO5_IO12 \| DIO_PAD_CFG),
	391	+ /* SKT2_WDIS# */
	392	+ IOMUX_PADS(PAD_DISP0_DAT19__GPIO5_IO13 \| DIO_PAD_CFG),
	393	+ /* SKT2_RST# */
	394	+ IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 \| DIO_PAD_CFG),
	395	+ /* M2_OFF# */
	396	+ IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15 \| DIO_PAD_CFG),
	397	+ /* M2_WDIS# */
	398	+ IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 \| DIO_PAD_CFG),
	399	+ /* M2_RST# */
	400	+ IOMUX_PADS(PAD_SD2_DAT2__GPIO1_IO13 \| DIO_PAD_CFG),
	401	+};
	402	+
355	403	/* Digital I/O */
356	404	struct dio_cfg gw51xx_dio[] = {
357	405	{
...	...	@@ -566,6 +614,81 @@
566	614	},
567	615	};
568	616
	617	+struct dio_cfg gw5904_dio[] = {
	618	+ {
	619	+ { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
	620	+ IMX_GPIO_NR(1, 16),
	621	+ { 0, 0 },
	622	+ 0
	623	+ },
	624	+ {
	625	+ { IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
	626	+ IMX_GPIO_NR(1, 19),
	627	+ { IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
	628	+ 2
	629	+ },
	630	+ {
	631	+ { IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
	632	+ IMX_GPIO_NR(1, 17),
	633	+ { IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
	634	+ 3
	635	+ },
	636	+ {
	637	+ {IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
	638	+ IMX_GPIO_NR(1, 20),
	639	+ { 0, 0 },
	640	+ 0
	641	+ },
	642	+ {
	643	+ {IOMUX_PADS(PAD_NANDF_D0__GPIO2_IO00) },
	644	+ IMX_GPIO_NR(2, 0),
	645	+ { 0, 0 },
	646	+ 0
	647	+ },
	648	+ {
	649	+ {IOMUX_PADS(PAD_NANDF_D1__GPIO2_IO01) },
	650	+ IMX_GPIO_NR(2, 1),
	651	+ { 0, 0 },
	652	+ 0
	653	+ },
	654	+ {
	655	+ {IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02) },
	656	+ IMX_GPIO_NR(2, 2),
	657	+ { 0, 0 },
	658	+ 0
	659	+ },
	660	+ {
	661	+ {IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03) },
	662	+ IMX_GPIO_NR(2, 3),
	663	+ { 0, 0 },
	664	+ 0
	665	+ },
	666	+ {
	667	+ {IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04) },
	668	+ IMX_GPIO_NR(2, 4),
	669	+ { 0, 0 },
	670	+ 0
	671	+ },
	672	+ {
	673	+ {IOMUX_PADS(PAD_NANDF_D5__GPIO2_IO05) },
	674	+ IMX_GPIO_NR(2, 5),
	675	+ { 0, 0 },
	676	+ 0
	677	+ },
	678	+ {
	679	+ {IOMUX_PADS(PAD_NANDF_D6__GPIO2_IO06) },
	680	+ IMX_GPIO_NR(2, 6),
	681	+ { 0, 0 },
	682	+ 0
	683	+ },
	684	+ {
	685	+ {IOMUX_PADS(PAD_NANDF_D7__GPIO2_IO07) },
	686	+ IMX_GPIO_NR(2, 7),
	687	+ { 0, 0 },
	688	+ 0
	689	+ },
	690	+};
	691	+
569	692	/*
570	693	* Board Specific GPIO
571	694	*/
...	...	@@ -588,6 +711,7 @@
588	711	.dioi2c_en = IMX_GPIO_NR(4, 5),
589	712	.pcie_sson = IMX_GPIO_NR(1, 20),
590	713	.otgpwr_en = IMX_GPIO_NR(3, 22),
	714	+ .mmc_cd = IMX_GPIO_NR(7, 0),
591	715	},
592	716
593	717	/* GW51xx */
...	...	@@ -631,6 +755,7 @@
631	755	.rs232_en = GP_RS232_EN,
632	756	.otgpwr_en = IMX_GPIO_NR(3, 22),
633	757	.vsel_pin = IMX_GPIO_NR(6, 14),
	758	+ .mmc_cd = IMX_GPIO_NR(7, 0),
634	759	},
635	760
636	761	/* GW53xx */
...	...	@@ -654,6 +779,7 @@
654	779	.rs232_en = GP_RS232_EN,
655	780	.otgpwr_en = IMX_GPIO_NR(3, 22),
656	781	.vsel_pin = IMX_GPIO_NR(6, 14),
	782	+ .mmc_cd = IMX_GPIO_NR(7, 0),
657	783	},
658	784
659	785	/* GW54xx */
...	...	@@ -679,6 +805,7 @@
679	805	.rs232_en = GP_RS232_EN,
680	806	.otgpwr_en = IMX_GPIO_NR(3, 22),
681	807	.vsel_pin = IMX_GPIO_NR(6, 14),
	808	+ .mmc_cd = IMX_GPIO_NR(7, 0),
682	809	},
683	810
684	811	/* GW551x */
685	812
...	...	@@ -726,7 +853,25 @@
726	853	.wdis = IMX_GPIO_NR(7, 12),
727	854	.otgpwr_en = IMX_GPIO_NR(3, 22),
728	855	.vsel_pin = IMX_GPIO_NR(6, 14),
	856	+ .mmc_cd = IMX_GPIO_NR(7, 0),
729	857	},
	858	+
	859	+ /* GW5904 */
	860	+ {
	861	+ .gpio_pads = gw5904_gpio_pads,
	862	+ .num_pads = ARRAY_SIZE(gw5904_gpio_pads)/2,
	863	+ .dio_cfg = gw5904_dio,
	864	+ .dio_num = ARRAY_SIZE(gw5904_dio),
	865	+ .leds = {
	866	+ IMX_GPIO_NR(4, 6),
	867	+ IMX_GPIO_NR(4, 7),
	868	+ IMX_GPIO_NR(4, 15),
	869	+ },
	870	+ .pcie_rst = IMX_GPIO_NR(1, 0),
	871	+ .mezz_pwren = IMX_GPIO_NR(2, 19),
	872	+ .mezz_irq = IMX_GPIO_NR(2, 18),
	873	+ .otgpwr_en = IMX_GPIO_NR(3, 22),
	874	+ },
730	875	};
731	876
732	877	void setup_iomux_gpio(int board, struct ventana_board_info *info)
...	...	@@ -834,6 +979,30 @@
834	979	gpio_direction_input(gpio_cfg[board].vsel_pin);
835	980	gpio_cfg[board].usd_vsel = !gpio_get_value(gpio_cfg[board].vsel_pin);
836	981	}
	982	+
	983	+ /* microSD CD */
	984	+ if (gpio_cfg[board].mmc_cd) {
	985	+ gpio_request(gpio_cfg[board].mmc_cd, "sd_cd");
	986	+ gpio_direction_input(gpio_cfg[board].mmc_cd);
	987	+ }
	988	+
	989	+ /* Anything else board specific */
	990	+ switch(board) {
	991	+ case GW5904:
	992	+ gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
	993	+ gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
	994	+ gpio_request(IMX_GPIO_NR(5, 12), "skt1_rst#");
	995	+ gpio_direction_output(IMX_GPIO_NR(5, 12), 1);
	996	+ gpio_request(IMX_GPIO_NR(5, 13), "skt2_wdis#");
	997	+ gpio_direction_output(IMX_GPIO_NR(5, 13), 1);
	998	+ gpio_request(IMX_GPIO_NR(1, 15), "m2_off#");
	999	+ gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
	1000	+ gpio_request(IMX_GPIO_NR(1, 14), "m2_wdis#");
	1001	+ gpio_direction_output(IMX_GPIO_NR(1, 14), 1);
	1002	+ gpio_request(IMX_GPIO_NR(1, 13), "m2_rst#");
	1003	+ gpio_direction_output(IMX_GPIO_NR(1, 13), 1);
	1004	+ break;
	1005	+ }
837	1006	}
838	1007
839	1008	/* setup GPIO pinmux and default configuration per baseboard and env */
840	1009
841	1010
842	1011
843	1012
...	...	@@ -995,20 +1164,57 @@
995	1164
996	1165	int board_mmc_init(bd_t *bis)
997	1166	{
998		- /* Only one USDHC controller on Ventana */
999		- SETUP_IOMUX_PADS(usdhc3_pads);
1000		- usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
1001		- usdhc_cfg.max_bus_width = 4;
	1167	+ struct ventana_board_info ventana_info;
	1168	+ int board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
	1169	+ int ret;
1002	1170
1003		- return fsl_esdhc_initialize(bis, &usdhc_cfg);
	1171	+ switch (board_type) {
	1172	+ case GW52xx:
	1173	+ case GW53xx:
	1174	+ case GW54xx:
	1175	+ case GW553x:
	1176	+ /* usdhc3: 4bit microSD */
	1177	+ SETUP_IOMUX_PADS(usdhc3_pads);
	1178	+ usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
	1179	+ usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
	1180	+ usdhc_cfg.max_bus_width = 4;
	1181	+ return fsl_esdhc_initialize(bis, &usdhc_cfg);
	1182	+ case GW5904:
	1183	+ /* usdhc3: 8bit eMMC */
	1184	+ SETUP_IOMUX_PADS(gw5904_emmc_pads);
	1185	+ usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
	1186	+ usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
	1187	+ usdhc_cfg.max_bus_width = 8;
	1188	+ return fsl_esdhc_initialize(bis, &usdhc_cfg);
	1189	+ default:
	1190	+ /* doesn't have MMC */
	1191	+ return -1;
	1192	+ }
1004	1193	}
1005	1194
1006	1195	int board_mmc_getcd(struct mmc *mmc)
1007	1196	{
	1197	+ struct ventana_board_info ventana_info;
	1198	+ struct fsl_esdhc_cfg cfg = (struct fsl_esdhc_cfg )mmc->priv;
	1199	+ int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
	1200	+ int gpio = gpio_cfg[board].mmc_cd;
	1201	+
1008	1202	/* Card Detect */
1009		- gpio_request(GP_SD3_CD, "sd_cd");
1010		- gpio_direction_input(GP_SD3_CD);
1011		- return !gpio_get_value(GP_SD3_CD);
	1203	+ switch (board) {
	1204	+ case GW5904:
	1205	+ /* emmc is always present */
	1206	+ if (cfg->esdhc_base == USDHC3_BASE_ADDR)
	1207	+ return 1;
	1208	+ break;
	1209	+ }
	1210	+
	1211	+ if (gpio) {
	1212	+ debug("%s: gpio%d=%d\n", __func__, gpio, gpio_get_value(gpio));
	1213	+ return !gpio_get_value(gpio);
	1214	+ }
	1215	+
	1216	+ return -1;
1012	1217	}
	1218	+
1013	1219	#endif /* CONFIG_FSL_ESDHC */
...	...	@@ -13,7 +13,6 @@
13	13
14	14	/* GPIO's common to all baseboards */
15	15	#define GP_PHY_RST IMX_GPIO_NR(1, 30)
16		-#define GP_SD3_CD IMX_GPIO_NR(7, 0)
17	16	#define GP_RS232_EN IMX_GPIO_NR(2, 11)
18	17	#define GP_MSATA_SEL IMX_GPIO_NR(2, 8)
19	18
...	...	@@ -79,6 +78,7 @@
79	78	int rs232_en;
80	79	int otgpwr_en;
81	80	int vsel_pin;
	81	+ int mmc_cd;
82	82	/* various features */
83	83	bool usd_vsel;
84	84	};
...	...	@@ -64,6 +64,7 @@
64	64	if (strncasecmp((const char *)info->model, "GW5400-A", 8) == 0)
65	65	baseboard = '0';
66	66
	67	+ type = GW_UNKNOWN;
67	68	switch (baseboard) {
68	69	case '0': /* original GW5400-A prototype */
69	70	type = GW54proto;
...	...	@@ -91,10 +92,10 @@
91	92	type = GW553x;
92	93	break;
93	94	}
94		- /* fall through */
95		- default:
96		- printf("EEPROM: Unknown model in EEPROM: %s\n", info->model);
97		- type = GW_UNKNOWN;
	95	+ break;
	96	+ case '9':
	97	+ if (info->model[4] == '0' && info->model[5] == '4')
	98	+ type = GW5904;
98	99	break;
99	100	}
100	101	return type;
...	...	@@ -132,8 +132,9 @@
132	132	/* toggle PHY_RST# */
133	133	gpio_request(gpio, "phy_rst#");
134	134	gpio_direction_output(gpio, 0);
135		- mdelay(2);
	135	+ mdelay(10);
136	136	gpio_set_value(gpio, 1);
	137	+ mdelay(100);
137	138	}
138	139
139	140	#ifdef CONFIG_USB_EHCI_MX6
...	...	@@ -231,6 +232,38 @@
231	232
232	233	return 0;
233	234	}
	235	+
	236	+#ifdef CONFIG_MV88E61XX_SWITCH
	237	+int mv88e61xx_hw_reset(struct phy_device *phydev)
	238	+{
	239	+ struct mii_dev *bus = phydev->bus;
	240	+
	241	+ /* GPIO[0] output, CLK125 */
	242	+ debug("enabling RGMII_REFCLK\n");
	243	+ bus->write(bus, 0x1c /MV_GLOBAL2/, 0,
	244	+ 0x1a /MV_SCRATCH_MISC/,
	245	+ (1 << 15) \| (0x62 /MV_GPIO_DIR/ << 8) \| 0xfe);
	246	+ bus->write(bus, 0x1c /MV_GLOBAL2/, 0,
	247	+ 0x1a /MV_SCRATCH_MISC/,
	248	+ (1 << 15) \| (0x68 /MV_GPIO01_CNTL/ << 8) \| 7);
	249	+
	250	+ /* RGMII delay - Physical Control register bit[15:14] */
	251	+ debug("setting port%d RGMII rx/tx delay\n", CONFIG_MV88E61XX_CPU_PORT);
	252	+ /* forced 1000mbps full-duplex link */
	253	+ bus->write(bus, 0x10 + CONFIG_MV88E61XX_CPU_PORT, 0, 1, 0xc0fe);
	254	+ phydev->autoneg = AUTONEG_DISABLE;
	255	+ phydev->speed = SPEED_1000;
	256	+ phydev->duplex = DUPLEX_FULL;
	257	+
	258	+ /* LED configuration: 7:4-green (8=Activity) 3:0 amber (9=10Link) */
	259	+ bus->write(bus, 0x10, 0, 0x16, 0x8089);
	260	+ bus->write(bus, 0x11, 0, 0x16, 0x8089);
	261	+ bus->write(bus, 0x12, 0, 0x16, 0x8089);
	262	+ bus->write(bus, 0x13, 0, 0x16, 0x8089);
	263	+
	264	+ return 0;
	265	+}
	266	+#endif // CONFIG_MV88E61XX_SWITCH
234	267
235	268	int board_eth_init(bd_t *bis)
236	269	{
...	...	@@ -608,6 +608,20 @@
608	608	memset(__bss_start, 0, __bss_end - __bss_start);
609	609	}
610	610
	611	+void board_boot_order(u32 *spl_boot_list)
	612	+{
	613	+ spl_boot_list[0] = spl_boot_device();
	614	+ switch (spl_boot_list[0]) {
	615	+ case BOOT_DEVICE_NAND:
	616	+ spl_boot_list[1] = BOOT_DEVICE_MMC1;
	617	+ spl_boot_list[2] = BOOT_DEVICE_UART;
	618	+ break;
	619	+ case BOOT_DEVICE_MMC1:
	620	+ spl_boot_list[1] = BOOT_DEVICE_UART;
	621	+ break;
	622	+ }
	623	+}
	624	+
611	625	/* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
612	626	/* its our chance to print info about boot device */
613	627	void spl_board_init(void)
...	...	@@ -112,6 +112,7 @@
112	112	GW551x,
113	113	GW552x,
114	114	GW553x,
	115	+ GW5904,
115	116	GW_UNKNOWN,
116	117	GW_BADCRC,
117	118	};
...	...	@@ -45,6 +45,7 @@
45	45	CONFIG_CMD_FS_GENERIC=y
46	46	CONFIG_CMD_UBI=y
47	47	CONFIG_DM=y
	48	+CONFIG_PHYLIB=y
48	49	CONFIG_NETDEVICES=y
49	50	CONFIG_E1000=y
50	51	CONFIG_PCI=y
	1	+CONFIG_ARM=y
	2	+CONFIG_ARCH_MX6=y
	3	+CONFIG_SPL_GPIO_SUPPORT=y
	4	+CONFIG_SPL_LIBCOMMON_SUPPORT=y
	5	+CONFIG_SPL_LIBGENERIC_SUPPORT=y
	6	+CONFIG_TARGET_GW_VENTANA=y
	7	+CONFIG_SPL_I2C_SUPPORT=y
	8	+CONFIG_SPL_MMC_SUPPORT=y
	9	+CONFIG_SPL_POWER_SUPPORT=y
	10	+CONFIG_SPL_SERIAL_SUPPORT=y
	11	+CONFIG_SPL_WATCHDOG_SUPPORT=y
	12	+CONFIG_VIDEO=y
	13	+CONFIG_SPL_STACK_R_ADDR=0x18000000
	14	+CONFIG_FIT=y
	15	+CONFIG_FIT_VERBOSE=y
	16	+CONFIG_OF_BOARD_SETUP=y
	17	+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
	18	+CONFIG_BOOTDELAY=3
	19	+# CONFIG_SYS_STDIO_DEREGISTER is not set
	20	+# CONFIG_DISPLAY_BOARDINFO is not set
	21	+CONFIG_BOARD_EARLY_INIT_F=y
	22	+CONFIG_SPL=y
	23	+CONFIG_SPL_STACK_R=y
	24	+CONFIG_SPL_DMA_SUPPORT=y
	25	+CONFIG_SPL_OS_BOOT=y
	26	+CONFIG_HUSH_PARSER=y
	27	+CONFIG_SYS_PROMPT="Ventana > "
	28	+CONFIG_CMD_BOOTZ=y
	29	+# CONFIG_CMD_IMLS is not set
	30	+# CONFIG_CMD_FLASH is not set
	31	+CONFIG_CMD_MMC=y
	32	+CONFIG_CMD_I2C=y
	33	+CONFIG_CMD_USB=y
	34	+CONFIG_CMD_USB_MASS_STORAGE=y
	35	+CONFIG_CMD_GPIO=y
	36	+CONFIG_CMD_DHCP=y
	37	+CONFIG_CMD_MII=y
	38	+CONFIG_CMD_PING=y
	39	+CONFIG_CMD_CACHE=y
	40	+CONFIG_CMD_TIME=y
	41	+CONFIG_CMD_EXT2=y
	42	+CONFIG_CMD_EXT4=y
	43	+CONFIG_CMD_EXT4_WRITE=y
	44	+CONFIG_CMD_FAT=y
	45	+CONFIG_CMD_FS_GENERIC=y
	46	+CONFIG_CMD_UBI=y
	47	+CONFIG_DM=y
	48	+CONFIG_PHYLIB=y
	49	+CONFIG_MV88E61XX_SWITCH=y
	50	+CONFIG_MV88E61XX_CPU_PORT=5
	51	+CONFIG_MV88E61XX_PHY_PORTS=0xf
	52	+CONFIG_MV88E61XX_FIXED_PORTS=0x0
	53	+CONFIG_NETDEVICES=y
	54	+CONFIG_E1000=y
	55	+CONFIG_PCI=y
	56	+CONFIG_DM_SERIAL=y
	57	+CONFIG_USB=y
	58	+CONFIG_USB_STORAGE=y
	59	+CONFIG_USB_KEYBOARD=y
	60	+CONFIG_USB_GADGET=y
	61	+CONFIG_CI_UDC=y
	62	+CONFIG_USB_GADGET_DOWNLOAD=y
	63	+CONFIG_G_DNL_MANUFACTURER="Gateworks"
	64	+CONFIG_G_DNL_VENDOR_NUM=0x0525
	65	+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
	66	+# CONFIG_VIDEO_SW_CURSOR is not set
	67	+CONFIG_OF_LIBFDT=y
	68	+CONFIG_FDT_FIXUP_PARTITIONS=y
...	...	@@ -46,6 +46,7 @@
46	46	CONFIG_CMD_FS_GENERIC=y
47	47	CONFIG_CMD_UBI=y
48	48	CONFIG_DM=y
	49	+CONFIG_PHYLIB=y
49	50	CONFIG_NETDEVICES=y
50	51	CONFIG_E1000=y
51	52	CONFIG_PCI=y
...	...	@@ -152,7 +152,6 @@
152	152	#define IMX_FEC_BASE ENET_BASE_ADDR
153	153	#define CONFIG_FEC_XCV_TYPE RGMII
154	154	#define CONFIG_FEC_MXC_PHYADDR 0
155		-#define CONFIG_PHYLIB
156	155	#define CONFIG_ARP_TIMEOUT 200UL
157	156
158	157	/* USB Configs */