Commit 8de11a5eefbb86ee6683a5f5b5b65795ab17f667

Authored by Masahiro Yamada
1 parent 4914a68de7

ARM: uniphier: remove unneeded NAND config options

CONFIG_NAND_DENALI select's CONFIG_SYS_NAND_SELF_INIT, so the
NAND initialization process is driven by the driver itself.
CONFIG_SYS_NAND_MAX_CHIPS and CONFIG_SYS_NAND_BASE are unused.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Showing 1 changed file with 0 additions and 3 deletions Inline Diff

include/configs/uniphier.h
1 /* 1 /*
2 * Copyright (C) 2012-2015 Panasonic Corporation 2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc. 3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 5 *
6 * SPDX-License-Identifier: GPL-2.0+ 6 * SPDX-License-Identifier: GPL-2.0+
7 */ 7 */
8 8
9 /* U-Boot - Common settings for UniPhier Family */ 9 /* U-Boot - Common settings for UniPhier Family */
10 10
11 #ifndef __CONFIG_UNIPHIER_COMMON_H__ 11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
12 #define __CONFIG_UNIPHIER_COMMON_H__ 12 #define __CONFIG_UNIPHIER_COMMON_H__
13 13
14 #define CONFIG_ARMV7_PSCI_1_0 14 #define CONFIG_ARMV7_PSCI_1_0
15 15
16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
17 17
18 /*----------------------------------------------------------------------- 18 /*-----------------------------------------------------------------------
19 * MMU and Cache Setting 19 * MMU and Cache Setting
20 *----------------------------------------------------------------------*/ 20 *----------------------------------------------------------------------*/
21 21
22 /* Comment out the following to enable L1 cache */ 22 /* Comment out the following to enable L1 cache */
23 /* #define CONFIG_SYS_ICACHE_OFF */ 23 /* #define CONFIG_SYS_ICACHE_OFF */
24 /* #define CONFIG_SYS_DCACHE_OFF */ 24 /* #define CONFIG_SYS_DCACHE_OFF */
25 25
26 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 26 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
27 27
28 #define CONFIG_TIMESTAMP 28 #define CONFIG_TIMESTAMP
29 29
30 /* FLASH related */ 30 /* FLASH related */
31 #define CONFIG_MTD_DEVICE 31 #define CONFIG_MTD_DEVICE
32 32
33 #define CONFIG_SMC911X_32_BIT 33 #define CONFIG_SMC911X_32_BIT
34 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */ 34 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
35 #define CONFIG_SMC911X_BASE 0 35 #define CONFIG_SMC911X_BASE 0
36 36
37 #ifdef CONFIG_MICRO_SUPPORT_CARD 37 #ifdef CONFIG_MICRO_SUPPORT_CARD
38 #define CONFIG_SMC911X 38 #define CONFIG_SMC911X
39 #endif 39 #endif
40 40
41 #define CONFIG_FLASH_CFI_DRIVER 41 #define CONFIG_FLASH_CFI_DRIVER
42 #define CONFIG_SYS_FLASH_CFI 42 #define CONFIG_SYS_FLASH_CFI
43 43
44 #define CONFIG_SYS_MAX_FLASH_SECT 256 44 #define CONFIG_SYS_MAX_FLASH_SECT 256
45 #define CONFIG_SYS_MONITOR_BASE 0 45 #define CONFIG_SYS_MONITOR_BASE 0
46 #define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */ 46 #define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */
47 #define CONFIG_SYS_FLASH_BASE 0 47 #define CONFIG_SYS_FLASH_BASE 0
48 48
49 /* 49 /*
50 * flash_toggle does not work for our support card. 50 * flash_toggle does not work for our support card.
51 * We need to use flash_status_poll. 51 * We need to use flash_status_poll.
52 */ 52 */
53 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 53 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
54 54
55 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 55 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
56 56
57 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 57 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
58 58
59 /* serial console configuration */ 59 /* serial console configuration */
60 60
61 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 61 #define CONFIG_SYS_LONGHELP /* undef to save memory */
62 62
63 #define CONFIG_CMDLINE_EDITING /* add command line history */ 63 #define CONFIG_CMDLINE_EDITING /* add command line history */
64 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 64 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
65 /* Print Buffer Size */ 65 /* Print Buffer Size */
66 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 66 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
67 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 67 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
68 /* Boot Argument Buffer Size */ 68 /* Boot Argument Buffer Size */
69 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 69 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
70 70
71 #define CONFIG_CONS_INDEX 1 71 #define CONFIG_CONS_INDEX 1
72 72
73 #define CONFIG_ENV_OFFSET 0x100000 73 #define CONFIG_ENV_OFFSET 0x100000
74 #define CONFIG_ENV_SIZE 0x2000 74 #define CONFIG_ENV_SIZE 0x2000
75 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 75 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
76 76
77 #define CONFIG_SYS_MMC_ENV_DEV 0 77 #define CONFIG_SYS_MMC_ENV_DEV 0
78 #define CONFIG_SYS_MMC_ENV_PART 1 78 #define CONFIG_SYS_MMC_ENV_PART 1
79 79
80 #if !defined(CONFIG_ARM64) 80 #if !defined(CONFIG_ARM64)
81 /* Time clock 1MHz */ 81 /* Time clock 1MHz */
82 #define CONFIG_SYS_TIMER_RATE 1000000 82 #define CONFIG_SYS_TIMER_RATE 1000000
83 #endif 83 #endif
84 84
85 #define CONFIG_SYS_MAX_NAND_DEVICE 1 85 #define CONFIG_SYS_MAX_NAND_DEVICE 1
86 #define CONFIG_SYS_NAND_MAX_CHIPS 2
87 #define CONFIG_SYS_NAND_ONFI_DETECTION 86 #define CONFIG_SYS_NAND_ONFI_DETECTION
88 87
89 #define CONFIG_NAND_DENALI_ECC_SIZE 1024 88 #define CONFIG_NAND_DENALI_ECC_SIZE 1024
90 89
91 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 90 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000
92 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 91 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000
93
94 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10)
95 92
96 #define CONFIG_SYS_NAND_USE_FLASH_BBT 93 #define CONFIG_SYS_NAND_USE_FLASH_BBT
97 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 94 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
98 95
99 /* SD/MMC */ 96 /* SD/MMC */
100 #define CONFIG_SUPPORT_EMMC_BOOT 97 #define CONFIG_SUPPORT_EMMC_BOOT
101 98
102 /* memtest works on */ 99 /* memtest works on */
103 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 100 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
104 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) 101 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
105 102
106 /* 103 /*
107 * Network Configuration 104 * Network Configuration
108 */ 105 */
109 #define CONFIG_SERVERIP 192.168.11.1 106 #define CONFIG_SERVERIP 192.168.11.1
110 #define CONFIG_IPADDR 192.168.11.10 107 #define CONFIG_IPADDR 192.168.11.10
111 #define CONFIG_GATEWAYIP 192.168.11.1 108 #define CONFIG_GATEWAYIP 192.168.11.1
112 #define CONFIG_NETMASK 255.255.255.0 109 #define CONFIG_NETMASK 255.255.255.0
113 110
114 #define CONFIG_LOADADDR 0x84000000 111 #define CONFIG_LOADADDR 0x84000000
115 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 112 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
116 113
117 #define CONFIG_CMDLINE_EDITING /* add command line history */ 114 #define CONFIG_CMDLINE_EDITING /* add command line history */
118 115
119 #if defined(CONFIG_ARM64) 116 #if defined(CONFIG_ARM64)
120 /* ARM Trusted Firmware */ 117 /* ARM Trusted Firmware */
121 #define BOOT_IMAGES \ 118 #define BOOT_IMAGES \
122 "second_image=unph_bl.bin\0" \ 119 "second_image=unph_bl.bin\0" \
123 "third_image=fip.bin\0" 120 "third_image=fip.bin\0"
124 #else 121 #else
125 #define BOOT_IMAGES \ 122 #define BOOT_IMAGES \
126 "second_image=u-boot-spl.bin\0" \ 123 "second_image=u-boot-spl.bin\0" \
127 "third_image=u-boot.bin\0" 124 "third_image=u-boot.bin\0"
128 #endif 125 #endif
129 126
130 #define CONFIG_BOOTCOMMAND "run $bootmode" 127 #define CONFIG_BOOTCOMMAND "run $bootmode"
131 128
132 #define CONFIG_ROOTPATH "/nfs/root/path" 129 #define CONFIG_ROOTPATH "/nfs/root/path"
133 #define CONFIG_NFSBOOTCOMMAND \ 130 #define CONFIG_NFSBOOTCOMMAND \
134 "setenv bootargs $bootargs root=/dev/nfs rw " \ 131 "setenv bootargs $bootargs root=/dev/nfs rw " \
135 "nfsroot=$serverip:$rootpath " \ 132 "nfsroot=$serverip:$rootpath " \
136 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ 133 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
137 "run __nfsboot" 134 "run __nfsboot"
138 135
139 #ifdef CONFIG_FIT 136 #ifdef CONFIG_FIT
140 #define CONFIG_BOOTFILE "fitImage" 137 #define CONFIG_BOOTFILE "fitImage"
141 #define LINUXBOOT_ENV_SETTINGS \ 138 #define LINUXBOOT_ENV_SETTINGS \
142 "fit_addr=0x00100000\0" \ 139 "fit_addr=0x00100000\0" \
143 "fit_addr_r=0x84100000\0" \ 140 "fit_addr_r=0x84100000\0" \
144 "fit_size=0x00f00000\0" \ 141 "fit_size=0x00f00000\0" \
145 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ 142 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
146 "bootm $fit_addr\0" \ 143 "bootm $fit_addr\0" \
147 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ 144 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
148 "bootm $fit_addr_r\0" \ 145 "bootm $fit_addr_r\0" \
149 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ 146 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \
150 "bootm $fit_addr_r\0" \ 147 "bootm $fit_addr_r\0" \
151 "__nfsboot=run tftpboot\0" 148 "__nfsboot=run tftpboot\0"
152 #else 149 #else
153 #ifdef CONFIG_ARM64 150 #ifdef CONFIG_ARM64
154 #define CONFIG_BOOTFILE "Image.gz" 151 #define CONFIG_BOOTFILE "Image.gz"
155 #define LINUXBOOT_CMD "booti" 152 #define LINUXBOOT_CMD "booti"
156 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x84200000\0" 153 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x84200000\0"
157 #define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0" 154 #define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0"
158 #else 155 #else
159 #define CONFIG_BOOTFILE "zImage" 156 #define CONFIG_BOOTFILE "zImage"
160 #define LINUXBOOT_CMD "bootz" 157 #define LINUXBOOT_CMD "bootz"
161 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x80208000\0" 158 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x80208000\0"
162 #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0" 159 #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0"
163 #endif 160 #endif
164 #define LINUXBOOT_ENV_SETTINGS \ 161 #define LINUXBOOT_ENV_SETTINGS \
165 "fdt_addr=0x00100000\0" \ 162 "fdt_addr=0x00100000\0" \
166 "fdt_addr_r=0x84100000\0" \ 163 "fdt_addr_r=0x84100000\0" \
167 "fdt_size=0x00008000\0" \ 164 "fdt_size=0x00008000\0" \
168 "kernel_addr=0x00200000\0" \ 165 "kernel_addr=0x00200000\0" \
169 KERNEL_ADDR_LOAD \ 166 KERNEL_ADDR_LOAD \
170 KERNEL_ADDR_R \ 167 KERNEL_ADDR_R \
171 "kernel_size=0x00800000\0" \ 168 "kernel_size=0x00800000\0" \
172 "ramdisk_addr=0x00a00000\0" \ 169 "ramdisk_addr=0x00a00000\0" \
173 "ramdisk_addr_r=0x84a00000\0" \ 170 "ramdisk_addr_r=0x84a00000\0" \
174 "ramdisk_size=0x00600000\0" \ 171 "ramdisk_size=0x00600000\0" \
175 "ramdisk_file=rootfs.cpio.uboot\0" \ 172 "ramdisk_file=rootfs.cpio.uboot\0" \
176 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \ 173 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
177 "if test $kernel_addr_load = $kernel_addr_r; then " \ 174 "if test $kernel_addr_load = $kernel_addr_r; then " \
178 "true; " \ 175 "true; " \
179 "else " \ 176 "else " \
180 "unzip $kernel_addr_load $kernel_addr_r; " \ 177 "unzip $kernel_addr_load $kernel_addr_r; " \
181 "fi && " \ 178 "fi && " \
182 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ 179 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
183 "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \ 180 "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
184 "setexpr kernel_size_div4 $kernel_size / 4 && " \ 181 "setexpr kernel_size_div4 $kernel_size / 4 && " \
185 "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \ 182 "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
186 "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \ 183 "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
187 "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \ 184 "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
188 "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \ 185 "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
189 "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \ 186 "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
190 "setexpr fdt_size_div4 $fdt_size / 4 && " \ 187 "setexpr fdt_size_div4 $fdt_size / 4 && " \
191 "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \ 188 "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
192 "run boot_common\0" \ 189 "run boot_common\0" \
193 "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \ 190 "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
194 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ 191 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
195 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ 192 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
196 "run boot_common\0" \ 193 "run boot_common\0" \
197 "tftpboot=tftpboot $kernel_addr_load $bootfile && " \ 194 "tftpboot=tftpboot $kernel_addr_load $bootfile && " \
198 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ 195 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
199 "tftpboot $fdt_addr_r $fdt_file &&" \ 196 "tftpboot $fdt_addr_r $fdt_file &&" \
200 "run boot_common\0" \ 197 "run boot_common\0" \
201 "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \ 198 "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
202 "tftpboot $fdt_addr_r $fdt_file &&" \ 199 "tftpboot $fdt_addr_r $fdt_file &&" \
203 "setenv ramdisk_addr_r - &&" \ 200 "setenv ramdisk_addr_r - &&" \
204 "run boot_common\0" 201 "run boot_common\0"
205 #endif 202 #endif
206 203
207 #define CONFIG_EXTRA_ENV_SETTINGS \ 204 #define CONFIG_EXTRA_ENV_SETTINGS \
208 "netdev=eth0\0" \ 205 "netdev=eth0\0" \
209 "verify=n\0" \ 206 "verify=n\0" \
210 "initrd_high=0xffffffffffffffff\0" \ 207 "initrd_high=0xffffffffffffffff\0" \
211 "nor_base=0x42000000\0" \ 208 "nor_base=0x42000000\0" \
212 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ 209 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \
213 "tftpboot $tmp_addr $second_image && " \ 210 "tftpboot $tmp_addr $second_image && " \
214 "setexpr tmp_addr $nor_base + 0x70000 && " \ 211 "setexpr tmp_addr $nor_base + 0x70000 && " \
215 "tftpboot $tmp_addr $third_image\0" \ 212 "tftpboot $tmp_addr $third_image\0" \
216 "emmcupdate=mmcsetn &&" \ 213 "emmcupdate=mmcsetn &&" \
217 "mmc partconf $mmc_first_dev 0 1 1 &&" \ 214 "mmc partconf $mmc_first_dev 0 1 1 &&" \
218 "tftpboot $second_image && " \ 215 "tftpboot $second_image && " \
219 "mmc write $loadaddr 0 100 && " \ 216 "mmc write $loadaddr 0 100 && " \
220 "tftpboot $third_image && " \ 217 "tftpboot $third_image && " \
221 "mmc write $loadaddr 100 700\0" \ 218 "mmc write $loadaddr 100 700\0" \
222 "nandupdate=nand erase 0 0x00100000 &&" \ 219 "nandupdate=nand erase 0 0x00100000 &&" \
223 "tftpboot $second_image && " \ 220 "tftpboot $second_image && " \
224 "nand write $loadaddr 0 0x00020000 && " \ 221 "nand write $loadaddr 0 0x00020000 && " \
225 "tftpboot $third_image && " \ 222 "tftpboot $third_image && " \
226 "nand write $loadaddr 0x00020000 0x000e0000\0" \ 223 "nand write $loadaddr 0x00020000 0x000e0000\0" \
227 "usbupdate=usb start &&" \ 224 "usbupdate=usb start &&" \
228 "tftpboot $second_image && " \ 225 "tftpboot $second_image && " \
229 "usb write $loadaddr 0 100 && " \ 226 "usb write $loadaddr 0 100 && " \
230 "tftpboot $third_image && " \ 227 "tftpboot $third_image && " \
231 "usb write $loadaddr 100 700\0" \ 228 "usb write $loadaddr 100 700\0" \
232 BOOT_IMAGES \ 229 BOOT_IMAGES \
233 LINUXBOOT_ENV_SETTINGS 230 LINUXBOOT_ENV_SETTINGS
234 231
235 #define CONFIG_SYS_BOOTMAPSZ 0x20000000 232 #define CONFIG_SYS_BOOTMAPSZ 0x20000000
236 233
237 #define CONFIG_SYS_SDRAM_BASE 0x80000000 234 #define CONFIG_SYS_SDRAM_BASE 0x80000000
238 #define CONFIG_NR_DRAM_BANKS 3 235 #define CONFIG_NR_DRAM_BANKS 3
239 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */ 236 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
240 #define CONFIG_SYS_MEM_TOP_HIDE 64 237 #define CONFIG_SYS_MEM_TOP_HIDE 64
241 238
242 #define CONFIG_PANIC_HANG 239 #define CONFIG_PANIC_HANG
243 240
244 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) 241 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
245 242
246 /* only for SPL */ 243 /* only for SPL */
247 #if defined(CONFIG_ARCH_UNIPHIER_LD4) || \ 244 #if defined(CONFIG_ARCH_UNIPHIER_LD4) || \
248 defined(CONFIG_ARCH_UNIPHIER_SLD8) 245 defined(CONFIG_ARCH_UNIPHIER_SLD8)
249 #define CONFIG_SPL_TEXT_BASE 0x00040000 246 #define CONFIG_SPL_TEXT_BASE 0x00040000
250 #else 247 #else
251 #define CONFIG_SPL_TEXT_BASE 0x00100000 248 #define CONFIG_SPL_TEXT_BASE 0x00100000
252 #endif 249 #endif
253 250
254 #define CONFIG_SPL_STACK (0x00100000) 251 #define CONFIG_SPL_STACK (0x00100000)
255 252
256 #define CONFIG_SPL_FRAMEWORK 253 #define CONFIG_SPL_FRAMEWORK
257 254
258 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 255 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
259 256
260 /* subtract sizeof(struct image_header) */ 257 /* subtract sizeof(struct image_header) */
261 #define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40) 258 #define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40)
262 259
263 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 260 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
264 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 261 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000
265 #define CONFIG_SPL_MAX_SIZE 0x10000 262 #define CONFIG_SPL_MAX_SIZE 0x10000
266 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 263 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000
267 264
268 #define CONFIG_SPL_PAD_TO 0x20000 265 #define CONFIG_SPL_PAD_TO 0x20000
269 266
270 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ 267 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */
271 268