Commit 8e427ba35170a6b5966c28e59192d0561f989f65

Authored by Chris Packham
Committed by Stefan Roese
1 parent 8562e41464

watchdog: orion_wdt: take timeout value in ms

The generic wdt_start API expects to be called with the timeout in
milliseconds. Update the orion_wdt driver to accept a timeout in
milliseconds and use the clock rate specified in the dts to convert the
timeout to an appropriate value for the timer reload register.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

Showing 3 changed files with 21 additions and 5 deletions Side-by-side Diff

board/CZ.NIC/turris_omnia/turris_omnia.c
... ... @@ -379,7 +379,7 @@
379 379 puts("Cannot find Armada 385 watchdog!\n");
380 380 } else {
381 381 puts("Enabling Armada 385 watchdog.\n");
382   - wdt_start(watchdog_dev, (u32) 25000000 * 120, 0);
  382 + wdt_start(watchdog_dev, 120000, 0);
383 383 }
384 384 # endif
385 385  
drivers/watchdog/Kconfig
... ... @@ -97,6 +97,7 @@
97 97 config WDT_ORION
98 98 bool "Orion watchdog timer support"
99 99 depends on WDT
  100 + select CLK
100 101 help
101 102 Select this to enable Orion watchdog timer, which can be found on some
102 103 Marvell Armada chips.
drivers/watchdog/orion_wdt.c
... ... @@ -14,7 +14,9 @@
14 14  
15 15 #include <common.h>
16 16 #include <dm.h>
  17 +#include <clk.h>
17 18 #include <wdt.h>
  19 +#include <linux/kernel.h>
18 20 #include <asm/io.h>
19 21 #include <asm/arch/cpu.h>
20 22 #include <asm/arch/soc.h>
... ... @@ -27,6 +29,8 @@
27 29 void __iomem *rstout;
28 30 void __iomem *rstout_mask;
29 31 u32 timeout;
  32 + unsigned long clk_rate;
  33 + struct clk clk;
30 34 };
31 35  
32 36 #define RSTOUT_ENABLE_BIT BIT(8)
33 37  
34 38  
... ... @@ -44,17 +48,18 @@
44 48 struct orion_wdt_priv *priv = dev_get_priv(dev);
45 49  
46 50 /* Reload watchdog duration */
47   - writel(priv->timeout, priv->reg + priv->wdt_counter_offset);
  51 + writel(priv->clk_rate * priv->timeout,
  52 + priv->reg + priv->wdt_counter_offset);
48 53  
49 54 return 0;
50 55 }
51 56  
52   -static int orion_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
  57 +static int orion_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
53 58 {
54 59 struct orion_wdt_priv *priv = dev_get_priv(dev);
55 60 u32 reg;
56 61  
57   - priv->timeout = (u32) timeout;
  62 + priv->timeout = DIV_ROUND_UP(timeout_ms, 1000);
58 63  
59 64 /* Enable the fixed watchdog clock input */
60 65 reg = readl(priv->reg + TIMER_CTRL);
... ... @@ -62,7 +67,8 @@
62 67 writel(reg, priv->reg + TIMER_CTRL);
63 68  
64 69 /* Set watchdog duration */
65   - writel(priv->timeout, priv->reg + priv->wdt_counter_offset);
  70 + writel(priv->clk_rate * priv->timeout,
  71 + priv->reg + priv->wdt_counter_offset);
66 72  
67 73 /* Clear the watchdog expiration bit */
68 74 reg = readl(priv->reg + TIMER_A370_STATUS);
69 75  
... ... @@ -147,8 +153,17 @@
147 153  
148 154 static int orion_wdt_probe(struct udevice *dev)
149 155 {
  156 + struct orion_wdt_priv *priv = dev_get_priv(dev);
  157 + int ret;
  158 +
150 159 debug("%s: Probing wdt%u\n", __func__, dev->seq);
151 160 orion_wdt_stop(dev);
  161 +
  162 + ret = clk_get_by_name(dev, "fixed", &priv->clk);
  163 + if (!ret)
  164 + priv->clk_rate = clk_get_rate(&priv->clk);
  165 + else
  166 + priv->clk_rate = 25000000;
152 167  
153 168 return 0;
154 169 }