armv8/ls1043aqds: Spilt off board device tree

Move new /chosen node out of the board device tree. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>

armv8/ls1043aqds: Spilt off board device tree
Move new /chosen node out of the board device tree. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
Wenbin Song · York Sun
1 parent 8c35cc3b7e
Showing 5 changed files with 141 additions and 126 deletions Side-by-side Diff
arch/arm/dts/Makefile
arch/arm/dts/fsl-ls1043a-qds-duart.dts
arch/arm/dts/fsl-ls1043a-qds.dts
arch/arm/dts/fsl-ls1043a-qds.dtsi
configs/ls1043aqds_defconfig
@@ -97,7 +97,7 @@
 	ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb
 dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
 	fsl-ls2080a-rdb.dtb
-dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \
+dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
 	fsl-ls1043a-rdb.dtb
  
 dtb-$(CONFIG_MACH_SUN4I) += \
+/*
+ * Device Tree file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright (C) 2015, Freescale Semiconductor
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+#include "fsl-ls1043a-qds.dtsi"
+
+/ {
+       chosen {
+               stdout-path = &duart0;
+       };
+};
-/*
- * Device Tree Include file for Freescale Layerscape-1043A family SoC.
- *
- * Copyright (C) 2015, Freescale Semiconductor
- *
- * Mingkai Hu <Mingkai.hu@freescale.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-/dts-v1/;
-/include/ "fsl-ls1043a.dtsi"
-
-/ {
-	model = "LS1043A QDS Board";
-};
-
-&i2c0 {
-	status = "okay";
-	pca9547@77 {
-		compatible = "philips,pca9547";
-		reg = <0x77>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		i2c@0 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x0>;
-
-			rtc@68 {
-				compatible = "dallas,ds3232";
-				reg = <0x68>;
-				/* IRQ10_B */
-				interrupts = <0 150 0x4>;
-			};
-		};
-
-		i2c@2 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x2>;
-
-			ina220@40 {
-				compatible = "ti,ina220";
-				reg = <0x40>;
-				shunt-resistor = <1000>;
-			};
-
-			ina220@41 {
-				compatible = "ti,ina220";
-				reg = <0x41>;
-				shunt-resistor = <1000>;
-			};
-		};
-
-		i2c@3 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x3>;
-
-			eeprom@56 {
-				compatible = "at24,24c512";
-				reg = <0x56>;
-			};
-
-			eeprom@57 {
-				compatible = "at24,24c512";
-				reg = <0x57>;
-			};
-
-			adt7461a@4c {
-				compatible = "adt7461a";
-				reg = <0x4c>;
-			};
-		};
-	};
-};
-
-&ifc {
-	#address-cells = <2>;
-	#size-cells = <1>;
-	/* NOR, NAND Flashes and FPGA on board */
-	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
-		  0x2 0x0 0x0 0x7e800000 0x00010000
-		  0x3 0x0 0x0 0x7fb00000 0x00000100>;
-	status = "okay";
-
-	nor@0,0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "cfi-flash";
-		reg = <0x0 0x0 0x8000000>;
-		bank-width = <2>;
-		device-width = <1>;
-	};
-
-	nand@2,0 {
-		compatible = "fsl,ifc-nand";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		reg = <0x1 0x0 0x10000>;
-	};
-
-	fpga: board-control@3,0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		reg = <0x3 0x0 0x0000100>;
-		bank-width = <1>;
-		device-width = <1>;
-		ranges = <0 3 0 0x100>;
-	};
-};
-
-&duart0 {
-	status = "okay";
-};
-
-&duart1 {
-	status = "okay";
-};
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright (C) 2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/include/ "fsl-ls1043a.dtsi"
+
+/ {
+	model = "LS1043A QDS Board";
+};
+
+&i2c0 {
+	status = "okay";
+	pca9547@77 {
+		compatible = "philips,pca9547";
+		reg = <0x77>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0>;
+
+			rtc@68 {
+				compatible = "dallas,ds3232";
+				reg = <0x68>;
+				/* IRQ10_B */
+				interrupts = <0 150 0x4>;
+			};
+		};
+
+		i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x2>;
+
+			ina220@40 {
+				compatible = "ti,ina220";
+				reg = <0x40>;
+				shunt-resistor = <1000>;
+			};
+
+			ina220@41 {
+				compatible = "ti,ina220";
+				reg = <0x41>;
+				shunt-resistor = <1000>;
+			};
+		};
+
+		i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x3>;
+
+			eeprom@56 {
+				compatible = "at24,24c512";
+				reg = <0x56>;
+			};
+
+			eeprom@57 {
+				compatible = "at24,24c512";
+				reg = <0x57>;
+			};
+
+			adt7461a@4c {
+				compatible = "adt7461a";
+				reg = <0x4c>;
+			};
+		};
+	};
+};
+
+&ifc {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	/* NOR, NAND Flashes and FPGA on board */
+	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
+		  0x2 0x0 0x0 0x7e800000 0x00010000
+		  0x3 0x0 0x0 0x7fb00000 0x00000100>;
+	status = "okay";
+
+	nor@0,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cfi-flash";
+		reg = <0x0 0x0 0x8000000>;
+		bank-width = <2>;
+		device-width = <1>;
+	};
+
+	nand@2,0 {
+		compatible = "fsl,ifc-nand";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x1 0x0 0x10000>;
+	};
+
+	fpga: board-control@3,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		reg = <0x3 0x0 0x0000100>;
+		bank-width = <1>;
+		device-width = <1>;
+		ranges = <0 3 0 0x100>;
+	};
+};
+
+&duart0 {
+	status = "okay";
+};
+
+&duart1 {
+	status = "okay";
+};
@@ -2,6 +2,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
 CONFIG_SYS_NS16550=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds"
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
 CONFIG_OF_CONTROL=y
...	...	@@ -97,7 +97,7 @@
97	97	ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb
98	98	dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
99	99	fsl-ls2080a-rdb.dtb
100		-dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \
	100	+dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
101	101	fsl-ls1043a-rdb.dtb
102	102
103	103	dtb-$(CONFIG_MACH_SUN4I) += \
	1	+/*
	2	+ * Device Tree file for Freescale Layerscape-1043A family SoC.
	3	+ *
	4	+ * Copyright (C) 2015, Freescale Semiconductor
	5	+ *
	6	+ * SPDX-License-Identifier: GPL-2.0+
	7	+ */
	8	+
	9	+/dts-v1/;
	10	+#include "fsl-ls1043a-qds.dtsi"
	11	+
	12	+/ {
	13	+ chosen {
	14	+ stdout-path = &duart0;
	15	+ };
	16	+};
1		-/*
2		- * Device Tree Include file for Freescale Layerscape-1043A family SoC.
3		- *
4		- * Copyright (C) 2015, Freescale Semiconductor
5		- *
6		- * Mingkai Hu <Mingkai.hu@freescale.com>
7		- *
8		- * This file is licensed under the terms of the GNU General Public
9		- * License version 2. This program is licensed "as is" without any
10		- * warranty of any kind, whether express or implied.
11		- */
12		-
13		-/dts-v1/;
14		-/include/ "fsl-ls1043a.dtsi"
15		-
16		-/ {
17		- model = "LS1043A QDS Board";
18		-};
19		-
20		-&i2c0 {
21		- status = "okay";
22		- pca9547@77 {
23		- compatible = "philips,pca9547";
24		- reg = <0x77>;
25		- #address-cells = <1>;
26		- #size-cells = <0>;
27		-
28		- i2c@0 {
29		- #address-cells = <1>;
30		- #size-cells = <0>;
31		- reg = <0x0>;
32		-
33		- rtc@68 {
34		- compatible = "dallas,ds3232";
35		- reg = <0x68>;
36		- /* IRQ10_B */
37		- interrupts = <0 150 0x4>;
38		- };
39		- };
40		-
41		- i2c@2 {
42		- #address-cells = <1>;
43		- #size-cells = <0>;
44		- reg = <0x2>;
45		-
46		- ina220@40 {
47		- compatible = "ti,ina220";
48		- reg = <0x40>;
49		- shunt-resistor = <1000>;
50		- };
51		-
52		- ina220@41 {
53		- compatible = "ti,ina220";
54		- reg = <0x41>;
55		- shunt-resistor = <1000>;
56		- };
57		- };
58		-
59		- i2c@3 {
60		- #address-cells = <1>;
61		- #size-cells = <0>;
62		- reg = <0x3>;
63		-
64		- eeprom@56 {
65		- compatible = "at24,24c512";
66		- reg = <0x56>;
67		- };
68		-
69		- eeprom@57 {
70		- compatible = "at24,24c512";
71		- reg = <0x57>;
72		- };
73		-
74		- adt7461a@4c {
75		- compatible = "adt7461a";
76		- reg = <0x4c>;
77		- };
78		- };
79		- };
80		-};
81		-
82		-&ifc {
83		- #address-cells = <2>;
84		- #size-cells = <1>;
85		- /* NOR, NAND Flashes and FPGA on board */
86		- ranges = <0x0 0x0 0x0 0x60000000 0x08000000
87		- 0x2 0x0 0x0 0x7e800000 0x00010000
88		- 0x3 0x0 0x0 0x7fb00000 0x00000100>;
89		- status = "okay";
90		-
91		- nor@0,0 {
92		- #address-cells = <1>;
93		- #size-cells = <1>;
94		- compatible = "cfi-flash";
95		- reg = <0x0 0x0 0x8000000>;
96		- bank-width = <2>;
97		- device-width = <1>;
98		- };
99		-
100		- nand@2,0 {
101		- compatible = "fsl,ifc-nand";
102		- #address-cells = <1>;
103		- #size-cells = <1>;
104		- reg = <0x1 0x0 0x10000>;
105		- };
106		-
107		- fpga: board-control@3,0 {
108		- #address-cells = <1>;
109		- #size-cells = <1>;
110		- compatible = "simple-bus";
111		- reg = <0x3 0x0 0x0000100>;
112		- bank-width = <1>;
113		- device-width = <1>;
114		- ranges = <0 3 0 0x100>;
115		- };
116		-};
117		-
118		-&duart0 {
119		- status = "okay";
120		-};
121		-
122		-&duart1 {
123		- status = "okay";
124		-};
	1	+/*
	2	+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
	3	+ *
	4	+ * Copyright (C) 2015, Freescale Semiconductor
	5	+ *
	6	+ * Mingkai Hu <Mingkai.hu@freescale.com>
	7	+ *
	8	+ * This file is licensed under the terms of the GNU General Public
	9	+ * License version 2. This program is licensed "as is" without any
	10	+ * warranty of any kind, whether express or implied.
	11	+ */
	12	+
	13	+/include/ "fsl-ls1043a.dtsi"
	14	+
	15	+/ {
	16	+ model = "LS1043A QDS Board";
	17	+};
	18	+
	19	+&i2c0 {
	20	+ status = "okay";
	21	+ pca9547@77 {
	22	+ compatible = "philips,pca9547";
	23	+ reg = <0x77>;
	24	+ #address-cells = <1>;
	25	+ #size-cells = <0>;
	26	+
	27	+ i2c@0 {
	28	+ #address-cells = <1>;
	29	+ #size-cells = <0>;
	30	+ reg = <0x0>;
	31	+
	32	+ rtc@68 {
	33	+ compatible = "dallas,ds3232";
	34	+ reg = <0x68>;
	35	+ /* IRQ10_B */
	36	+ interrupts = <0 150 0x4>;
	37	+ };
	38	+ };
	39	+
	40	+ i2c@2 {
	41	+ #address-cells = <1>;
	42	+ #size-cells = <0>;
	43	+ reg = <0x2>;
	44	+
	45	+ ina220@40 {
	46	+ compatible = "ti,ina220";
	47	+ reg = <0x40>;
	48	+ shunt-resistor = <1000>;
	49	+ };
	50	+
	51	+ ina220@41 {
	52	+ compatible = "ti,ina220";
	53	+ reg = <0x41>;
	54	+ shunt-resistor = <1000>;
	55	+ };
	56	+ };
	57	+
	58	+ i2c@3 {
	59	+ #address-cells = <1>;
	60	+ #size-cells = <0>;
	61	+ reg = <0x3>;
	62	+
	63	+ eeprom@56 {
	64	+ compatible = "at24,24c512";
	65	+ reg = <0x56>;
	66	+ };
	67	+
	68	+ eeprom@57 {
	69	+ compatible = "at24,24c512";
	70	+ reg = <0x57>;
	71	+ };
	72	+
	73	+ adt7461a@4c {
	74	+ compatible = "adt7461a";
	75	+ reg = <0x4c>;
	76	+ };
	77	+ };
	78	+ };
	79	+};
	80	+
	81	+&ifc {
	82	+ #address-cells = <2>;
	83	+ #size-cells = <1>;
	84	+ /* NOR, NAND Flashes and FPGA on board */
	85	+ ranges = <0x0 0x0 0x0 0x60000000 0x08000000
	86	+ 0x2 0x0 0x0 0x7e800000 0x00010000
	87	+ 0x3 0x0 0x0 0x7fb00000 0x00000100>;
	88	+ status = "okay";
	89	+
	90	+ nor@0,0 {
	91	+ #address-cells = <1>;
	92	+ #size-cells = <1>;
	93	+ compatible = "cfi-flash";
	94	+ reg = <0x0 0x0 0x8000000>;
	95	+ bank-width = <2>;
	96	+ device-width = <1>;
	97	+ };
	98	+
	99	+ nand@2,0 {
	100	+ compatible = "fsl,ifc-nand";
	101	+ #address-cells = <1>;
	102	+ #size-cells = <1>;
	103	+ reg = <0x1 0x0 0x10000>;
	104	+ };
	105	+
	106	+ fpga: board-control@3,0 {
	107	+ #address-cells = <1>;
	108	+ #size-cells = <1>;
	109	+ compatible = "simple-bus";
	110	+ reg = <0x3 0x0 0x0000100>;
	111	+ bank-width = <1>;
	112	+ device-width = <1>;
	113	+ ranges = <0 3 0 0x100>;
	114	+ };
	115	+};
	116	+
	117	+&duart0 {
	118	+ status = "okay";
	119	+};
	120	+
	121	+&duart1 {
	122	+ status = "okay";
	123	+};
...	...	@@ -2,6 +2,6 @@
2	2	CONFIG_ARM=y
3	3	CONFIG_TARGET_LS1043AQDS=y
4	4	CONFIG_SYS_NS16550=y
5		-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds"
	5	+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
6	6	CONFIG_OF_CONTROL=y