Commit 9004be7c4d0c1fe23235e0f04fd27af372a93157
1 parent
b8eb9cebba
Exists in
v2013.10-smartmen
Fixed RMII Clock to be Sourced From Chip Pin
Showing 1 changed file with 3 additions and 2 deletions Side-by-side Diff
board/embedian/smarct335x/board.c
| ... | ... | @@ -38,7 +38,7 @@ |
| 38 | 38 | /* GPIO that controls LCD backlight PWM */ |
| 39 | 39 | #define GPIO_LCD_PWM_EN 7 |
| 40 | 40 | |
| 41 | -/* GPIO3_4 that controls Buzzer on SBC-SMART-MEN */ | |
| 41 | +/* GPIO3_7 that controls Buzzer on SBC-SMART-MEN */ | |
| 42 | 42 | #define GPIO_BUZZER_EN 103 |
| 43 | 43 | |
| 44 | 44 | static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; |
| ... | ... | @@ -498,6 +498,7 @@ |
| 498 | 498 | &ddr3_beagleblack_data, |
| 499 | 499 | &ddr3_beagleblack_cmd_ctrl_data, |
| 500 | 500 | &ddr3_beagleblack_emif_reg_data, 0); |
| 501 | + puts("Set DDR3 to 800MHz.\n"); | |
| 501 | 502 | } |
| 502 | 503 | else if (board_is_evm_15_or_later(&header)) |
| 503 | 504 | config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data, |
| ... | ... | @@ -636,7 +637,7 @@ |
| 636 | 637 | cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
| 637 | 638 | PHY_INTERFACE_MODE_MII; |
| 638 | 639 | } else if (board_is_smarc_t335x(&header) || board_is_smarc_t335x_1g(&header)) { |
| 639 | - writel(RMII_MODE_ENABLE, &cdev->miisel); | |
| 640 | + writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel); | |
| 640 | 641 | cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
| 641 | 642 | PHY_INTERFACE_MODE_RMII; |
| 642 | 643 | } else { |