Eric Lee / smarc-uboot

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Commit 90579fdd4179f2ed531b3bc69b76c7842fa29ab3

Authored by Jeroen Hofstee
Committed by Wolfgang Denk
1 parent 896bbb5316
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ehci-omap: fix for enabling the correct usb port 

This is just a patch for the problem reported here:
http://lists.denx.de/pipermail/u-boot/2012-February/117580.html originally reported by Igor.

"Looks like this is copy paste error from my side,(for port2/3 it should have been bypass
 for port2/3 rather its port1 set in bypass mode)"

I only submit the patch since it is missing in 2012.04-rc3 while the twister board
depends on it. Maybe it is already somewhere in the reposistory, but I cannot find it.

note: the twister boards still needs an additional `usb reset`, don't know why.

U-Boot 2012.04-rc3-dirty (Apr 19 2012 - 21:38:38)

AM35XX-GP ES1.0, CPU-OPP2, L3-165MHz, Max CPU Clock 600 Mhz
TAM3517 TWISTER Board + LPDDR/NAND
I2C:   ready
DRAM:  256 MiB
NAND:  512 MiB
MMC:   OMAP SD/MMC: 0
In:    serial
Out:   serial
Err:   serial
Die ID #746c0000000000000155dc1405011024
Net:   DaVinci-EMAC, smc911x-0
Hit any key to stop autoboot:  0
twister => usb start
(Re)start USB...
USB:   Register 1313 NbrPorts 3
USB EHCI 1.00
scanning bus for devices... 1 USB Device(s) found
       scanning bus for storage devices... 0 Storage Device(s) found
twister => usb reset
(Re)start USB...
USB:   Register 1313 NbrPorts 3
USB EHCI 1.00
scanning bus for devices... 1 USB Device(s) found
       scanning bus for storage devices... 0 Storage Device(s) found
twister => usb reset
(Re)start USB...
USB:   Register 1313 NbrPorts 3
USB EHCI 1.00
scanning bus for devices... 1 USB Device(s) found
       scanning bus for storage devices... 0 Storage Device(s) found
twister => usb reset
(Re)start USB...
USB:   Register 1313 NbrPorts 3
USB EHCI 1.00
scanning bus for devices... 1 USB Device(s) found
       scanning bus for storage devices... 0 Storage Device(s) found

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Govindraj.R <govindraj.raja <at> ti.com>
Acked-by: Tom Rini <trini@ti.com>

Showing 1 changed file with 2 additions and 2 deletions Side-by-side Diff

drivers/usb/host/ehci-omap.c
Diff comments   View file @ 90579fd
... ... @@ -200,12 +200,12 @@
200 200 if (is_ehci_phy_mode(usbhs_pdata->port_mode[1]))
201 201 clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS);
202 202 else
203   - setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS);
  203 + setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS);
204 204  
205 205 if (is_ehci_phy_mode(usbhs_pdata->port_mode[2]))
206 206 clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
207 207 else
208   - setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS);
  208 + setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
209 209 } else if (rev == OMAP_USBHS_REV2) {
210 210 clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR),
211 211 OMAP4_UHH_HOSTCONFIG_APP_START_CLK);