board: engicam: Fix the ethernet clock initialization

According to the SOM and reference board the clock can be taken from the external pin or provided from ENET_REF_CLK. Add a new function that make the proper set according the board type. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

board: engicam: Fix the ethernet clock initialization
According to the SOM and reference board the clock can be taken from the external pin or provided from ENET_REF_CLK. Add a new function that make the proper set according the board type. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Michael Trimarchi · Stefano Babic
1 parent 8811c4d046
Showing 1 changed file with 29 additions and 0 deletions Side-by-side Diff
board/engicam/common/board.c
@@ -10,6 +10,8 @@
 #include <env.h>
 #include <init.h>
 #include <mmc.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
 #include <watchdog.h>
  
@@ -101,6 +103,32 @@
 	return -EINVAL;
 }
  
+static int fixup_enet_clock(enum engicam_boards board_detected)
+{
+	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
+	int clk_internal = 0;
+
+	switch (board_detected) {
+	case IMX6Q_ICORE_MIPI:
+	case IMX6DL_ICORE_MIPI:
+		clk_internal = 1;
+		break;
+	default:
+		break;
+	}
+
+	/* set gpr1[21] to select anatop clock */
+	debug("fixup_enet_clock %d\n", clk_internal);
+	clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, clk_internal << 21);
+
+	if (!clk_internal) {
+		/* clock is external */
+		return 0;
+	}
+
+	return enable_fec_anatop_clock(0, ENET_50MHZ);
+}
+
 int board_late_init(void)
 {
 	enum engicam_boards board_detected = IMX6Q_ICORE;
@@ -133,6 +161,7 @@
 	if (board_detected < 0)
 		hang();
  
+	fixup_enet_clock(board_detected);
 	setenv_fdt_file(board_detected);
  
 #ifdef CONFIG_HW_WATCHDOG
...	...	@@ -10,6 +10,8 @@
10	10	#include <env.h>
11	11	#include <init.h>
12	12	#include <mmc.h>
	13	+#include <asm/arch/clock.h>
	14	+#include <asm/arch/imx-regs.h>
13	15	#include <asm/arch/sys_proto.h>
14	16	#include <watchdog.h>
15	17
...	...	@@ -101,6 +103,32 @@
101	103	return -EINVAL;
102	104	}
103	105
	106	+static int fixup_enet_clock(enum engicam_boards board_detected)
	107	+{
	108	+ struct iomuxc iomuxc_regs = (struct iomuxc )IOMUXC_BASE_ADDR;
	109	+ int clk_internal = 0;
	110	+
	111	+ switch (board_detected) {
	112	+ case IMX6Q_ICORE_MIPI:
	113	+ case IMX6DL_ICORE_MIPI:
	114	+ clk_internal = 1;
	115	+ break;
	116	+ default:
	117	+ break;
	118	+ }
	119	+
	120	+ /* set gpr1[21] to select anatop clock */
	121	+ debug("fixup_enet_clock %d\n", clk_internal);
	122	+ clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, clk_internal << 21);
	123	+
	124	+ if (!clk_internal) {
	125	+ /* clock is external */
	126	+ return 0;
	127	+ }
	128	+
	129	+ return enable_fec_anatop_clock(0, ENET_50MHZ);
	130	+}
	131	+
104	132	int board_late_init(void)
105	133	{
106	134	enum engicam_boards board_detected = IMX6Q_ICORE;
...	...	@@ -133,6 +161,7 @@
133	161	if (board_detected < 0)
134	162	hang();
135	163
	164	+ fixup_enet_clock(board_detected);
136	165	setenv_fdt_file(board_detected);
137	166
138	167	#ifdef CONFIG_HW_WATCHDOG