Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- Remember the device being emulated for Sandbox PCI - Update Kconfig options for FSP 1.0 - Drop RESET_BASE and RESET_SEG_SIZE that are no longer used

Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Remember the device being emulated for Sandbox PCI - Update Kconfig options for FSP 1.0 - Drop RESET_BASE and RESET_SEG_SIZE that are no longer used
Tom Rini
2 parents 0c9cc5155c c443f56cc6
Showing 11 changed files Side-by-side Diff
arch/x86/Kconfig
arch/x86/cpu/config.mk
arch/x86/cpu/resetvec.S
arch/x86/lib/mrccache.c
arch/x86/lib/spl.c
arch/x86/lib/tpl.c
common/iotrace.c
drivers/pci/pci-emul-uclass.c
include/iotrace.h
include/pci.h
tools/binman/README
@@ -207,11 +207,6 @@
 	depends on X86_RESET_VECTOR
 	default 0xffff0000
  
-config RESET_SEG_SIZE
-	hex
-	depends on X86_RESET_VECTOR
-	default 0x10000
-
 config RESET_VEC_LOC
 	hex
 	depends on X86_RESET_VECTOR
@@ -397,7 +392,7 @@
  
 config FSP_FILE
 	string "Firmware Support Package binary filename"
-	depends on HAVE_FSP
+	depends on FSP_VERSION1
 	default "fsp.bin"
 	help
 	  The filename of the file to use as Firmware Support Package binary
@@ -405,7 +400,7 @@
  
 config FSP_ADDR
 	hex "Firmware Support Package binary location"
-	depends on HAVE_FSP
+	depends on FSP_VERSION1
 	default 0xfffc0000
 	help
 	  FSP is not Position Independent Code (PIC) and the whole FSP has to
@@ -418,7 +413,7 @@
  
 config FSP_TEMP_RAM_ADDR
 	hex
-	depends on HAVE_FSP
+	depends on FSP_VERSION1
 	default 0x2000000
 	help
 	  Stack top address which is used in fsp_init() after DRAM is ready and
  
@@ -426,14 +421,14 @@
  
 config FSP_SYS_MALLOC_F_LEN
 	hex
-	depends on HAVE_FSP
+	depends on FSP_VERSION1
 	default 0x100000
 	help
 	  Additional size of malloc() pool before relocation.
  
 config FSP_USE_UPD
 	bool
-	depends on HAVE_FSP
+	depends on FSP_VERSION1
 	default y
 	help
 	  Most FSPs use UPD data region for some FSP customization. But there
@@ -442,7 +437,7 @@
  
 config FSP_BROKEN_HOB
 	bool
-	depends on HAVE_FSP
+	depends on FSP_VERSION1
 	help
 	  Indicate some buggy FSPs that does not report memory used by FSP
 	  itself as reserved in the resource descriptor HOB. Select this to
@@ -600,7 +595,7 @@
  
 config HAVE_VBT
 	bool "Add a Video BIOS Table (VBT) image"
-	depends on HAVE_FSP
+	depends on FSP_VERSION1
 	help
 	  Select this option if you have a Video BIOS Table (VBT) image that
 	  you would like to add to your ROM. This is normally required if you
@@ -7,10 +7,8 @@
  
 # DO NOT MODIFY THE FOLLOWING UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!
 LDPPFLAGS += -DRESET_SEG_START=$(CONFIG_RESET_SEG_START)
-LDPPFLAGS += -DRESET_SEG_SIZE=$(CONFIG_RESET_SEG_SIZE)
 LDPPFLAGS += -DRESET_VEC_LOC=$(CONFIG_RESET_VEC_LOC)
 LDPPFLAGS += -DSTART_16=$(CONFIG_SYS_X86_START16)
-LDPPFLAGS += -DRESET_BASE="CONFIG_SYS_TEXT_BASE + (CONFIG_SYS_MONITOR_LEN - RESET_SEG_SIZE)"
  
 ifdef CONFIG_X86_64
 ifndef CONFIG_SPL_BUILD
@@ -16,7 +16,4 @@
 	cli
 	cld
 	jmp start16
-
-	.org 0xf
-	nop
@@ -17,19 +17,20 @@
  
 DECLARE_GLOBAL_DATA_PTR;
  
+static uint mrc_block_size(uint data_size)
+{
+	uint mrc_size = sizeof(struct mrc_data_container) + data_size;
+
+	return ALIGN(mrc_size, MRC_DATA_ALIGN);
+}
+
 static struct mrc_data_container *next_mrc_block(
 	struct mrc_data_container *cache)
 {
 	/* MRC data blocks are aligned within the region */
-	u32 mrc_size = sizeof(*cache) + cache->data_size;
 	u8 *region_ptr = (u8 *)cache;
  
-	if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
-		mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
-		mrc_size += MRC_DATA_ALIGN;
-	}
-
-	region_ptr += mrc_size;
+	region_ptr += mrc_block_size(cache->data_size);
  
 	return (struct mrc_data_container *)region_ptr;
 }
@@ -113,7 +113,7 @@
 	ret = x86_spl_init();
 	if (ret) {
 		debug("Error %d\n", ret);
-		hang();
+		panic("x86_spl_init fail");
 	}
 #ifdef CONFIG_TPL
 	gd->bd = malloc(sizeof(*gd->bd));
@@ -55,7 +55,7 @@
 	ret = x86_tpl_init();
 	if (ret) {
 		debug("Error %d\n", ret);
-		hang();
+		panic("x86_tpl_init fail");
 	}
  
 	/* Uninit CAR and jump to board_init_f_r() */
@@ -86,7 +86,7 @@
 	return v;
 }
  
-void iotrace_writel(ulong value, const void *ptr)
+void iotrace_writel(ulong value, void *ptr)
 {
 	add_record(IOT_32 | IOT_WRITE, ptr, value);
 	writel(value, ptr);
@@ -102,7 +102,7 @@
 	return v;
 }
  
-void iotrace_writew(ulong value, const void *ptr)
+void iotrace_writew(ulong value, void *ptr)
 {
 	add_record(IOT_16 | IOT_WRITE, ptr, value);
 	writew(value, ptr);
@@ -118,7 +118,7 @@
 	return v;
 }
  
-void iotrace_writeb(ulong value, const void *ptr)
+void iotrace_writeb(ulong value, void *ptr)
 {
 	add_record(IOT_8 | IOT_WRITE, ptr, value);
 	writeb(value, ptr);
@@ -18,6 +18,7 @@
 int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
 			 struct udevice **containerp, struct udevice **emulp)
 {
+	struct pci_emul_uc_priv *upriv;
 	struct udevice *dev;
 	int ret;
  
  
  
  
  
@@ -30,18 +31,34 @@
 	}
 	*containerp = dev;
  
-	/*
-	 * See commit 4345998ae9df,
-	 * "pci: sandbox: Support dynamically binding device driver"
-	 */
 	ret = uclass_get_device_by_phandle(UCLASS_PCI_EMUL, dev, "sandbox,emul",
 					   emulp);
-	if (ret && device_get_uclass_id(dev) != UCLASS_PCI_GENERIC)
+	if (!ret) {
+		upriv = dev_get_uclass_priv(*emulp);
+
+		upriv->client = dev;
+	} else if (device_get_uclass_id(dev) != UCLASS_PCI_GENERIC) {
+		/*
+		 * See commit 4345998ae9df,
+		 * "pci: sandbox: Support dynamically binding device driver"
+		 */
 		*emulp = dev;
+	}
  
-	return *emulp ? 0 : -ENODEV;
+	return 0;
 }
  
+int sandbox_pci_get_client(struct udevice *emul, struct udevice **devp)
+{
+	struct pci_emul_uc_priv *upriv = dev_get_uclass_priv(emul);
+
+	if (!upriv->client)
+		return -ENOENT;
+	*devp = upriv->client;
+
+	return 0;
+}
+
 uint sandbox_pci_read_bar(u32 barval, int type, uint size)
 {
 	u32 result;
@@ -88,6 +105,7 @@
 	.post_probe	= sandbox_pci_emul_post_probe,
 	.pre_remove	= sandbox_pci_emul_pre_remove,
 	.priv_auto_alloc_size	= sizeof(struct sandbox_pci_emul_priv),
+	.per_device_auto_alloc_size	= sizeof(struct pci_emul_uc_priv),
 };
  
 /*
@@ -49,30 +49,29 @@
 #define readl(addr)	iotrace_readl((const void *)(addr))
  
 #undef writel
-#define writel(val, addr)	iotrace_writel(val, (const void *)(addr))
+#define writel(val, addr)	iotrace_writel(val, (void *)(addr))
  
 #undef readw
 #define readw(addr)	iotrace_readw((const void *)(addr))
  
 #undef writew
-#define writew(val, addr)	iotrace_writew(val, (const void *)(addr))
+#define writew(val, addr)	iotrace_writew(val, (void *)(addr))
  
 #undef readb
 #define readb(addr)	iotrace_readb((const void *)(uintptr_t)addr)
  
 #undef writeb
-#define writeb(val, addr) \
-	iotrace_writeb(val, (const void *)(uintptr_t)addr)
+#define writeb(val, addr)	iotrace_writeb(val, (void *)(uintptr_t)addr)
  
 #endif
  
 /* Tracing functions which mirror their io.h counterparts */
 u32 iotrace_readl(const void *ptr);
-void iotrace_writel(ulong value, const void *ptr);
+void iotrace_writel(ulong value, void *ptr);
 u16 iotrace_readw(const void *ptr);
-void iotrace_writew(ulong value, const void *ptr);
+void iotrace_writew(ulong value, void *ptr);
 u8 iotrace_readb(const void *ptr);
-void iotrace_writeb(ulong value, const void *ptr);
+void iotrace_writeb(ulong value, void *ptr);
  
 /**
  * iotrace_reset_checksum() - Reset the iotrace checksum
@@ -1491,6 +1491,17 @@
 int dm_pci_find_class(uint find_class, int index, struct udevice **devp);
  
 /**
+ * struct pci_emul_uc_priv - holds info about an emulator device
+ *
+ * There is always at most one emulator per client
+ *
+ * @client: Client device if any, else NULL
+ */
+struct pci_emul_uc_priv {
+	struct udevice *client;
+};
+
+/**
  * struct dm_pci_emul_ops - PCI device emulator operations
  */
 struct dm_pci_emul_ops {
@@ -1591,6 +1602,15 @@
  */
 int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
 			 struct udevice **containerp, struct udevice **emulp);
+
+/**
+ * sandbox_pci_get_client() - Find the client for an emulation device
+ *
+ * @emul:	Emulation device to check
+ * @devp:	Returns the client device emulated by this device
+ * @return 0 if OK, -ENOENT if the device has no client yet
+ */
+int sandbox_pci_get_client(struct udevice *emul, struct udevice **devp);
  
 /**
  * pci_get_devfn() - Extract the devfn from fdt_pci_addr of the device
@@ -931,13 +931,13 @@
 To enable a full backtrace and other debugging features in binman, pass
 BINMAN_DEBUG=1 to your build:
  
-   make sandbox_defconfig
+   make qemu-x86_defconfig
    make BINMAN_DEBUG=1
  
 To enable verbose logging from binman, base BINMAN_VERBOSE to your build, which
 adds a -v<level> option to the call to binman:
  
-   make sandbox_defconfig
+   make qemu-x86_defconfig
    make BINMAN_VERBOSE=5
...	...	@@ -207,11 +207,6 @@
207	207	depends on X86_RESET_VECTOR
208	208	default 0xffff0000
209	209
210		-config RESET_SEG_SIZE
211		- hex
212		- depends on X86_RESET_VECTOR
213		- default 0x10000
214		-
215	210	config RESET_VEC_LOC
216	211	hex
217	212	depends on X86_RESET_VECTOR
...	...	@@ -397,7 +392,7 @@
397	392
398	393	config FSP_FILE
399	394	string "Firmware Support Package binary filename"
400		- depends on HAVE_FSP
	395	+ depends on FSP_VERSION1
401	396	default "fsp.bin"
402	397	help
403	398	The filename of the file to use as Firmware Support Package binary
...	...	@@ -405,7 +400,7 @@
405	400
406	401	config FSP_ADDR
407	402	hex "Firmware Support Package binary location"
408		- depends on HAVE_FSP
	403	+ depends on FSP_VERSION1
409	404	default 0xfffc0000
410	405	help
411	406	FSP is not Position Independent Code (PIC) and the whole FSP has to
...	...	@@ -418,7 +413,7 @@
418	413
419	414	config FSP_TEMP_RAM_ADDR
420	415	hex
421		- depends on HAVE_FSP
	416	+ depends on FSP_VERSION1
422	417	default 0x2000000
423	418	help
424	419	Stack top address which is used in fsp_init() after DRAM is ready and
425	420
...	...	@@ -426,14 +421,14 @@
426	421
427	422	config FSP_SYS_MALLOC_F_LEN
428	423	hex
429		- depends on HAVE_FSP
	424	+ depends on FSP_VERSION1
430	425	default 0x100000
431	426	help
432	427	Additional size of malloc() pool before relocation.
433	428
434	429	config FSP_USE_UPD
435	430	bool
436		- depends on HAVE_FSP
	431	+ depends on FSP_VERSION1
437	432	default y
438	433	help
439	434	Most FSPs use UPD data region for some FSP customization. But there
...	...	@@ -442,7 +437,7 @@
442	437
443	438	config FSP_BROKEN_HOB
444	439	bool
445		- depends on HAVE_FSP
	440	+ depends on FSP_VERSION1
446	441	help
447	442	Indicate some buggy FSPs that does not report memory used by FSP
448	443	itself as reserved in the resource descriptor HOB. Select this to
...	...	@@ -600,7 +595,7 @@
600	595
601	596	config HAVE_VBT
602	597	bool "Add a Video BIOS Table (VBT) image"
603		- depends on HAVE_FSP
	598	+ depends on FSP_VERSION1
604	599	help
605	600	Select this option if you have a Video BIOS Table (VBT) image that
606	601	you would like to add to your ROM. This is normally required if you
...	...	@@ -7,10 +7,8 @@
7	7
8	8	# DO NOT MODIFY THE FOLLOWING UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!
9	9	LDPPFLAGS += -DRESET_SEG_START=$(CONFIG_RESET_SEG_START)
10		-LDPPFLAGS += -DRESET_SEG_SIZE=$(CONFIG_RESET_SEG_SIZE)
11	10	LDPPFLAGS += -DRESET_VEC_LOC=$(CONFIG_RESET_VEC_LOC)
12	11	LDPPFLAGS += -DSTART_16=$(CONFIG_SYS_X86_START16)
13		-LDPPFLAGS += -DRESET_BASE="CONFIG_SYS_TEXT_BASE + (CONFIG_SYS_MONITOR_LEN - RESET_SEG_SIZE)"
14	12
15	13	ifdef CONFIG_X86_64
16	14	ifndef CONFIG_SPL_BUILD
...	...	@@ -16,7 +16,4 @@
16	16	cli
17	17	cld
18	18	jmp start16
19		-
20		- .org 0xf
21		- nop
...	...	@@ -17,19 +17,20 @@
17	17
18	18	DECLARE_GLOBAL_DATA_PTR;
19	19
	20	+static uint mrc_block_size(uint data_size)
	21	+{
	22	+ uint mrc_size = sizeof(struct mrc_data_container) + data_size;
	23	+
	24	+ return ALIGN(mrc_size, MRC_DATA_ALIGN);
	25	+}
	26	+
20	27	static struct mrc_data_container *next_mrc_block(
21	28	struct mrc_data_container *cache)
22	29	{
23	30	/* MRC data blocks are aligned within the region */
24		- u32 mrc_size = sizeof(*cache) + cache->data_size;
25	31	u8 region_ptr = (u8 )cache;
26	32
27		- if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
28		- mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
29		- mrc_size += MRC_DATA_ALIGN;
30		- }
31		-
32		- region_ptr += mrc_size;
	33	+ region_ptr += mrc_block_size(cache->data_size);
33	34
34	35	return (struct mrc_data_container *)region_ptr;
35	36	}
...	...	@@ -113,7 +113,7 @@
113	113	ret = x86_spl_init();
114	114	if (ret) {
115	115	debug("Error %d\n", ret);
116		- hang();
	116	+ panic("x86_spl_init fail");
117	117	}
118	118	#ifdef CONFIG_TPL
119	119	gd->bd = malloc(sizeof(*gd->bd));
...	...	@@ -55,7 +55,7 @@
55	55	ret = x86_tpl_init();
56	56	if (ret) {
57	57	debug("Error %d\n", ret);
58		- hang();
	58	+ panic("x86_tpl_init fail");
59	59	}
60	60
61	61	/* Uninit CAR and jump to board_init_f_r() */
...	...	@@ -86,7 +86,7 @@
86	86	return v;
87	87	}
88	88
89		-void iotrace_writel(ulong value, const void *ptr)
	89	+void iotrace_writel(ulong value, void *ptr)
90	90	{
91	91	add_record(IOT_32 \| IOT_WRITE, ptr, value);
92	92	writel(value, ptr);
...	...	@@ -102,7 +102,7 @@
102	102	return v;
103	103	}
104	104
105		-void iotrace_writew(ulong value, const void *ptr)
	105	+void iotrace_writew(ulong value, void *ptr)
106	106	{
107	107	add_record(IOT_16 \| IOT_WRITE, ptr, value);
108	108	writew(value, ptr);
...	...	@@ -118,7 +118,7 @@
118	118	return v;
119	119	}
120	120
121		-void iotrace_writeb(ulong value, const void *ptr)
	121	+void iotrace_writeb(ulong value, void *ptr)
122	122	{
123	123	add_record(IOT_8 \| IOT_WRITE, ptr, value);
124	124	writeb(value, ptr);
...	...	@@ -18,6 +18,7 @@
18	18	int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
19	19	struct udevice containerp, struct udevice emulp)
20	20	{
	21	+ struct pci_emul_uc_priv *upriv;
21	22	struct udevice *dev;
22	23	int ret;
23	24
24	25
25	26
26	27
27	28
...	...	@@ -30,18 +31,34 @@
30	31	}
31	32	*containerp = dev;
32	33
33		- /*
34		- * See commit 4345998ae9df,
35		- * "pci: sandbox: Support dynamically binding device driver"
36		- */
37	34	ret = uclass_get_device_by_phandle(UCLASS_PCI_EMUL, dev, "sandbox,emul",
38	35	emulp);
39		- if (ret && device_get_uclass_id(dev) != UCLASS_PCI_GENERIC)
	36	+ if (!ret) {
	37	+ upriv = dev_get_uclass_priv(*emulp);
	38	+
	39	+ upriv->client = dev;
	40	+ } else if (device_get_uclass_id(dev) != UCLASS_PCI_GENERIC) {
	41	+ /*
	42	+ * See commit 4345998ae9df,
	43	+ * "pci: sandbox: Support dynamically binding device driver"
	44	+ */
40	45	*emulp = dev;
	46	+ }
41	47
42		- return *emulp ? 0 : -ENODEV;
	48	+ return 0;
43	49	}
44	50
	51	+int sandbox_pci_get_client(struct udevice emul, struct udevice *devp)
	52	+{
	53	+ struct pci_emul_uc_priv *upriv = dev_get_uclass_priv(emul);
	54	+
	55	+ if (!upriv->client)
	56	+ return -ENOENT;
	57	+ *devp = upriv->client;
	58	+
	59	+ return 0;
	60	+}
	61	+
45	62	uint sandbox_pci_read_bar(u32 barval, int type, uint size)
46	63	{
47	64	u32 result;
...	...	@@ -88,6 +105,7 @@
88	105	.post_probe = sandbox_pci_emul_post_probe,
89	106	.pre_remove = sandbox_pci_emul_pre_remove,
90	107	.priv_auto_alloc_size = sizeof(struct sandbox_pci_emul_priv),
	108	+ .per_device_auto_alloc_size = sizeof(struct pci_emul_uc_priv),
91	109	};
92	110
93	111	/*
...	...	@@ -49,30 +49,29 @@
49	49	#define readl(addr) iotrace_readl((const void *)(addr))
50	50
51	51	#undef writel
52		-#define writel(val, addr) iotrace_writel(val, (const void *)(addr))
	52	+#define writel(val, addr) iotrace_writel(val, (void *)(addr))
53	53
54	54	#undef readw
55	55	#define readw(addr) iotrace_readw((const void *)(addr))
56	56
57	57	#undef writew
58		-#define writew(val, addr) iotrace_writew(val, (const void *)(addr))
	58	+#define writew(val, addr) iotrace_writew(val, (void *)(addr))
59	59
60	60	#undef readb
61	61	#define readb(addr) iotrace_readb((const void *)(uintptr_t)addr)
62	62
63	63	#undef writeb
64		-#define writeb(val, addr) \
65		- iotrace_writeb(val, (const void *)(uintptr_t)addr)
	64	+#define writeb(val, addr) iotrace_writeb(val, (void *)(uintptr_t)addr)
66	65
67	66	#endif
68	67
69	68	/* Tracing functions which mirror their io.h counterparts */
70	69	u32 iotrace_readl(const void *ptr);
71		-void iotrace_writel(ulong value, const void *ptr);
	70	+void iotrace_writel(ulong value, void *ptr);
72	71	u16 iotrace_readw(const void *ptr);
73		-void iotrace_writew(ulong value, const void *ptr);
	72	+void iotrace_writew(ulong value, void *ptr);
74	73	u8 iotrace_readb(const void *ptr);
75		-void iotrace_writeb(ulong value, const void *ptr);
	74	+void iotrace_writeb(ulong value, void *ptr);
76	75
77	76	/**
78	77	* iotrace_reset_checksum() - Reset the iotrace checksum
...	...	@@ -1491,6 +1491,17 @@
1491	1491	int dm_pci_find_class(uint find_class, int index, struct udevice **devp);
1492	1492
1493	1493	/**
	1494	+ * struct pci_emul_uc_priv - holds info about an emulator device
	1495	+ *
	1496	+ * There is always at most one emulator per client
	1497	+ *
	1498	+ * @client: Client device if any, else NULL
	1499	+ */
	1500	+struct pci_emul_uc_priv {
	1501	+ struct udevice *client;
	1502	+};
	1503	+
	1504	+/**
1494	1505	* struct dm_pci_emul_ops - PCI device emulator operations
1495	1506	*/
1496	1507	struct dm_pci_emul_ops {
...	...	@@ -1591,6 +1602,15 @@
1591	1602	*/
1592	1603	int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
1593	1604	struct udevice containerp, struct udevice emulp);
	1605	+
	1606	+/**
	1607	+ * sandbox_pci_get_client() - Find the client for an emulation device
	1608	+ *
	1609	+ * @emul: Emulation device to check
	1610	+ * @devp: Returns the client device emulated by this device
	1611	+ * @return 0 if OK, -ENOENT if the device has no client yet
	1612	+ */
	1613	+int sandbox_pci_get_client(struct udevice emul, struct udevice *devp);
1594	1614
1595	1615	/**
1596	1616	* pci_get_devfn() - Extract the devfn from fdt_pci_addr of the device