Commit 91a16c3b2f909560e50d97d1d7d1a0c24589ca2d
Committed by
Jaehoon Chung
1 parent
5eada1dbd0
Exists in
smarc_8mq_lf_v2020.04
and in
20 other branches
mmc: sh_sdhi: Add MMC version 5.0 support
Renesas SDHI SD/MMC driver did not support MMC version 5.0 devices. This adds MMC version 5.0 device support. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Showing 2 changed files with 25 additions and 6 deletions Side-by-side Diff
arch/arm/mach-rmobile/include/mach/sh_sdhi.h
| ... | ... | @@ -50,8 +50,10 @@ |
| 50 | 50 | /* SDHI CMD VALUE */ |
| 51 | 51 | #define CMD_MASK 0x0000ffff |
| 52 | 52 | #define SDHI_APP 0x0040 |
| 53 | +#define SDHI_MMC_SEND_OP_COND 0x0701 | |
| 53 | 54 | #define SDHI_SD_APP_SEND_SCR 0x0073 |
| 54 | 55 | #define SDHI_SD_SWITCH 0x1C06 |
| 56 | +#define SDHI_MMC_SEND_EXT_CSD 0x1C08 | |
| 55 | 57 | |
| 56 | 58 | /* SDHI_PORTSEL */ |
| 57 | 59 | #define USE_1PORT (1 << 8) /* 1 port */ |
| ... | ... | @@ -120,7 +122,10 @@ |
| 120 | 122 | #define CLK_ENABLE (1 << 8) |
| 121 | 123 | |
| 122 | 124 | /* SDHI_OPTION */ |
| 123 | -#define OPT_BUS_WIDTH_1 (1 << 15) /* bus width = 1 bit */ | |
| 125 | +#define OPT_BUS_WIDTH_M (5 << 13) /* 101b (15-13bit) */ | |
| 126 | +#define OPT_BUS_WIDTH_1 (4 << 13) /* bus width = 1 bit */ | |
| 127 | +#define OPT_BUS_WIDTH_4 (0 << 13) /* bus width = 4 bit */ | |
| 128 | +#define OPT_BUS_WIDTH_8 (1 << 13) /* bus width = 8 bit */ | |
| 124 | 129 | |
| 125 | 130 | /* SDHI_ERR_STS1 */ |
| 126 | 131 | #define ERR_STS1_CRC_ERROR ((1 << 11) | (1 << 10) | (1 << 9) | \ |
drivers/mmc/sh_sdhi.c
| ... | ... | @@ -489,6 +489,13 @@ |
| 489 | 489 | else /* SD_SWITCH */ |
| 490 | 490 | opc = SDHI_SD_SWITCH; |
| 491 | 491 | break; |
| 492 | + case MMC_CMD_SEND_OP_COND: | |
| 493 | + opc = SDHI_MMC_SEND_OP_COND; | |
| 494 | + break; | |
| 495 | + case MMC_CMD_SEND_EXT_CSD: | |
| 496 | + if (data) | |
| 497 | + opc = SDHI_MMC_SEND_EXT_CSD; | |
| 498 | + break; | |
| 492 | 499 | default: |
| 493 | 500 | break; |
| 494 | 501 | } |
| ... | ... | @@ -513,6 +520,7 @@ |
| 513 | 520 | case MMC_CMD_READ_SINGLE_BLOCK: |
| 514 | 521 | case SDHI_SD_APP_SEND_SCR: |
| 515 | 522 | case SDHI_SD_SWITCH: /* SD_SWITCH */ |
| 523 | + case SDHI_MMC_SEND_EXT_CSD: | |
| 516 | 524 | ret = sh_sdhi_single_read(host, data); |
| 517 | 525 | break; |
| 518 | 526 | default: |
| 519 | 527 | |
| ... | ... | @@ -648,12 +656,18 @@ |
| 648 | 656 | if (ret) |
| 649 | 657 | return -EINVAL; |
| 650 | 658 | |
| 651 | - if (mmc->bus_width == 4) | |
| 652 | - sh_sdhi_writew(host, SDHI_OPTION, ~OPT_BUS_WIDTH_1 & | |
| 653 | - sh_sdhi_readw(host, SDHI_OPTION)); | |
| 659 | + if (mmc->bus_width == 8) | |
| 660 | + sh_sdhi_writew(host, SDHI_OPTION, | |
| 661 | + OPT_BUS_WIDTH_8 | (~OPT_BUS_WIDTH_M & | |
| 662 | + sh_sdhi_readw(host, SDHI_OPTION))); | |
| 663 | + else if (mmc->bus_width == 4) | |
| 664 | + sh_sdhi_writew(host, SDHI_OPTION, | |
| 665 | + OPT_BUS_WIDTH_4 | (~OPT_BUS_WIDTH_M & | |
| 666 | + sh_sdhi_readw(host, SDHI_OPTION))); | |
| 654 | 667 | else |
| 655 | - sh_sdhi_writew(host, SDHI_OPTION, OPT_BUS_WIDTH_1 | | |
| 656 | - sh_sdhi_readw(host, SDHI_OPTION)); | |
| 668 | + sh_sdhi_writew(host, SDHI_OPTION, | |
| 669 | + OPT_BUS_WIDTH_1 | (~OPT_BUS_WIDTH_M & | |
| 670 | + sh_sdhi_readw(host, SDHI_OPTION))); | |
| 657 | 671 | |
| 658 | 672 | debug("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width); |
| 659 | 673 |