zynq: Update CLK in bdinfo

ARM has specific clk entries which should be also setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com>

zynq: Update CLK in bdinfo
ARM has specific clk entries which should be also setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek
1 parent d6c9bbaad1
Showing 1 changed file with 5 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/armv7/zynq/clk.c
@@ -161,6 +161,8 @@
 	clks[dci_clk].frequency = DIV_ROUND_CLOSEST(
 			DIV_ROUND_CLOSEST(prate, div0), div1);
 	clks[dci_clk].name = "dci";
+
+	gd->bd->bi_ddr_freq = clks[ddr3x_clk].frequency / 1000000;
 }
  
 static void init_cpu_clocks(void)
@@ -592,6 +594,9 @@
 	init_cpu_clocks();
 	init_periph_clocks();
 	init_aper_clocks();
+
+	gd->bd->bi_arm_freq = gd->cpu_clk / 1000000;
+	gd->bd->bi_dsp_freq = 0;
  
 	return 0;
 }
...	...	@@ -161,6 +161,8 @@
161	161	clks[dci_clk].frequency = DIV_ROUND_CLOSEST(
162	162	DIV_ROUND_CLOSEST(prate, div0), div1);
163	163	clks[dci_clk].name = "dci";
	164	+
	165	+ gd->bd->bi_ddr_freq = clks[ddr3x_clk].frequency / 1000000;
164	166	}
165	167
166	168	static void init_cpu_clocks(void)
...	...	@@ -592,6 +594,9 @@
592	594	init_cpu_clocks();
593	595	init_periph_clocks();
594	596	init_aper_clocks();
	597	+
	598	+ gd->bd->bi_arm_freq = gd->cpu_clk / 1000000;
	599	+ gd->bd->bi_dsp_freq = 0;
595	600
596	601	return 0;
597	602	}