Commit 96f627a6d50f0d84273140f92633c40ee57bc79e
1 parent
e4926d4156
Exists in
smarc_8mq_lf_v2020.04
and in
4 other branches
MLK-19526-5 imx8mq: Power down core 2/3 for iMX8MD
CPU 2/3 are fused on iMX8MD, power down the two cores in SPL to save power. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 0fc24973f5f8d32d0925bf0cf1eb3d8b75ae18b4) (cherry picked from commit 732825eb2cfcf60143e2a21634549ce709f1d9b7)
Showing 1 changed file with 11 additions and 0 deletions Side-by-side Diff
arch/arm/mach-imx/imx8m/soc.c
... | ... | @@ -292,6 +292,17 @@ |
292 | 292 | if (IS_ENABLED(CONFIG_SPL_BUILD)) { |
293 | 293 | clock_init(); |
294 | 294 | imx_set_wdog_powerdown(false); |
295 | + | |
296 | + if (is_imx8md()) { | |
297 | + /* Power down cpu core 2 and 3 for iMX8MD */ | |
298 | + struct pgc_reg *pgc_core2 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x880); | |
299 | + struct pgc_reg *pgc_core3 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x8C0); | |
300 | + struct gpc_reg *gpc = (struct gpc_reg *)GPC_BASE_ADDR; | |
301 | + | |
302 | + writel(0x1, &pgc_core2->pgcr); | |
303 | + writel(0x1, &pgc_core3->pgcr); | |
304 | + writel(0xC, &gpc->cpu_pgc_dn_trg); | |
305 | + } | |
295 | 306 | } |
296 | 307 | |
297 | 308 | #ifdef CONFIG_IMX_SEC_INIT |