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Commit 9879842c6fdb64d95085ac66647ed77d7abfd439

Authored by Masahiro Yamada
1 parent 1386233da3
Exists in v2017.01-smarct4x and in 30 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

ARM: uniphier: drop DCC micro support card support 

Historically (for compatibility with very old platforms), two
different types of micro support cards have been used with the
UniPhier SoC development boards.  It has been painful to maintain
both.  Having one of them is enough.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Showing 16 changed files with 29 additions and 311 deletions Side-by-side Diff

arch/arm/mach-uniphier/Kconfig
Diff comments   View file @ 9879842
... ... @@ -26,28 +26,13 @@
26 26  
27 27 endchoice
28 28  
29   -choice
30   - prompt "UniPhier Support Card select"
31   - optional
32   -
33   -config PFC_MICRO_SUPPORT_CARD
34   - bool "Support card with PFC CPLD"
  29 +config MICRO_SUPPORT_CARD
  30 + bool "Use Micro Support Card"
35 31 help
36   - This option provides support for the expansion board with PFC
37   - original address mapping.
  32 + This option provides support for the expansion board, available
  33 + on some UniPhier reference boards.
38 34  
39 35 Say Y to use the on-board UART, Ether, LED devices.
40   -
41   -config DCC_MICRO_SUPPORT_CARD
42   - bool "Support card with DCC CPLD"
43   - help
44   - This option provides support for the expansion board with DCC-
45   - arranged address mapping that is compatible with legacy UniPhier
46   - reference boards.
47   -
48   - Say Y to use the on-board UART, Ether, LED devices.
49   -
50   -endchoice
51 36  
52 37 config CMD_PINMON
53 38 bool "Enable boot mode pins monitor command"
arch/arm/mach-uniphier/Makefile
Diff comments   View file @ 9879842
... ... @@ -29,8 +29,7 @@
29 29  
30 30 obj-y += timer.o
31 31  
32   -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += support_card.o
33   -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += support_card.o
  32 +obj-$(CONFIG_MICRO_SUPPORT_CARD) += support_card.o
34 33  
35 34 obj-$(CONFIG_MACH_PH1_SLD3) += ph1-sld3/
36 35 obj-$(CONFIG_MACH_PH1_LD4) += ph1-ld4/
arch/arm/mach-uniphier/include/mach/board.h
Diff comments   View file @ 9879842
1 1 /*
2   - * Copyright (C) 2012-2014 Panasonic Corporation
3   - * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
  2 + * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4 3 *
5 4 * SPDX-License-Identifier: GPL-2.0+
6 5 */
... ... @@ -8,8 +7,7 @@
8 7 #ifndef ARCH_BOARD_H
9 8 #define ARCH_BOARD_H
10 9  
11   -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) || \
12   - defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
  10 +#if defined(CONFIG_MICRO_SUPPORT_CARD)
13 11 void support_card_reset(void);
14 12 void support_card_init(void);
15 13 void support_card_late_init(void);
arch/arm/mach-uniphier/ph1-ld4/Makefile
Diff comments   View file @ 9879842
... ... @@ -6,8 +6,7 @@
6 6 obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
7 7 obj-y += bcu_init.o pll_init.o early_clkrst_init.o \
8 8 pll_spectrum.o umc_init.o ddrphy_init.o
9   -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o
10   -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o
  9 +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o
11 10 else
12 11 obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
13 12 endif
arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c
View file @ 9879842
1   -/*
2   - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3   - *
4   - * SPDX-License-Identifier: GPL-2.0+
5   - */
6   -
7   -#include <common.h>
8   -#include <linux/io.h>
9   -#include <mach/sbc-regs.h>
10   -#include <mach/sg-regs.h>
11   -
12   -void sbc_init(void)
13   -{
14   - u32 tmp;
15   -
16   - /* system bus output enable */
17   - tmp = readl(PC0CTRL);
18   - tmp &= 0xfffffcff;
19   - writel(tmp, PC0CTRL);
20   -
21   - /* XECS1: sub/boot memory (boot swap = off/on) */
22   - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
23   - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);
24   - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
25   - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
26   -
27   - /* XECS0: boot/sub memory (boot swap = off/on) */
28   - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00);
29   - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01);
30   - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02);
31   - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04);
32   -
33   - /* XECS3: peripherals */
34   - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30);
35   - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31);
36   - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32);
37   - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34);
38   -
39   - /* base address regsiters */
40   - writel(0x0000bc01, SBBASE0);
41   - writel(0x0400bc01, SBBASE1);
42   - writel(0x0800bf01, SBBASE3);
43   -
44   - /* enable access to sub memory when boot swap is on */
45   - if (boot_is_swapped())
46   - sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */
47   -
48   - sg_set_pinsel(156, 1); /* PORT25 -> XECS3 */
49   -}
arch/arm/mach-uniphier/ph1-pro4/Makefile
Diff comments   View file @ 9879842
... ... @@ -6,8 +6,7 @@
6 6 obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
7 7 obj-y += pll_init.o early_clkrst_init.o \
8 8 pll_spectrum.o umc_init.o ddrphy_init.o
9   -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o
10   -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o
  9 +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o
11 10 else
12 11 obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
13 12 endif
arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c
View file @ 9879842
1   -/*
2   - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3   - *
4   - * SPDX-License-Identifier: GPL-2.0+
5   - */
6   -
7   -#include <common.h>
8   -#include <linux/io.h>
9   -#include <mach/sbc-regs.h>
10   -#include <mach/sg-regs.h>
11   -
12   -void sbc_init(void)
13   -{
14   - /* XECS0: boot/sub memory (boot swap = off/on) */
15   - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00);
16   - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01);
17   - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02);
18   - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04);
19   -
20   - /* XECS1: sub/boot memory (boot swap = off/on) */
21   - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
22   - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);
23   - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
24   - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
25   -
26   - /* XECS3: peripherals */
27   - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30);
28   - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31);
29   - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32);
30   - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34);
31   -
32   - writel(0x0000bc01, SBBASE0); /* boot memory */
33   - writel(0x0400bc01, SBBASE1); /* sub memory */
34   - writel(0x0800bf01, SBBASE3); /* peripherals */
35   -
36   - /* enable access to sub memory when boot swap is on */
37   - if (boot_is_swapped())
38   - sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */
39   -
40   - sg_set_pinsel(313, 5); /* PORT15 -> XECS3 */
41   - writel(0x00000001, SG_LOADPINCTRL);
42   -}
arch/arm/mach-uniphier/ph1-sld3/Makefile
Diff comments   View file @ 9879842
... ... @@ -6,8 +6,7 @@
6 6 obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
7 7 obj-y += bcu_init.o memconf.o sg_init.o pll_init.o early_clkrst_init.o \
8 8 early_pinctrl.o pll_spectrum.o umc_init.o
9   -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o
10   -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o
  9 +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o
11 10 else
12 11 obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
13 12 endif
arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c
View file @ 9879842
1   -/*
2   - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3   - *
4   - * SPDX-License-Identifier: GPL-2.0+
5   - */
6   -
7   -#include <common.h>
8   -#include <linux/io.h>
9   -#include <mach/sbc-regs.h>
10   -#include <mach/sg-regs.h>
11   -
12   -void sbc_init(void)
13   -{
14   - /* only address/data multiplex mode is supported */
15   -
16   - /* XECS0 : boot/sub memory (boot swap = off/on) */
17   - writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL00);
18   - writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL01);
19   - writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL02);
20   -
21   - /* XECS1 : sub/boot memory (boot swap = off/on) */
22   - writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
23   - writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
24   - writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
25   -
26   - /* XECS2 : peripherals */
27   - writel(SBCTRL0_ADMULTIPLX_PERI_VALUE, SBCTRL20);
28   - writel(SBCTRL1_ADMULTIPLX_PERI_VALUE, SBCTRL21);
29   - writel(SBCTRL2_ADMULTIPLX_PERI_VALUE, SBCTRL22);
30   -
31   - /* base address regsiters */
32   - writel(0x0000bc01, SBBASE0);
33   - writel(0x0400bc01, SBBASE1);
34   - writel(0x0800bf01, SBBASE2);
35   -
36   - sg_set_pinsel(99, 1); /* GPIO26 -> EA24 */
37   -}
arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c
View file @ 9879842
1   -/*
2   - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3   - *
4   - * SPDX-License-Identifier: GPL-2.0+
5   - */
6   -
7   -#include <common.h>
8   -#include <linux/io.h>
9   -#include <mach/sbc-regs.h>
10   -#include <mach/sg-regs.h>
11   -
12   -void sbc_init(void)
13   -{
14   - u32 tmp;
15   -
16   - /* system bus output enable */
17   - tmp = readl(PC0CTRL);
18   - tmp &= 0xfffffcff;
19   - writel(tmp, PC0CTRL);
20   -
21   - /*
22   - * SBCTRL0* does not need settings because PH1-sLD8 has no support for
23   - * XECS0. The boot swap must be enabled to boot from the support card.
24   - */
25   -
26   - if (boot_is_swapped()) {
27   - /* XECS1 : boot memory if boot swap is on */
28   - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
29   - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);
30   - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
31   - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
32   - }
33   -
34   - /* XECS4 : sub memory */
35   - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL40);
36   - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL41);
37   - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL42);
38   - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL44);
39   -
40   - /* XECS5 : peripherals */
41   - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL50);
42   - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL51);
43   - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL52);
44   - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL54);
45   -
46   - /* base address regsiters */
47   - writel(0x0000bc01, SBBASE0); /* boot memory */
48   - writel(0x0900bfff, SBBASE1); /* dummy */
49   - writel(0x0400bc01, SBBASE4); /* sub memory */
50   - writel(0x0800bf01, SBBASE5); /* peripherals */
51   -
52   - sg_set_pinsel(134, 16); /* XIRQ6 -> XECS4 */
53   - sg_set_pinsel(135, 16); /* XIRQ7 -> XECS5 */
54   -
55   - /* dummy read to assure write process */
56   - readl(SG_PINCTRL(0));
57   -}
arch/arm/mach-uniphier/support_card.c
Diff comments   View file @ 9879842
... ... @@ -8,11 +8,9 @@
8 8 #include <linux/io.h>
9 9 #include <mach/board.h>
10 10  
11   -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
12   -
13   -#define PFC_MICRO_SUPPORT_CARD_RESET \
  11 +#define MICRO_SUPPORT_CARD_RESET \
14 12 ((CONFIG_SUPPORT_CARD_BASE) + 0x000D0034)
15   -#define PFC_MICRO_SUPPORT_CARD_REVISION \
  13 +#define MICRO_SUPPORT_CARD_REVISION \
16 14 ((CONFIG_SUPPORT_CARD_BASE) + 0x000D00E0)
17 15 /*
18 16 * 0: reset deassert, 1: reset
19 17  
20 18  
21 19  
22 20  
... ... @@ -22,66 +20,23 @@
22 20 */
23 21 void support_card_reset_deassert(void)
24 22 {
25   - writel(0, PFC_MICRO_SUPPORT_CARD_RESET);
  23 + writel(0, MICRO_SUPPORT_CARD_RESET);
26 24 }
27 25  
28 26 void support_card_reset(void)
29 27 {
30   - writel(3, PFC_MICRO_SUPPORT_CARD_RESET);
  28 + writel(3, MICRO_SUPPORT_CARD_RESET);
31 29 }
32 30  
33 31 static int support_card_show_revision(void)
34 32 {
35 33 u32 revision;
36 34  
37   - revision = readl(PFC_MICRO_SUPPORT_CARD_REVISION);
38   - printf("(PFC CPLD version %d.%d)\n", revision >> 4, revision & 0xf);
  35 + revision = readl(MICRO_SUPPORT_CARD_REVISION);
  36 + printf("(CPLD version %d.%d)\n", revision >> 4, revision & 0xf);
39 37 return 0;
40 38 }
41   -#endif
42 39  
43   -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
44   -
45   -#define DCC_MICRO_SUPPORT_CARD_RESET_LAN \
46   - ((CONFIG_SUPPORT_CARD_BASE) + 0x00401300)
47   -#define DCC_MICRO_SUPPORT_CARD_RESET_UART \
48   - ((CONFIG_SUPPORT_CARD_BASE) + 0x00401304)
49   -#define DCC_MICRO_SUPPORT_CARD_RESET_I2C \
50   - ((CONFIG_SUPPORT_CARD_BASE) + 0x00401308)
51   -#define DCC_MICRO_SUPPORT_CARD_REVISION \
52   - ((CONFIG_SUPPORT_CARD_BASE) + 0x005000E0)
53   -
54   -void support_card_reset_deassert(void)
55   -{
56   - writel(1, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */
57   - writel(1, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */
58   - writel(1, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */
59   -}
60   -
61   -void support_card_reset(void)
62   -{
63   - writel(0, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */
64   - writel(0, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */
65   - writel(0, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */
66   -}
67   -
68   -static int support_card_show_revision(void)
69   -{
70   - u32 revision;
71   -
72   - revision = readl(DCC_MICRO_SUPPORT_CARD_REVISION);
73   -
74   - if (revision >= 0x67) {
75   - printf("(DCC CPLD version 3.%d.%d)\n",
76   - revision >> 4, revision & 0xf);
77   - return 0;
78   - } else {
79   - printf("(DCC CPLD unknown version)\n");
80   - return -1;
81   - }
82   -}
83   -#endif
84   -
85 40 int check_support_card(void)
86 41 {
87 42 printf("SC: Micro Support Card ");
88 43  
... ... @@ -146,28 +101,11 @@
146 101 return ret;
147 102 }
148 103  
149   -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
150   - /* {address, size} */
151   -static const struct memory_bank memory_banks_boot_swap_off[] = {
  104 +/* {address, size} */
  105 +static const struct memory_bank memory_banks[] = {
152 106 {0x02000000, 0x01f00000},
153 107 };
154 108  
155   -static const struct memory_bank memory_banks_boot_swap_on[] = {
156   - {0x00000000, 0x01f00000},
157   -};
158   -#endif
159   -
160   -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
161   -static const struct memory_bank memory_banks_boot_swap_off[] = {
162   - {0x04000000, 0x02000000},
163   -};
164   -
165   -static const struct memory_bank memory_banks_boot_swap_on[] = {
166   - {0x00000000, 0x02000000},
167   - {0x04000000, 0x02000000},
168   -};
169   -#endif
170   -
171 109 static const struct memory_bank
172 110 *flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT];
173 111  
... ... @@ -187,13 +125,8 @@
187 125  
188 126 cfi_flash_num_flash_banks = 0;
189 127  
190   - if (boot_is_swapped()) {
191   - memory_bank = memory_banks_boot_swap_on;
192   - end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_on);
193   - } else {
194   - memory_bank = memory_banks_boot_swap_off;
195   - end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_off);
196   - }
  128 + memory_bank = memory_banks;
  129 + end = memory_bank + ARRAY_SIZE(memory_banks);
197 130  
198 131 for (; memory_bank < end; memory_bank++) {
199 132 if (cfi_flash_num_flash_banks >=
configs/ph1_ld4_defconfig
Diff comments   View file @ 9879842
... ... @@ -2,7 +2,7 @@
2 2 CONFIG_ARCH_UNIPHIER=y
3 3 CONFIG_SYS_MALLOC_F_LEN=0x2000
4 4 CONFIG_MACH_PH1_LD4=y
5   -CONFIG_PFC_MICRO_SUPPORT_CARD=y
  5 +CONFIG_MICRO_SUPPORT_CARD=y
6 6 CONFIG_SYS_TEXT_BASE=0x84000000
7 7 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref"
8 8 CONFIG_HUSH_PARSER=y
configs/ph1_pro4_defconfig
Diff comments   View file @ 9879842
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_UNIPHIER=y
3 3 CONFIG_SYS_MALLOC_F_LEN=0x2000
4   -CONFIG_PFC_MICRO_SUPPORT_CARD=y
  4 +CONFIG_MICRO_SUPPORT_CARD=y
5 5 CONFIG_SYS_TEXT_BASE=0x84000000
6 6 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref"
7 7 CONFIG_HUSH_PARSER=y
configs/ph1_sld3_defconfig
Diff comments   View file @ 9879842
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_UNIPHIER=y
3 3 CONFIG_MACH_PH1_SLD3=y
4   -CONFIG_PFC_MICRO_SUPPORT_CARD=y
  4 +CONFIG_MICRO_SUPPORT_CARD=y
5 5 CONFIG_SYS_TEXT_BASE=0x84000000
6 6 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref"
7 7 CONFIG_HUSH_PARSER=y
configs/ph1_sld8_defconfig
Diff comments   View file @ 9879842
... ... @@ -2,7 +2,7 @@
2 2 CONFIG_ARCH_UNIPHIER=y
3 3 CONFIG_SYS_MALLOC_F_LEN=0x2000
4 4 CONFIG_MACH_PH1_SLD8=y
5   -CONFIG_PFC_MICRO_SUPPORT_CARD=y
  5 +CONFIG_MICRO_SUPPORT_CARD=y
6 6 CONFIG_SYS_TEXT_BASE=0x84000000
7 7 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref"
8 8 CONFIG_HUSH_PARSER=y
include/configs/uniphier.h
Diff comments   View file @ 9879842
... ... @@ -62,20 +62,11 @@
62 62 /*
63 63 * Support card address map
64 64 */
65   -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
66   -# define CONFIG_SUPPORT_CARD_BASE 0x03f00000
67   -# define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000)
68   -# define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000)
69   -# define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000)
70   -#endif
  65 +#define CONFIG_SUPPORT_CARD_BASE 0x03f00000
  66 +#define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000)
  67 +#define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000)
  68 +#define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000)
71 69  
72   -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
73   -# define CONFIG_SUPPORT_CARD_BASE 0x08000000
74   -# define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000)
75   -# define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00401630)
76   -# define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00200000)
77   -#endif
78   -
79 70 #ifdef CONFIG_SYS_NS16550_SERIAL
80 71 #define CONFIG_SYS_NS16550
81 72 #define CONFIG_SYS_NS16550_COM1 CONFIG_SUPPORT_CARD_UART_BASE
... ... @@ -140,7 +131,7 @@
140 131  
141 132 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
142 133  
143   -#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2
  134 +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
144 135  
145 136 /* serial console configuration */
146 137 #define CONFIG_BAUDRATE 115200