Commit 9b844314fd75d9c24708c7e477d5ce3273f13048

Authored by Alex Marginean
Committed by Joe Hershberger
1 parent b32e9a7578

configs: ls1028a: enable networking options in rdb, qds defconfig

Enables ethernet, MDIO, PHY drivers for LS1028A RDB and QDS.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

Showing 4 changed files with 16 additions and 2 deletions Side-by-side Diff

configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
... ... @@ -39,13 +39,17 @@
39 39 CONFIG_SPI_FLASH_STMICRO=y
40 40 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
41 41 CONFIG_PHYLIB=y
  42 +CONFIG_PHY_AQUANTIA=y
42 43 CONFIG_PHY_ATHEROS=y
  44 +CONFIG_PHY_VITESSE=y
43 45 CONFIG_DM_ETH=y
44   -CONFIG_PHY_GIGE=y
  46 +CONFIG_DM_MDIO=y
45 47 CONFIG_E1000=y
  48 +CONFIG_FSL_ENETC=y
46 49 CONFIG_PCI=y
47 50 CONFIG_DM_PCI=y
48 51 CONFIG_DM_PCI_COMPAT=y
  52 +CONFIG_PCIE_ECAM_GENERIC=y
49 53 CONFIG_PCIE_LAYERSCAPE=y
50 54 CONFIG_SCSI=y
51 55 CONFIG_DM_SCSI=y
configs/ls1028aqds_tfa_defconfig
... ... @@ -42,10 +42,13 @@
42 42 CONFIG_SPI_FLASH_STMICRO=y
43 43 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
44 44 CONFIG_PHYLIB=y
  45 +CONFIG_PHY_AQUANTIA=y
45 46 CONFIG_PHY_ATHEROS=y
  47 +CONFIG_PHY_VITESSE=y
46 48 CONFIG_DM_ETH=y
47   -CONFIG_PHY_GIGE=y
  49 +CONFIG_DM_MDIO=y
48 50 CONFIG_E1000=y
  51 +CONFIG_FSL_ENETC=y
49 52 CONFIG_PCI=y
50 53 CONFIG_DM_PCI=y
51 54 CONFIG_DM_PCI_COMPAT=y
configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
... ... @@ -40,12 +40,16 @@
40 40 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
41 41 CONFIG_PHYLIB=y
42 42 CONFIG_PHY_ATHEROS=y
  43 +CONFIG_PHY_VITESSE=y
43 44 CONFIG_DM_ETH=y
  45 +CONFIG_DM_MDIO=y
44 46 CONFIG_PHY_GIGE=y
45 47 CONFIG_E1000=y
  48 +CONFIG_FSL_ENETC=y
46 49 CONFIG_PCI=y
47 50 CONFIG_DM_PCI=y
48 51 CONFIG_DM_PCI_COMPAT=y
  52 +CONFIG_PCIE_ECAM_GENERIC=y
49 53 CONFIG_PCIE_LAYERSCAPE=y
50 54 CONFIG_SCSI=y
51 55 CONFIG_DM_SCSI=y
configs/ls1028ardb_tfa_defconfig
... ... @@ -43,9 +43,12 @@
43 43 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
44 44 CONFIG_PHYLIB=y
45 45 CONFIG_PHY_ATHEROS=y
  46 +CONFIG_PHY_VITESSE=y
46 47 CONFIG_DM_ETH=y
  48 +CONFIG_DM_MDIO=y
47 49 CONFIG_PHY_GIGE=y
48 50 CONFIG_E1000=y
  51 +CONFIG_FSL_ENETC=y
49 52 CONFIG_PCI=y
50 53 CONFIG_DM_PCI=y
51 54 CONFIG_DM_PCI_COMPAT=y