Commit 9b8c9a3c093afbde1577bd8270904c4d36969ff9

Authored by Jaehoon Chung
Committed by Minkyu Kang
1 parent e33daad0b7

mmc: s5p_sdhci: add the s5p_sdhci_core_init function

To reuse the code, added the s5p_sdhci_core_init function.
Before applied this patch, didn't use the 8-bit mode at exynos baord.
Because it didn't set "MMC_MODE_8BIT".

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

Showing 1 changed file with 17 additions and 25 deletions Side-by-side Diff

drivers/mmc/s5p_sdhci.c
... ... @@ -65,17 +65,9 @@
65 65 sdhci_writel(host, ctrl, SDHCI_CONTROL2);
66 66 }
67 67  
68   -int s5p_sdhci_init(u32 regbase, int index, int bus_width)
  68 +static int s5p_sdhci_core_init(struct sdhci_host *host)
69 69 {
70   - struct sdhci_host *host = NULL;
71   - host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
72   - if (!host) {
73   - printf("sdhci__host malloc fail!\n");
74   - return 1;
75   - }
76   -
77 70 host->name = S5P_NAME;
78   - host->ioaddr = (void *)regbase;
79 71  
80 72 host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
81 73 SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
82 74  
83 75  
... ... @@ -85,15 +77,28 @@
85 77  
86 78 host->set_control_reg = &s5p_sdhci_set_control_reg;
87 79 host->set_clock = set_mmc_clk;
88   - host->index = index;
89 80  
90 81 host->host_caps = MMC_MODE_HC;
91   - if (bus_width == 8)
  82 + if (host->bus_width == 8)
92 83 host->host_caps |= MMC_MODE_8BIT;
93 84  
94 85 return add_sdhci(host, 52000000, 400000);
95 86 }
96 87  
  88 +int s5p_sdhci_init(u32 regbase, int index, int bus_width)
  89 +{
  90 + struct sdhci_host *host = malloc(sizeof(struct sdhci_host));
  91 + if (!host) {
  92 + printf("sdhci__host malloc fail!\n");
  93 + return 1;
  94 + }
  95 + host->ioaddr = (void *)regbase;
  96 + host->index = index;
  97 + host->bus_width = bus_width;
  98 +
  99 + return s5p_sdhci_core_init(host);
  100 +}
  101 +
97 102 #ifdef CONFIG_OF_CONTROL
98 103 struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
99 104  
... ... @@ -126,20 +131,7 @@
126 131 }
127 132 }
128 133  
129   - host->name = S5P_NAME;
130   -
131   - host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
132   - SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
133   - SDHCI_QUIRK_WAIT_SEND_CMD;
134   - host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
135   - host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
136   -
137   - host->set_control_reg = &s5p_sdhci_set_control_reg;
138   - host->set_clock = set_mmc_clk;
139   -
140   - host->host_caps = MMC_MODE_HC;
141   -
142   - return add_sdhci(host, 52000000, 400000);
  134 + return s5p_sdhci_core_init(host);
143 135 }
144 136  
145 137 static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host)