net: macb: apply sane DMA configuration

DMA configuration was heavily dependent on the HW defaults, add function to properly set the required fields, including the new dma_burst_length. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Anup Patel <anup.patel@wdc.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>

net: macb: apply sane DMA configuration
DMA configuration was heavily dependent on the HW defaults, add function to properly set the required fields, including the new dma_burst_length. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Anup Patel <anup.patel@wdc.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ramon Fried · Joe Hershberger
1 parent ed3c64f1ac
Showing 1 changed file with 28 additions and 0 deletions Side-by-side Diff
drivers/net/macb.c
@@ -47,6 +47,7 @@
  
 #define MACB_RX_BUFFER_SIZE		4096
 #define MACB_RX_RING_SIZE		(MACB_RX_BUFFER_SIZE / 128)
+#define RX_BUFFER_MULTIPLE		64
 #define MACB_TX_RING_SIZE		16
 #define MACB_TX_TIMEOUT		1000
 #define MACB_AUTONEG_TIMEOUT	5000000
@@ -697,6 +698,31 @@
 	return 0;
 }
  
+static void gmac_configure_dma(struct macb_device *macb)
+{
+	u32 buffer_size;
+	u32 dmacfg;
+
+	buffer_size = 128 / RX_BUFFER_MULTIPLE;
+	dmacfg = gem_readl(macb, DMACFG) & ~GEM_BF(RXBS, -1L);
+	dmacfg |= GEM_BF(RXBS, buffer_size);
+
+	if (macb->dma_burst_length)
+		dmacfg = GEM_BFINS(FBLDO, macb->dma_burst_length, dmacfg);
+
+	dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);
+	dmacfg &= ~GEM_BIT(ENDIA_PKT);
+
+#ifdef CONFIG_SYS_LITTLE_ENDIAN
+		dmacfg &= ~GEM_BIT(ENDIA_DESC);
+#else
+		dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */
+#endif
+
+	dmacfg &= ~GEM_BIT(ADDR64);
+	gem_writel(macb, DMACFG, dmacfg);
+}
+
 #ifdef CONFIG_DM_ETH
 static int _macb_init(struct udevice *dev, const char *name)
 #else
@@ -750,6 +776,8 @@
 	macb_writel(macb, TBQP, macb->tx_ring_dma);
  
 	if (macb_is_gem(macb)) {
+		/* Initialize DMA properties */
+		gmac_configure_dma(macb);
 		/* Check the multi queue and initialize the queue for tx */
 		gmac_init_multi_queues(macb);
...	...	@@ -47,6 +47,7 @@
47	47
48	48	#define MACB_RX_BUFFER_SIZE 4096
49	49	#define MACB_RX_RING_SIZE (MACB_RX_BUFFER_SIZE / 128)
	50	+#define RX_BUFFER_MULTIPLE 64
50	51	#define MACB_TX_RING_SIZE 16
51	52	#define MACB_TX_TIMEOUT 1000
52	53	#define MACB_AUTONEG_TIMEOUT 5000000
...	...	@@ -697,6 +698,31 @@
697	698	return 0;
698	699	}
699	700
	701	+static void gmac_configure_dma(struct macb_device *macb)
	702	+{
	703	+ u32 buffer_size;
	704	+ u32 dmacfg;
	705	+
	706	+ buffer_size = 128 / RX_BUFFER_MULTIPLE;
	707	+ dmacfg = gem_readl(macb, DMACFG) & ~GEM_BF(RXBS, -1L);
	708	+ dmacfg \|= GEM_BF(RXBS, buffer_size);
	709	+
	710	+ if (macb->dma_burst_length)
	711	+ dmacfg = GEM_BFINS(FBLDO, macb->dma_burst_length, dmacfg);
	712	+
	713	+ dmacfg \|= GEM_BIT(TXPBMS) \| GEM_BF(RXBMS, -1L);
	714	+ dmacfg &= ~GEM_BIT(ENDIA_PKT);
	715	+
	716	+#ifdef CONFIG_SYS_LITTLE_ENDIAN
	717	+ dmacfg &= ~GEM_BIT(ENDIA_DESC);
	718	+#else
	719	+ dmacfg \|= GEM_BIT(ENDIA_DESC); /* CPU in big endian */
	720	+#endif
	721	+
	722	+ dmacfg &= ~GEM_BIT(ADDR64);
	723	+ gem_writel(macb, DMACFG, dmacfg);
	724	+}
	725	+
700	726	#ifdef CONFIG_DM_ETH
701	727	static int _macb_init(struct udevice dev, const char name)
702	728	#else
...	...	@@ -750,6 +776,8 @@
750	776	macb_writel(macb, TBQP, macb->tx_ring_dma);
751	777
752	778	if (macb_is_gem(macb)) {
	779	+ /* Initialize DMA properties */
	780	+ gmac_configure_dma(macb);
753	781	/* Check the multi queue and initialize the queue for tx */
754	782	gmac_init_multi_queues(macb);
755	783