Eric Lee / smarc-uboot

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Commit 9c4b0131d1d06dc87cecd08f065ec9b5c0f08b0f

Authored by Tom Rini
1 parent 55f8b70fee
Exists in smarc_8mq_lf_v2020.04 and in 10 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

ti: keystone2: Move CONFIG_ISW_ENTRY_ADDR to a common place 

The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific
notion but rather "where is our previous stage loaded in memory?"
option.  Make use of this on ARCH_KEYSTONE rather than SPL_TEXT_BASE for
our HS builds that are not using SPL anyhow.

Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com?

Showing 15 changed files with 26 additions and 30 deletions Side-by-side Diff

... ... @@ -1464,6 +1464,21 @@
1464 1464 authenticated) and the code. See the doc/README.ti-secure
1465 1465 file for further details.
1466 1466  
  1467 +if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1468 +config ISW_ENTRY_ADDR
  1469 + hex "Address in memory or XIP address of bootloader entry point"
  1470 + default 0x402F4000 if AM43XX
  1471 + default 0x402F0400 if AM33XX
  1472 + default 0x40301350 if OMAP54XX
  1473 + help
  1474 + After any reset, the boot ROM searches the boot media for a valid
  1475 + boot image. For non-XIP devices, the ROM then copies the image into
  1476 + internal memory. For all boot modes, after the ROM processes the
  1477 + boot image it eventually computes the entry point address depending
  1478 + on the device type (secure/non-secure), boot media (xip/non-xip) and
  1479 + image headers.
  1480 +endif
  1481 +
1467 1482 source "arch/arm/mach-aspeed/Kconfig"
1468 1483  
1469 1484 source "arch/arm/mach-at91/Kconfig"
arch/arm/mach-omap2/Kconfig
Diff comments   View file @ 9c4b013
... ... @@ -167,21 +167,6 @@
167 167 using hardware memory firewalls. This value must be smaller than the
168 168 TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
169 169  
170   -if AM43XX || AM33XX || OMAP54XX
171   -config ISW_ENTRY_ADDR
172   - hex "Address in memory or XIP address of bootloader entry point"
173   - default 0x402F4000 if AM43XX
174   - default 0x402F0400 if AM33XX
175   - default 0x40301350 if OMAP54XX
176   - help
177   - After any reset, the boot ROM searches the boot media for a valid
178   - boot image. For non-XIP devices, the ROM then copies the image into
179   - internal memory. For all boot modes, after the ROM processes the
180   - boot image it eventually computes the entry point address depending
181   - on the device type (secure/non-secure), boot media (xip/non-xip) and
182   - image headers.
183   -endif
184   -
185 170 source "arch/arm/mach-omap2/omap3/Kconfig"
186 171  
187 172 source "arch/arm/mach-omap2/omap4/Kconfig"
configs/k2e_evm_defconfig
Diff comments   View file @ 9c4b013
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_KEYSTONE=y
  3 +CONFIG_ISW_ENTRY_ADDR=0xC100000
3 4 CONFIG_SYS_TEXT_BASE=0xC000000
4 5 CONFIG_TI_COMMON_CMD_OPTIONS=y
5 6 CONFIG_SPL_LIBCOMMON_SUPPORT=y
configs/k2e_hs_evm_defconfig
Diff comments   View file @ 9c4b013
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_KEYSTONE=y
  3 +CONFIG_ISW_ENTRY_ADDR=0xC100000
3 4 CONFIG_TI_SECURE_DEVICE=y
4 5 CONFIG_SYS_TEXT_BASE=0xC000060
5 6 CONFIG_TI_COMMON_CMD_OPTIONS=y
configs/k2g_evm_defconfig
Diff comments   View file @ 9c4b013
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_KEYSTONE=y
  3 +CONFIG_ISW_ENTRY_ADDR=0xC0A0000
3 4 CONFIG_SYS_TEXT_BASE=0xC000000
4 5 CONFIG_TI_COMMON_CMD_OPTIONS=y
5 6 CONFIG_SPL_LIBCOMMON_SUPPORT=y
configs/k2g_hs_evm_defconfig
Diff comments   View file @ 9c4b013
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_KEYSTONE=y
3 3 CONFIG_TI_SECURE_DEVICE=y
  4 +CONFIG_ISW_ENTRY_ADDR=0xC0A0000
4 5 CONFIG_SYS_TEXT_BASE=0xC000060
5 6 CONFIG_TI_COMMON_CMD_OPTIONS=y
6 7 CONFIG_TARGET_K2G_EVM=y
configs/k2hk_evm_defconfig
Diff comments   View file @ 9c4b013
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_KEYSTONE=y
  3 +CONFIG_ISW_ENTRY_ADDR=0xC200000
3 4 CONFIG_SYS_TEXT_BASE=0xC000000
4 5 CONFIG_TI_COMMON_CMD_OPTIONS=y
5 6 CONFIG_SPL_LIBCOMMON_SUPPORT=y
configs/k2hk_hs_evm_defconfig
Diff comments   View file @ 9c4b013
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_KEYSTONE=y
  3 +CONFIG_ISW_ENTRY_ADDR=0xC200000
3 4 CONFIG_TI_SECURE_DEVICE=y
4 5 CONFIG_SYS_TEXT_BASE=0xC000060
5 6 CONFIG_TI_COMMON_CMD_OPTIONS=y
configs/k2l_evm_defconfig
Diff comments   View file @ 9c4b013
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_KEYSTONE=y
  3 +CONFIG_ISW_ENTRY_ADDR=0xC100000
3 4 CONFIG_SYS_TEXT_BASE=0xC000000
4 5 CONFIG_TI_COMMON_CMD_OPTIONS=y
5 6 CONFIG_SPL_LIBCOMMON_SUPPORT=y
configs/k2l_hs_evm_defconfig
Diff comments   View file @ 9c4b013
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_KEYSTONE=y
  3 +CONFIG_ISW_ENTRY_ADDR=0xC100000
3 4 CONFIG_TI_SECURE_DEVICE=y
4 5 CONFIG_SYS_TEXT_BASE=0xC000060
5 6 CONFIG_TI_COMMON_CMD_OPTIONS=y
include/configs/k2e_evm.h
Diff comments   View file @ 9c4b013
... ... @@ -40,10 +40,6 @@
40 40  
41 41 #include <configs/ti_armv7_keystone2.h>
42 42  
43   -/* SPL SPI Loader Configuration */
44   -#define CONFIG_SPL_TEXT_BASE 0x0c100000
45   -
46   -
47 43 #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
48 44  
49 45 /* NAND Configuration */
include/configs/k2g_evm.h
Diff comments   View file @ 9c4b013
... ... @@ -72,9 +72,6 @@
72 72 "bootm ${fit_loadaddr}#${name_fdt}"
73 73 #endif
74 74  
75   -/* SPL SPI Loader Configuration */
76   -#define CONFIG_SPL_TEXT_BASE 0x0c0a0000
77   -
78 75 /* NAND Configuration */
79 76 #define CONFIG_SYS_NAND_PAGE_2K
80 77  
include/configs/k2hk_evm.h
Diff comments   View file @ 9c4b013
... ... @@ -40,9 +40,6 @@
40 40  
41 41 #include <configs/ti_armv7_keystone2.h>
42 42  
43   -/* SPL SPI Loader Configuration */
44   -#define CONFIG_SPL_TEXT_BASE 0x0c200000
45   -
46 43 #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
47 44  
48 45 /* NAND Configuration */
include/configs/k2l_evm.h
Diff comments   View file @ 9c4b013
... ... @@ -40,9 +40,6 @@
40 40  
41 41 #include <configs/ti_armv7_keystone2.h>
42 42  
43   -/* SPL SPI Loader Configuration */
44   -#define CONFIG_SPL_TEXT_BASE 0x0c100000
45   -
46 43 #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
47 44  
48 45 /* NAND Configuration */
include/configs/ti_armv7_keystone2.h
Diff comments   View file @ 9c4b013
... ... @@ -22,7 +22,7 @@
22 22 /* Memory Configuration */
23 23 #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
24 24 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
25   -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE - \
  25 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_ISW_ENTRY_ADDR - \
26 26 GENERATED_GBL_DATA_SIZE)
27 27  
28 28 #ifdef CONFIG_SYS_MALLOC_F_LEN
29 29  
... ... @@ -32,9 +32,10 @@
32 32 #endif
33 33  
34 34 /* SPL SPI Loader Configuration */
  35 +#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR
35 36 #define CONFIG_SPL_PAD_TO 65536
36 37 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
37   -#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
  38 +#define CONFIG_SPL_BSS_START_ADDR (CONFIG_ISW_ENTRY_ADDR + \
38 39 CONFIG_SPL_MAX_SIZE)
39 40 #define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
40 41 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \