arm: socfpga: misc: Export bootmode into environment variable

setenv an environment variable called "bootmode" , which contains the board boot mode. This can be in turn used in scripts to determine from where to load kernel and such. Signed-off-by: Marek Vasut <marex@denx.de>

arm: socfpga: misc: Export bootmode into environment variable
setenv an environment variable called "bootmode" , which contains the board boot mode. This can be in turn used in scripts to determine from where to load kernel and such. Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut
1 parent d85e311e7f
Showing 2 changed files with 24 additions and 11 deletions Side-by-side Diff
arch/arm/mach-socfpga/misc.c
include/configs/socfpga_common.h
@@ -100,26 +100,38 @@
 }
 #endif
  
-#if defined(CONFIG_DISPLAY_CPUINFO)
-const char * const bsel_str[] = {
-	"Reserved",
-	"FPGA (HPS2FPGA Bridge)",
-	"NAND Flash (1.8V)",
-	"NAND Flash (3.0V)",
-	"SD/MMC External Transceiver (1.8V)",
-	"SD/MMC Internal Transceiver (3.0V)",
-	"QSPI Flash (1.8V)",
-	"QSPI Flash (3.0V)",
+struct {
+	const char	*mode;
+	const char	*name;
+} bsel_str[] = {
+	{ "rsvd", "Reserved", },
+	{ "fpga", "FPGA (HPS2FPGA Bridge)", },
+	{ "nand", "NAND Flash (1.8V)", },
+	{ "nand", "NAND Flash (3.0V)", },
+	{ "sd", "SD/MMC External Transceiver (1.8V)", },
+	{ "sd", "SD/MMC Internal Transceiver (3.0V)", },
+	{ "qspi", "QSPI Flash (1.8V)", },
+	{ "qspi", "QSPI Flash (3.0V)", },
 };
  
 /*
  * Print CPU information
  */
+#if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo(void)
 {
 	const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7;
 	puts("CPU:   Altera SoCFPGA Platform\n");
-	printf("BOOT:  %s\n", bsel_str[bsel]);
+	printf("BOOT:  %s\n", bsel_str[bsel].name);
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_ARCH_MISC_INIT
+int arch_misc_init(void)
+{
+	const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7;
+	setenv("bootmode", bsel_str[bsel].mode);
 	return 0;
 }
 #endif
@@ -18,6 +18,7 @@
  */
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO_LATE
+#define CONFIG_ARCH_MISC_INIT
 #define CONFIG_ARCH_EARLY_INIT_R
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_CLOCKS
...	...	@@ -100,26 +100,38 @@
100	100	}
101	101	#endif
102	102
103		-#if defined(CONFIG_DISPLAY_CPUINFO)
104		-const char * const bsel_str[] = {
105		- "Reserved",
106		- "FPGA (HPS2FPGA Bridge)",
107		- "NAND Flash (1.8V)",
108		- "NAND Flash (3.0V)",
109		- "SD/MMC External Transceiver (1.8V)",
110		- "SD/MMC Internal Transceiver (3.0V)",
111		- "QSPI Flash (1.8V)",
112		- "QSPI Flash (3.0V)",
	103	+struct {
	104	+ const char *mode;
	105	+ const char *name;
	106	+} bsel_str[] = {
	107	+ { "rsvd", "Reserved", },
	108	+ { "fpga", "FPGA (HPS2FPGA Bridge)", },
	109	+ { "nand", "NAND Flash (1.8V)", },
	110	+ { "nand", "NAND Flash (3.0V)", },
	111	+ { "sd", "SD/MMC External Transceiver (1.8V)", },
	112	+ { "sd", "SD/MMC Internal Transceiver (3.0V)", },
	113	+ { "qspi", "QSPI Flash (1.8V)", },
	114	+ { "qspi", "QSPI Flash (3.0V)", },
113	115	};
114	116
115	117	/*
116	118	* Print CPU information
117	119	*/
	120	+#if defined(CONFIG_DISPLAY_CPUINFO)
118	121	int print_cpuinfo(void)
119	122	{
120	123	const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7;
121	124	puts("CPU: Altera SoCFPGA Platform\n");
122		- printf("BOOT: %s\n", bsel_str[bsel]);
	125	+ printf("BOOT: %s\n", bsel_str[bsel].name);
	126	+ return 0;
	127	+}
	128	+#endif
	129	+
	130	+#ifdef CONFIG_ARCH_MISC_INIT
	131	+int arch_misc_init(void)
	132	+{
	133	+ const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7;
	134	+ setenv("bootmode", bsel_str[bsel].mode);
123	135	return 0;
124	136	}
125	137	#endif
...	...	@@ -18,6 +18,7 @@
18	18	*/
19	19	#define CONFIG_DISPLAY_CPUINFO
20	20	#define CONFIG_DISPLAY_BOARDINFO_LATE
	21	+#define CONFIG_ARCH_MISC_INIT
21	22	#define CONFIG_ARCH_EARLY_INIT_R
22	23	#define CONFIG_SYS_NO_FLASH
23	24	#define CONFIG_CLOCKS