Commit 9faa43c4b5e553ea7492edf987da6a0ed10da89c

Authored by Jagan Teki
Committed by Stefano Babic
1 parent 067a9daeb5

ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl

u-boot,dm-spl property is specific to U-Boot, so move it into
*u-boot.dtsi files for relevant i.MX6UL files.

This make syncing Linux dts files straight forward.

Also update the MAINTAINERS file for dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Showing 10 changed files with 93 additions and 13 deletions Side-by-side Diff

arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi
  1 +/*
  2 + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + */
  6 +
  7 +#include "imx6ul-u-boot.dtsi"
  8 +
  9 +&usdhc1 {
  10 + u-boot,dm-spl;
  11 +};
  12 +
  13 +&iomuxc {
  14 + pinctrl_usdhc1: usdhc1grp {
  15 + u-boot,dm-spl;
  16 + };
  17 +
  18 + pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
  19 + u-boot,dm-spl;
  20 + };
  21 +
  22 + pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
  23 + u-boot,dm-spl;
  24 + };
  25 +};
arch/arm/dts/imx6ul-geam-kit.dts
... ... @@ -87,7 +87,6 @@
87 87 };
88 88  
89 89 &usdhc1 {
90   - u-boot,dm-spl;
91 90 pinctrl-names = "default", "state_100mhz", "state_200mhz";
92 91 pinctrl-0 = <&pinctrl_usdhc1>;
93 92 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
... ... @@ -135,7 +134,6 @@
135 134 };
136 135  
137 136 pinctrl_usdhc1: usdhc1grp {
138   - u-boot,dm-spl;
139 137 fsl,pins = <
140 138 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
141 139 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
... ... @@ -147,7 +145,6 @@
147 145 };
148 146  
149 147 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
150   - u-boot,dm-spl;
151 148 fsl,pins = <
152 149 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
153 150 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
... ... @@ -159,7 +156,6 @@
159 156 };
160 157  
161 158 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
162   - u-boot,dm-spl;
163 159 fsl,pins = <
164 160 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
165 161 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi
  1 +/*
  2 + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + */
  6 +
  7 +#include "imx6ul-isiot-u-boot.dtsi"
  8 +
  9 +&usdhc2 {
  10 + u-boot,dm-spl;
  11 +};
arch/arm/dts/imx6ul-isiot-emmc.dts
... ... @@ -42,6 +42,7 @@
42 42  
43 43 /dts-v1/;
44 44  
  45 +#include "imx6ul.dtsi"
45 46 #include "imx6ul-isiot.dtsi"
46 47  
47 48 / {
arch/arm/dts/imx6ul-isiot-nand.dts
... ... @@ -42,6 +42,7 @@
42 42  
43 43 /dts-v1/;
44 44  
  45 +#include "imx6ul.dtsi"
45 46 #include "imx6ul-isiot.dtsi"
46 47  
47 48 / {
arch/arm/dts/imx6ul-isiot-u-boot.dtsi
  1 +/*
  2 + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + */
  6 +
  7 +#include "imx6ul-u-boot.dtsi"
  8 +
  9 +&usdhc1 {
  10 + u-boot,dm-spl;
  11 +};
  12 +
  13 +&pinctrl_usdhc1 {
  14 + u-boot,dm-spl;
  15 +};
  16 +
  17 +&pinctrl_usdhc2 {
  18 + u-boot,dm-spl;
  19 +};
arch/arm/dts/imx6ul-isiot.dtsi
... ... @@ -42,7 +42,6 @@
42 42  
43 43 #include <dt-bindings/gpio/gpio.h>
44 44 #include <dt-bindings/input/input.h>
45   -#include "imx6ul.dtsi"
46 45  
47 46 / {
48 47 memory {
... ... @@ -82,7 +81,6 @@
82 81 };
83 82  
84 83 &usdhc1 {
85   - u-boot,dm-spl;
86 84 pinctrl-names = "default";
87 85 pinctrl-0 = <&pinctrl_usdhc1>;
88 86 cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
... ... @@ -138,7 +136,6 @@
138 136 };
139 137  
140 138 pinctrl_usdhc1: usdhc1grp {
141   - u-boot,dm-spl;
142 139 fsl,pins = <
143 140 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
144 141 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
arch/arm/dts/imx6ul-u-boot.dtsi
  1 +/*
  2 + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + */
  6 +
  7 +/ {
  8 + soc {
  9 + u-boot,dm-spl;
  10 + };
  11 +};
  12 +
  13 +&aips1 {
  14 + u-boot,dm-spl;
  15 +};
  16 +
  17 +&gpio1 {
  18 + u-boot,dm-spl;
  19 +};
  20 +
  21 +&gpio4 {
  22 + u-boot,dm-spl;
  23 +};
  24 +
  25 +&iomuxc {
  26 + u-boot,dm-spl;
  27 +};
  28 +
  29 +&aips2 {
  30 + u-boot,dm-spl;
  31 +};
arch/arm/dts/imx6ul.dtsi
... ... @@ -134,7 +134,6 @@
134 134 compatible = "simple-bus";
135 135 interrupt-parent = <&gpc>;
136 136 ranges;
137   - u-boot,dm-spl;
138 137  
139 138 pmu {
140 139 compatible = "arm,cortex-a7-pmu";
... ... @@ -186,7 +185,6 @@
186 185 #size-cells = <1>;
187 186 reg = <0x02000000 0x100000>;
188 187 ranges;
189   - u-boot,dm-spl;
190 188  
191 189 spba-bus@02000000 {
192 190 compatible = "fsl,spba-bus", "simple-bus";
... ... @@ -418,7 +416,6 @@
418 416 #interrupt-cells = <2>;
419 417 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
420 418 <&iomuxc 16 33 16>;
421   - u-boot,dm-spl;
422 419 };
423 420  
424 421 gpio2: gpio@020a0000 {
... ... @@ -455,7 +452,6 @@
455 452 interrupt-controller;
456 453 #interrupt-cells = <2>;
457 454 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
458   - u-boot,dm-spl;
459 455 };
460 456  
461 457 gpio5: gpio@020ac000 {
... ... @@ -654,7 +650,6 @@
654 650 iomuxc: iomuxc@020e0000 {
655 651 compatible = "fsl,imx6ul-iomuxc";
656 652 reg = <0x020e0000 0x4000>;
657   - u-boot,dm-spl;
658 653 };
659 654  
660 655 gpr: iomuxc-gpr@020e4000 {
... ... @@ -735,7 +730,6 @@
735 730 #size-cells = <1>;
736 731 reg = <0x02100000 0x100000>;
737 732 ranges;
738   - u-boot,dm-spl;
739 733  
740 734 usbotg1: usb@02184000 {
741 735 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
board/engicam/imx6ul/MAINTAINERS
... ... @@ -8,8 +8,13 @@
8 8 F: configs/imx6ul_isiot_emmc_defconfig
9 9 F: configs/imx6ul_isiot_mmc_defconfig
10 10 F: configs/imx6ul_isiot_nand_defconfig
  11 +F: arch/arm/dts/imx6ul.dtsi
  12 +F: arch/arm/dts/imx6ul-u-boot.dtsi
11 13 F: arch/arm/dts/imx6ul-geam-kit.dts
  14 +F: arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi
12 15 F: arch/arm/dts/imx6ul-isiot.dtsi
  16 +F: arch/arm/dts/imx6ul-isiot-u-boot.dtsi
13 17 F: arch/arm/dts/imx6ul-isiot-emmc.dts
  18 +F: arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi
14 19 F: arch/arm/dts/imx6ul-isiot-nand.dts