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Commit 9fcf3d3a1d9c28619c7a8a1c5b4bad80216744a8

Authored by Lokesh Vutla
Committed by Tom Rini
1 parent 4d6bf5542e
Exists in v2017.01-smarct4x and in 40 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

ARM: DRA72x: Update EMIF data 

DRA72 has 1GB connected to EMIF1 only. Updating the details.
And also enable WA for BUG0039 only if corresponding EMIF is present.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>

Showing 3 changed files with 23 additions and 3 deletions Side-by-side Diff

arch/arm/cpu/armv7/omap-common/emif-common.c
Diff comments   View file @ 9fcf3d3
... ... @@ -1384,8 +1384,10 @@
1384 1384  
1385 1385 if (sdram_type == EMIF_SDRAM_TYPE_DDR3 &&
1386 1386 (!in_sdram && !warm_reset())) {
1387   - do_bug0039_workaround(EMIF1_BASE);
1388   - do_bug0039_workaround(EMIF2_BASE);
  1387 + if (emif1_enabled)
  1388 + do_bug0039_workaround(EMIF1_BASE);
  1389 + if (emif2_enabled)
  1390 + do_bug0039_workaround(EMIF2_BASE);
1389 1391 }
1390 1392  
1391 1393 debug("<<sdram_init()\n");
arch/arm/cpu/armv7/omap5/hw_data.c
Diff comments   View file @ 9fcf3d3
... ... @@ -619,6 +619,7 @@
619 619 break;
620 620 case DRA752_ES1_0:
621 621 case DRA752_ES1_1:
  622 + case DRA722_ES1_0:
622 623 *regs = &ioregs_dra7xx_es1;
623 624 break;
624 625  
arch/arm/cpu/armv7/omap5/sdram.c
Diff comments   View file @ 9fcf3d3
... ... @@ -229,6 +229,17 @@
229 229 .is_ma_present = 0x1
230 230 };
231 231  
  232 +/*
  233 + * DRA722 EVM EMIF1 CONFIGURATION
  234 + */
  235 +const struct dmm_lisa_map_regs lisa_map_2G_x_2 = {
  236 + .dmm_lisa_map_0 = 0x0,
  237 + .dmm_lisa_map_1 = 0x0,
  238 + .dmm_lisa_map_2 = 0x80600100,
  239 + .dmm_lisa_map_3 = 0xFF020100,
  240 + .is_ma_present = 0x1
  241 +};
  242 +
232 243 static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
233 244 {
234 245 switch (omap_revision()) {
... ... @@ -255,6 +266,7 @@
255 266 break;
256 267 }
257 268 break;
  269 + case DRA722_ES1_0:
258 270 default:
259 271 *regs = &emif_1_regs_ddr3_532_mhz_1cs_dra_es1;
260 272 }
261 273  
... ... @@ -275,8 +287,11 @@
275 287 break;
276 288 case DRA752_ES1_0:
277 289 case DRA752_ES1_1:
278   - default:
279 290 *dmm_lisa_regs = &lisa_map_2G_x_2_x_2_2G_x_1_x_2;
  291 + break;
  292 + case DRA722_ES1_0:
  293 + default:
  294 + *dmm_lisa_regs = &lisa_map_2G_x_2;
280 295 }
281 296  
282 297 }
... ... @@ -463,6 +478,7 @@
463 478 break;
464 479 case DRA752_ES1_0:
465 480 case DRA752_ES1_1:
  481 + case DRA722_ES1_0:
466 482 if (emif_nr == 1) {
467 483 *regs = dra_ddr3_ext_phy_ctrl_const_base_es1_emif1;
468 484 *size =
... ... @@ -630,6 +646,7 @@
630 646 break;
631 647 case DRA752_ES1_0:
632 648 case DRA752_ES1_1:
  649 + case DRA722_ES1_0:
633 650 bug_00339_regs_ptr = dra_bug_00339_regs;
634 651 *iterations = sizeof(dra_bug_00339_regs)/
635 652 sizeof(dra_bug_00339_regs[0]);