Commit a17617d6553369ba72c080128ed8d0b0c33dfc89

Authored by Albert ARIBAUD

Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

Showing 27 changed files Side-by-side Diff

arch/arm/cpu/arm1136/mx31/timer.c
... ... @@ -161,43 +161,4 @@
161 161 {
162 162 return MXC_CLK32;
163 163 }
164   -
165   -void reset_cpu(ulong addr)
166   -{
167   - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
168   - wdog->wcr = WDOG_ENABLE;
169   - while (1)
170   - ;
171   -}
172   -
173   -#ifdef CONFIG_HW_WATCHDOG
174   -void mxc_hw_watchdog_enable(void)
175   -{
176   - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
177   - u16 secs;
178   -
179   - /*
180   - * The timer watchdog can be set between
181   - * 0.5 and 128 Seconds. If not defined
182   - * in configuration file, sets 64 Seconds
183   - */
184   -#ifdef CONFIG_SYS_WD_TIMER_SECS
185   - secs = (CONFIG_SYS_WD_TIMER_SECS << 1) & 0xFF;
186   - if (!secs) secs = 1;
187   -#else
188   - secs = 64;
189   -#endif
190   - setbits_le16(&wdog->wcr, (secs << WDOG_WT_SHIFT) | WDOG_ENABLE
191   - | WDOG_WDZST);
192   -}
193   -
194   -
195   -void mxc_hw_watchdog_reset(void)
196   -{
197   - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
198   -
199   - writew(0x5555, &wdog->wsr);
200   - writew(0xAAAA, &wdog->wsr);
201   -}
202   -#endif
arch/arm/cpu/arm1136/mx35/generic.c
... ... @@ -488,12 +488,6 @@
488 488 return 0;
489 489 }
490 490  
491   -void reset_cpu(ulong addr)
492   -{
493   - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
494   - writew(4, &wdog->wcr);
495   -}
496   -
497 491 #define RCSR_MEM_CTL_WEIM 0
498 492 #define RCSR_MEM_CTL_NAND 1
499 493 #define RCSR_MEM_CTL_ATA 2
arch/arm/cpu/armv7/mx6/lowlevel_init.S
... ... @@ -20,7 +20,17 @@
20 20  
21 21 #include <linux/linkage.h>
22 22  
  23 +.macro init_arm_errata
  24 + /* ARM erratum ID #743622 */
  25 + mrc p15, 0, r10, c15, c0, 1 /* read diagnostic register */
  26 + orr r10, r10, #1 << 6 /* set bit #6 */
  27 + /* ARM erratum ID #751472 */
  28 + orr r10, r10, #1 << 11 /* set bit #11 */
  29 + mcr p15, 0, r10, c15, c0, 1 /* write diagnostic register */
  30 +.endm
  31 +
23 32 ENTRY(lowlevel_init)
  33 + init_arm_errata
24 34 mov pc, lr
25 35 ENDPROC(lowlevel_init)
arch/arm/imx-common/cpu.c
... ... @@ -175,11 +175,6 @@
175 175 }
176 176 #endif
177 177  
178   -void reset_cpu(ulong addr)
179   -{
180   - __raw_writew(4, WDOG1_BASE_ADDR);
181   -}
182   -
183 178 u32 get_ahb_clk(void)
184 179 {
185 180 struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
arch/arm/include/asm/arch-mx31/clock.h
... ... @@ -58,8 +58,6 @@
58 58 void mx31_uart1_hw_init(void);
59 59 void mx31_uart2_hw_init(void);
60 60 void mx31_spi2_hw_init(void);
61   -void mxc_hw_watchdog_enable(void);
62   -void mxc_hw_watchdog_reset(void);
63 61  
64 62 #endif /* __ASM_ARCH_CLOCK_H */
arch/arm/include/asm/arch-mx31/imx-regs.h
... ... @@ -68,17 +68,6 @@
68 68 u32 test;
69 69 };
70 70  
71   -/* Watchdog Timer (WDOG) registers */
72   -#define WDOG_ENABLE (1 << 2)
73   -#define WDOG_WT_SHIFT 8
74   -#define WDOG_WDZST (1 << 0)
75   -
76   -struct wdog_regs {
77   - u16 wcr; /* Control */
78   - u16 wsr; /* Service */
79   - u16 wrsr; /* Reset Status */
80   -};
81   -
82 71 /* IIM Control Registers */
83 72 struct iim_regs {
84 73 u32 iim_stat;
... ... @@ -687,7 +676,7 @@
687 676  
688 677 #define ARM_PPMRR 0x40000015
689 678  
690   -#define WDOG_BASE 0x53FDC000
  679 +#define WDOG1_BASE_ADDR 0x53FDC000
691 680  
692 681 /*
693 682 * GPIO
arch/arm/include/asm/arch-mx35/imx-regs.h
... ... @@ -80,7 +80,7 @@
80 80 #define GPIO2_BASE_ADDR 0x53FD0000
81 81 #define SDMA_BASE_ADDR 0x53FD4000
82 82 #define RTC_BASE_ADDR 0x53FD8000
83   -#define WDOG_BASE_ADDR 0x53FDC000
  83 +#define WDOG1_BASE_ADDR 0x53FDC000
84 84 #define PWM_BASE_ADDR 0x53FE0000
85 85 #define RTIC_BASE_ADDR 0x53FEC000
86 86 #define IIM_BASE_ADDR 0x53FF0000
... ... @@ -290,15 +290,6 @@
290 290 u32 stat;
291 291 u32 period;
292 292 u32 test;
293   -};
294   -
295   -/* Watchdog Timer (WDOG) registers */
296   -struct wdog_regs {
297   - u16 wcr; /* Control */
298   - u16 wsr; /* Service */
299   - u16 wrsr; /* Reset Status */
300   - u16 wicr; /* Interrupt Control */
301   - u16 wmcr; /* Misc Control */
302 293 };
303 294  
304 295 struct esdc_regs {
arch/arm/include/asm/arch-mx5/imx-regs.h
... ... @@ -218,16 +218,6 @@
218 218 */
219 219 #define WBED 1
220 220  
221   -/*
222   - * WEIM WCR
223   - */
224   -#define BCM 1
225   -#define GBCD(x) (((x) & 0x3) << 1)
226   -#define INTEN (1 << 4)
227   -#define INTPOL (1 << 5)
228   -#define WDOG_EN (1 << 8)
229   -#define WDOG_LIMIT(x) (((x) & 0x3) << 9)
230   -
231 221 #define CS0_128 0
232 222 #define CS0_64M_CS1_64M 1
233 223 #define CS0_64M_CS1_32M_CS2_32M 2
board/davedenx/qong/qong.c
... ... @@ -37,13 +37,6 @@
37 37  
38 38 DECLARE_GLOBAL_DATA_PTR;
39 39  
40   -#ifdef CONFIG_HW_WATCHDOG
41   -void hw_watchdog_reset(void)
42   -{
43   - mxc_hw_watchdog_reset();
44   -}
45   -#endif
46   -
47 40 int dram_init(void)
48 41 {
49 42 /* dram_init must store complete ramsize in gd->ram_size */
... ... @@ -188,7 +181,7 @@
188 181 pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
189 182  
190 183 #ifdef CONFIG_HW_WATCHDOG
191   - mxc_hw_watchdog_enable();
  184 + hw_watchdog_init();
192 185 #endif
193 186  
194 187 return 0;
board/freescale/mx31pdk/mx31pdk.c
... ... @@ -36,13 +36,6 @@
36 36  
37 37 DECLARE_GLOBAL_DATA_PTR;
38 38  
39   -#ifdef CONFIG_HW_WATCHDOG
40   -void hw_watchdog_reset(void)
41   -{
42   - mxc_hw_watchdog_reset();
43   -}
44   -#endif
45   -
46 39 int dram_init(void)
47 40 {
48 41 /* dram_init must store complete ramsize in gd->ram_size */
... ... @@ -98,7 +91,7 @@
98 91 pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
99 92 pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
100 93 #ifdef CONFIG_HW_WATCHDOG
101   - mxc_hw_watchdog_enable();
  94 + hw_watchdog_init();
102 95 #endif
103 96 return 0;
104 97 }
board/freescale/mx51evk/mx51evk.c
... ... @@ -489,8 +489,6 @@
489 489 /* address of boot parameters */
490 490 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
491 491  
492   - lcd_enable();
493   -
494 492 return 0;
495 493 }
496 494  
board/freescale/mx51evk/mx51evk_video.c
... ... @@ -48,6 +48,22 @@
48 48 .vmode = FB_VMODE_NONINTERLACED
49 49 };
50 50  
  51 +static struct fb_videomode const dvi = {
  52 + .name = "DVI panel",
  53 + .refresh = 60,
  54 + .xres = 1024,
  55 + .yres = 768,
  56 + .pixclock = 15385,
  57 + .left_margin = 220,
  58 + .right_margin = 40,
  59 + .upper_margin = 21,
  60 + .lower_margin = 7,
  61 + .hsync_len = 60,
  62 + .vsync_len = 10,
  63 + .sync = 0,
  64 + .vmode = FB_VMODE_NONINTERLACED
  65 +};
  66 +
51 67 void setup_iomux_lcd(void)
52 68 {
53 69 /* DI2_PIN15 */
54 70  
55 71  
... ... @@ -73,10 +89,27 @@
73 89 gpio_direction_output(MX51EVK_LCD_BACKLIGHT, 1);
74 90 }
75 91  
76   -void lcd_enable(void)
  92 +int board_video_skip(void)
77 93 {
78   - int ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565);
  94 + int ret;
  95 + char const *e = getenv("panel");
  96 +
  97 + if (e) {
  98 + if (strcmp(e, "claa") == 0) {
  99 + ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565);
  100 + if (ret)
  101 + printf("claa cannot be configured: %d\n", ret);
  102 + return ret;
  103 + }
  104 + }
  105 +
  106 + /*
  107 + * 'panel' env variable not found or has different value than 'claa'
  108 + * Defaulting to dvi output.
  109 + */
  110 + ret = ipuv3_fb_init(&dvi, 0, IPU_PIX_FMT_RGB24);
79 111 if (ret)
80   - printf("LCD cannot be configured: %d\n", ret);
  112 + printf("dvi cannot be configured: %d\n", ret);
  113 + return ret;
81 114 }
board/freescale/mx53loco/mx53loco.c
... ... @@ -503,8 +503,6 @@
503 503 mxc_set_sata_internal_clock();
504 504 setup_iomux_i2c();
505 505  
506   - lcd_enable();
507   -
508 506 return 0;
509 507 }
510 508  
board/freescale/mx53loco/mx53loco_video.c
... ... @@ -46,6 +46,21 @@
46 46 .vmode = FB_VMODE_NONINTERLACED
47 47 };
48 48  
  49 +static struct fb_videomode const seiko_wvga = {
  50 + .name = "Seiko-43WVF1G",
  51 + .refresh = 60,
  52 + .xres = 800,
  53 + .yres = 480,
  54 + .pixclock = 29851, /* picosecond (33.5 MHz) */
  55 + .left_margin = 89,
  56 + .right_margin = 164,
  57 + .upper_margin = 23,
  58 + .lower_margin = 10,
  59 + .hsync_len = 10,
  60 + .vsync_len = 10,
  61 + .sync = 0,
  62 +};
  63 +
49 64 void setup_iomux_lcd(void)
50 65 {
51 66 mxc_request_iomux(MX53_PIN_DI0_DISP_CLK, IOMUX_CONFIG_ALT0);
52 67  
53 68  
... ... @@ -86,10 +101,27 @@
86 101 gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_GPIO_1), 1);
87 102 }
88 103  
89   -void lcd_enable(void)
  104 +int board_video_skip(void)
90 105 {
91   - int ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565);
  106 + int ret;
  107 + char const *e = getenv("panel");
  108 +
  109 + if (e) {
  110 + if (strcmp(e, "seiko") == 0) {
  111 + ret = ipuv3_fb_init(&seiko_wvga, 0, IPU_PIX_FMT_RGB24);
  112 + if (ret)
  113 + printf("Seiko cannot be configured: %d\n", ret);
  114 + return ret;
  115 + }
  116 + }
  117 +
  118 + /*
  119 + * 'panel' env variable not found or has different value than 'seiko'
  120 + * Defaulting to claa lcd.
  121 + */
  122 + ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565);
92 123 if (ret)
93   - printf("LCD cannot be configured: %d\n", ret);
  124 + printf("CLAA cannot be configured: %d\n", ret);
  125 + return ret;
94 126 }
board/hale/tt01/tt01.c
... ... @@ -179,7 +179,7 @@
179 179 int board_late_init(void)
180 180 {
181 181 #ifdef CONFIG_HW_WATCHDOG
182   - mxc_hw_watchdog_enable();
  182 + hw_watchdog_init();
183 183 #endif
184 184  
185 185 return 0;
  1 +Watchdog driver general info
  2 +
  3 +CONFIG_HW_WATCHDOG
  4 + This enables hw_watchdog_reset to be called during various loops,
  5 + including waiting for a character on a serial port. But it
  6 + does not also call hw_watchdog_init. Boards which want this
  7 + enabled must call this function in their board file. This split
  8 + is useful because some rom's enable the watchdog when downloading
  9 + new code, so it must be serviced, but the board would rather it
  10 + was off. And, it cannot always be turned off once on.
  11 +
  12 +CONFIG_WATCHDOG_TIMEOUT_MSECS
  13 + Can be used to change the timeout for i.mx31/35/5x/6x.
  14 + If not given, will default to maximum timeout. This would
  15 + be 128000 msec for i.mx31/35/5x/6x.
  16 +
  17 +CONFIG_AT91SAM9_WATCHDOG
  18 + Available for AT91SAM9 to service the watchdog.
  19 +
  20 +CONFIG_FTWDT010_WATCHDOG
  21 + Available for FTWDT010 to service the watchdog.
  22 +
  23 +CONFIG_FTWDT010_HW_TIMEOUT
  24 + Can be used to change the timeout for FTWDT010.
  25 +
  26 +CONFIG_IMX_WATCHDOG
  27 + Available for i.mx31/35/5x/6x to service the watchdog. This is not
  28 + automatically set because some boards (vision2) still need to define
  29 + their own hw_watchdog_reset routine.
drivers/watchdog/Makefile
... ... @@ -27,6 +27,9 @@
27 27  
28 28 COBJS-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
29 29 COBJS-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
  30 +ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6))
  31 +COBJS-y += imx_watchdog.o
  32 +endif
30 33 COBJS-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
31 34 COBJS-$(CONFIG_S5P) += s5p_wdt.o
32 35  
drivers/watchdog/imx_watchdog.c
  1 +/*
  2 + * watchdog.c - driver for i.mx on-chip watchdog
  3 + *
  4 + * Licensed under the GPL-2 or later.
  5 + */
  6 +
  7 +#include <common.h>
  8 +#include <asm/io.h>
  9 +#include <watchdog.h>
  10 +#include <asm/arch/imx-regs.h>
  11 +
  12 +struct watchdog_regs {
  13 + u16 wcr; /* Control */
  14 + u16 wsr; /* Service */
  15 + u16 wrsr; /* Reset Status */
  16 +};
  17 +
  18 +#define WCR_WDZST 0x01
  19 +#define WCR_WDBG 0x02
  20 +#define WCR_WDE 0x04 /* WDOG enable */
  21 +#define WCR_WDT 0x08
  22 +#define WCR_WDW 0x80
  23 +#define SET_WCR_WT(x) (x << 8)
  24 +
  25 +#ifdef CONFIG_IMX_WATCHDOG
  26 +void hw_watchdog_reset(void)
  27 +{
  28 + struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
  29 +
  30 + writew(0x5555, &wdog->wsr);
  31 + writew(0xaaaa, &wdog->wsr);
  32 +}
  33 +
  34 +void hw_watchdog_init(void)
  35 +{
  36 + struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
  37 + u16 timeout;
  38 +
  39 + /*
  40 + * The timer watchdog can be set between
  41 + * 0.5 and 128 Seconds. If not defined
  42 + * in configuration file, sets 128 Seconds
  43 + */
  44 +#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
  45 +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
  46 +#endif
  47 + timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
  48 + writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT |
  49 + WCR_WDW | SET_WCR_WT(timeout), &wdog->wcr);
  50 + hw_watchdog_reset();
  51 +}
  52 +#endif
  53 +
  54 +void reset_cpu(ulong addr)
  55 +{
  56 + struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
  57 +
  58 + writew(WCR_WDE, &wdog->wcr);
  59 + writew(0x5555, &wdog->wsr);
  60 + writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */
  61 + while (1) {
  62 + /*
  63 + * spin for .5 seconds before reset
  64 + */
  65 + }
  66 +}
include/configs/mx28evk.h
... ... @@ -290,27 +290,60 @@
290 290 "uimage=uImage\0" \
291 291 "console_fsl=ttyAM0\0" \
292 292 "console_mainline=ttyAMA0\0" \
  293 + "fdt_file=imx28-evk.dtb\0" \
  294 + "fdt_addr=0x41000000\0" \
  295 + "boot_fdt=try\0" \
  296 + "ip_dyn=yes\0" \
293 297 "mmcdev=0\0" \
294 298 "mmcpart=2\0" \
295   - "mmcroot=/dev/mmcblk0p3 rw\0" \
296   - "mmcrootfstype=ext3 rootwait\0" \
  299 + "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
297 300 "mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
298   - "root=${mmcroot} " \
299   - "rootfstype=${mmcrootfstype}\0" \
  301 + "root=${mmcroot}\0" \
300 302 "loadbootscript=" \
301 303 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
302 304 "bootscript=echo Running bootscript from mmc ...; " \
303 305 "source\0" \
304 306 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
  307 + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
305 308 "mmcboot=echo Booting from mmc ...; " \
306   - "run mmcargs; " \
307   - "bootm\0" \
  309 + "run mmcargs; " \
  310 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  311 + "if run loadfdt; then " \
  312 + "bootm ${loadaddr} - ${fdt_addr}; " \
  313 + "else " \
  314 + "if test ${boot_fdt} = try; then " \
  315 + "bootm; " \
  316 + "else " \
  317 + "echo WARN: Cannot load the DT; " \
  318 + "fi; " \
  319 + "fi; " \
  320 + "else " \
  321 + "bootm; " \
  322 + "fi;\0" \
308 323 "netargs=setenv bootargs console=${console_mainline},${baudrate} " \
309 324 "root=/dev/nfs " \
310 325 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
311 326 "netboot=echo Booting from net ...; " \
312 327 "run netargs; " \
313   - "dhcp ${uimage}; bootm\0"
  328 + "if test ${ip_dyn} = yes; then " \
  329 + "setenv get_cmd dhcp; " \
  330 + "else " \
  331 + "setenv get_cmd tftp; " \
  332 + "fi; " \
  333 + "${get_cmd} ${uimage}; " \
  334 + "if test ${boot_fdt} = yes; then " \
  335 + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  336 + "bootm ${loadaddr} - ${fdt_addr}; " \
  337 + "else " \
  338 + "if test ${boot_fdt} = try; then " \
  339 + "bootm; " \
  340 + "else " \
  341 + "echo WARN: Cannot load the DT; " \
  342 + "fi;" \
  343 + "fi; " \
  344 + "else " \
  345 + "bootm; " \
  346 + "fi;\0"
314 347  
315 348 #define CONFIG_BOOTCOMMAND \
316 349 "mmc dev ${mmcdev}; if mmc rescan; then " \
include/configs/mx31pdk.h
... ... @@ -61,6 +61,7 @@
61 61 #define CONFIG_MXC_UART
62 62 #define CONFIG_MXC_UART_BASE UART1_BASE
63 63 #define CONFIG_HW_WATCHDOG
  64 +#define CONFIG_IMX_WATCHDOG
64 65 #define CONFIG_MXC_GPIO
65 66  
66 67 #define CONFIG_HARD_SPI
include/configs/mx53loco.h
... ... @@ -119,24 +119,60 @@
119 119 #define CONFIG_EXTRA_ENV_SETTINGS \
120 120 "script=boot.scr\0" \
121 121 "uimage=uImage\0" \
  122 + "fdt_file=imx53-qsb.dtb\0" \
  123 + "fdt_addr=0x71000000\0" \
  124 + "boot_fdt=try\0" \
  125 + "ip_dyn=yes\0" \
122 126 "mmcdev=0\0" \
123 127 "mmcpart=2\0" \
124 128 "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
125   - "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot} " \
  129 + "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
126 130 "loadbootscript=" \
127 131 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
128 132 "bootscript=echo Running bootscript from mmc ...; " \
129 133 "source\0" \
130 134 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
  135 + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
131 136 "mmcboot=echo Booting from mmc ...; " \
132 137 "run mmcargs; " \
133   - "bootm\0" \
  138 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  139 + "if run loadfdt; then " \
  140 + "bootm ${loadaddr} - ${fdt_addr}; " \
  141 + "else " \
  142 + "if test ${boot_fdt} = try; then " \
  143 + "bootm; " \
  144 + "else " \
  145 + "echo WARN: Cannot load the DT; " \
  146 + "fi; " \
  147 + "fi; " \
  148 + "else " \
  149 + "bootm; " \
  150 + "fi;\0" \
134 151 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
135 152 "root=/dev/nfs " \
136 153 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
137 154 "netboot=echo Booting from net ...; " \
138 155 "run netargs; " \
139   - "dhcp ${uimage}; bootm\0" \
  156 + "if test ${ip_dyn} = yes; then " \
  157 + "setenv get_cmd dhcp; " \
  158 + "else " \
  159 + "setenv get_cmd tftp; " \
  160 + "fi; " \
  161 + "${get_cmd} ${uimage}; " \
  162 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  163 + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  164 + "bootm ${loadaddr} - ${fdt_addr}; " \
  165 + "else " \
  166 + "if test ${boot_fdt} = try; then " \
  167 + "bootm; " \
  168 + "else " \
  169 + "echo ERROR: Cannot load the DT; " \
  170 + "exit; " \
  171 + "fi; " \
  172 + "fi; " \
  173 + "else " \
  174 + "bootm; " \
  175 + "fi;\0"
140 176  
141 177 #define CONFIG_BOOTCOMMAND \
142 178 "mmc dev ${mmcdev}; if mmc rescan; then " \
... ... @@ -157,7 +193,7 @@
157 193 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
158 194 #define CONFIG_SYS_PROMPT "MX53LOCO U-Boot > "
159 195 #define CONFIG_AUTO_COMPLETE
160   -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  196 +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
161 197  
162 198 /* Print Buffer Size */
163 199 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
include/configs/mx6qsabre_common.h
... ... @@ -83,10 +83,14 @@
83 83 #define CONFIG_EXTRA_ENV_SETTINGS \
84 84 "script=boot.scr\0" \
85 85 "uimage=uImage\0" \
  86 + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  87 + "fdt_addr=0x11000000\0" \
  88 + "boot_fdt=try\0" \
  89 + "ip_dyn=yes\0" \
86 90 "console=" CONFIG_CONSOLE_DEV "\0" \
87 91 "fdt_high=0xffffffff\0" \
88 92 "initrd_high=0xffffffff\0" \
89   - "mmcdev=0\0" \" \
  93 + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \" \
90 94 "mmcpart=1\0" \
91 95 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
92 96 "mmcargs=setenv bootargs console=${console},${baudrate} " \
93 97  
94 98  
... ... @@ -96,15 +100,46 @@
96 100 "bootscript=echo Running bootscript from mmc ...; " \
97 101 "source\0" \
98 102 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
99   - "mmcboot=echo Booting from mmc ...; " \
  103 + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  104 + "mmcboot=echo Booting from mmc ...; " \
100 105 "run mmcargs; " \
101   - "bootm\0" \
  106 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  107 + "if run loadfdt; then " \
  108 + "bootm ${loadaddr} - ${fdt_addr}; " \
  109 + "else " \
  110 + "if test ${boot_fdt} = try; then " \
  111 + "bootm; " \
  112 + "else " \
  113 + "echo WARN: Cannot load the DT; " \
  114 + "fi; " \
  115 + "fi; " \
  116 + "else " \
  117 + "bootm; " \
  118 + "fi;\0" \
102 119 "netargs=setenv bootargs console=${console},${baudrate} " \
103 120 "root=/dev/nfs " \
104 121 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
105 122 "netboot=echo Booting from net ...; " \
106 123 "run netargs; " \
107   - "dhcp ${uimage}; bootm\0" \
  124 + "if test ${ip_dyn} = yes; then " \
  125 + "setenv get_cmd dhcp; " \
  126 + "else " \
  127 + "setenv get_cmd tftp; " \
  128 + "fi; " \
  129 + "${get_cmd} ${uimage}; " \
  130 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  131 + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  132 + "bootm ${loadaddr} - ${fdt_addr}; " \
  133 + "else " \
  134 + "if test ${boot_fdt} = try; then " \
  135 + "bootm; " \
  136 + "else " \
  137 + "echo WARN: Cannot load the DT; " \
  138 + "fi; " \
  139 + "fi; " \
  140 + "else " \
  141 + "bootm; " \
  142 + "fi;\0"
108 143  
109 144 #define CONFIG_BOOTCOMMAND \
110 145 "mmc dev ${mmcdev};" \
include/configs/mx6qsabreauto.h
... ... @@ -15,6 +15,7 @@
15 15 #define CONFIG_MACH_TYPE 3529
16 16 #define CONFIG_MXC_UART_BASE UART4_BASE
17 17 #define CONFIG_CONSOLE_DEV "ttymxc3"
  18 +#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb"
18 19 #define CONFIG_MMCROOT "/dev/mmcblk0p2"
19 20 #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
20 21  
include/configs/mx6qsabrelite.h
... ... @@ -152,43 +152,78 @@
152 152 #define CONFIG_SYS_TEXT_BASE 0x17800000
153 153  
154 154 #define CONFIG_EXTRA_ENV_SETTINGS \
155   - "script=boot.scr\0" \
156   - "uimage=uImage\0" \
  155 + "script=boot.scr\0" \
  156 + "uimage=uImage\0" \
157 157 "console=ttymxc1\0" \
158   - "fdt_high=0xffffffff\0" \
  158 + "fdt_high=0xffffffff\0" \
159 159 "initrd_high=0xffffffff\0" \
160   - "mmcdev=0\0" \
161   - "mmcpart=2\0" \
162   - "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
163   - "mmcargs=setenv bootargs console=${console},${baudrate} " \
164   - "root=${mmcroot}\0" \
165   - "loadbootscript=" \
166   - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
167   - "bootscript=echo Running bootscript from mmc ...; " \
168   - "source\0" \
169   - "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
170   - "mmcboot=echo Booting from mmc ...; " \
171   - "run mmcargs; " \
172   - "bootm\0" \
173   - "netargs=setenv bootargs console=${console},${baudrate} " \
174   - "root=/dev/nfs " \
175   - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
176   - "netboot=echo Booting from net ...; " \
177   - "run netargs; " \
178   - "dhcp ${uimage}; bootm\0" \
  160 + "fdt_file=imx6q-sabrelite.dtb\0" \
  161 + "fdt_addr=0x11000000\0" \
  162 + "boot_fdt=try\0" \
  163 + "ip_dyn=yes\0" \
  164 + "mmcdev=0\0" \
  165 + "mmcpart=2\0" \
  166 + "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
  167 + "mmcargs=setenv bootargs console=${console},${baudrate} " \
  168 + "root=${mmcroot}\0" \
  169 + "loadbootscript=" \
  170 + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  171 + "bootscript=echo Running bootscript from mmc ...; " \
  172 + "source\0" \
  173 + "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
  174 + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  175 + "mmcboot=echo Booting from mmc ...; " \
  176 + "run mmcargs; " \
  177 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  178 + "if run loadfdt; then " \
  179 + "bootm ${loadaddr} - ${fdt_addr}; " \
  180 + "else " \
  181 + "if test ${boot_fdt} = try; then " \
  182 + "bootm; " \
  183 + "else " \
  184 + "echo WARN: Cannot load the DT; " \
  185 + "fi; " \
  186 + "fi; " \
  187 + "else " \
  188 + "bootm; " \
  189 + "fi;\0" \
  190 + "netargs=setenv bootargs console=${console},${baudrate} " \
  191 + "root=/dev/nfs " \
  192 + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  193 + "netboot=echo Booting from net ...; " \
  194 + "run netargs; " \
  195 + "if test ${ip_dyn} = yes; then " \
  196 + "setenv get_cmd dhcp; " \
  197 + "else " \
  198 + "setenv get_cmd tftp; " \
  199 + "fi; " \
  200 + "${get_cmd} ${uimage}; " \
  201 + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  202 + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  203 + "bootm ${loadaddr} - ${fdt_addr}; " \
  204 + "else " \
  205 + "if test ${boot_fdt} = try; then " \
  206 + "bootm; " \
  207 + "else " \
  208 + "echo WARN: Cannot load the DT; " \
  209 + "fi; " \
  210 + "fi; " \
  211 + "else " \
  212 + "bootm; " \
  213 + "fi;\0"
179 214  
180 215 #define CONFIG_BOOTCOMMAND \
181   - "mmc dev ${mmcdev};" \
182   - "mmc dev ${mmcdev}; if mmc rescan; then " \
183   - "if run loadbootscript; then " \
184   - "run bootscript; " \
185   - "else " \
186   - "if run loaduimage; then " \
187   - "run mmcboot; " \
188   - "else run netboot; " \
189   - "fi; " \
190   - "fi; " \
191   - "else run netboot; fi"
  216 + "mmc dev ${mmcdev};" \
  217 + "mmc dev ${mmcdev}; if mmc rescan; then " \
  218 + "if run loadbootscript; then " \
  219 + "run bootscript; " \
  220 + "else " \
  221 + "if run loaduimage; then " \
  222 + "run mmcboot; " \
  223 + "else run netboot; " \
  224 + "fi; " \
  225 + "fi; " \
  226 + "else run netboot; fi"
192 227  
193 228 #define CONFIG_ARP_TIMEOUT 200UL
194 229  
include/configs/mx6qsabresd.h
... ... @@ -21,13 +21,14 @@
21 21 #define CONFIG_MXC_UART_BASE UART1_BASE
22 22 #define CONFIG_CONSOLE_DEV "ttymxc0"
23 23 #define CONFIG_MMCROOT "/dev/mmcblk1p2"
  24 +#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
24 25 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
25 26  
26 27 #include "mx6qsabre_common.h"
27 28  
28 29 #define CONFIG_SYS_FSL_USDHC_NUM 3
29 30 #if defined(CONFIG_ENV_IS_IN_MMC)
30   -#define CONFIG_SYS_MMC_ENV_DEV 2 /* eMMC/uSDHC4 */
  31 +#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
31 32 #define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */
32 33 #endif
33 34  
include/configs/qong.h
... ... @@ -52,6 +52,7 @@
52 52  
53 53 #define CONFIG_MXC_GPIO
54 54 #define CONFIG_HW_WATCHDOG
  55 +#define CONFIG_IMX_WATCHDOG
55 56  
56 57 #define CONFIG_MXC_SPI
57 58 #define CONFIG_DEFAULT_SPI_BUS 1
... ... @@ -35,6 +35,7 @@
35 35 * Hardware watchdog
36 36 */
37 37 #ifdef CONFIG_HW_WATCHDOG
  38 + void hw_watchdog_init(void);
38 39 #if defined(__ASSEMBLY__)
39 40 #define WATCHDOG_RESET bl hw_watchdog_reset
40 41 #else