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Commit a47492ac60657dd9d59c713aa049319ea6eabd52

Authored by Jean-Christophe PLAGNIOL-VILLARD
1 parent 42f9ebff2f
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

at91sam9/at91cap: spi init add hardware chip select support 

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Showing 5 changed files with 136 additions and 27 deletions Side-by-side Diff

cpu/arm926ejs/at91/at91cap9_spi.c
Diff comments   View file @ a47492a
... ... @@ -38,15 +38,27 @@
38 38 at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
39 39  
40 40 if (cs_mask & (1 << 0)) {
41   - at91_set_gpio_output(AT91_PIN_PA5, 1);
  41 + at91_set_B_periph(AT91_PIN_PA5, 1);
42 42 }
43 43 if (cs_mask & (1 << 1)) {
44   - at91_set_gpio_output(AT91_PIN_PA3, 1);
  44 + at91_set_B_periph(AT91_PIN_PA3, 1);
45 45 }
46 46 if (cs_mask & (1 << 2)) {
47   - at91_set_gpio_output(AT91_PIN_PD0, 1);
  47 + at91_set_B_periph(AT91_PIN_PD0, 1);
48 48 }
49 49 if (cs_mask & (1 << 3)) {
  50 + at91_set_B_periph(AT91_PIN_PD1, 1);
  51 + }
  52 + if (cs_mask & (1 << 4)) {
  53 + at91_set_gpio_output(AT91_PIN_PA5, 1);
  54 + }
  55 + if (cs_mask & (1 << 5)) {
  56 + at91_set_gpio_output(AT91_PIN_PA3, 1);
  57 + }
  58 + if (cs_mask & (1 << 6)) {
  59 + at91_set_gpio_output(AT91_PIN_PD0, 1);
  60 + }
  61 + if (cs_mask & (1 << 7)) {
50 62 at91_set_gpio_output(AT91_PIN_PD1, 1);
51 63 }
52 64 }
53 65  
54 66  
55 67  
56 68  
... ... @@ -61,16 +73,29 @@
61 73 at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1);
62 74  
63 75 if (cs_mask & (1 << 0)) {
64   - at91_set_gpio_output(AT91_PIN_PB15, 1);
  76 + at91_set_A_periph(AT91_PIN_PB15, 1);
65 77 }
66 78 if (cs_mask & (1 << 1)) {
67   - at91_set_gpio_output(AT91_PIN_PB16, 1);
  79 + at91_set_A_periph(AT91_PIN_PB16, 1);
68 80 }
69 81 if (cs_mask & (1 << 2)) {
70   - at91_set_gpio_output(AT91_PIN_PB17, 1);
  82 + at91_set_A_periph(AT91_PIN_PB17, 1);
71 83 }
72 84 if (cs_mask & (1 << 3)) {
  85 + at91_set_A_periph(AT91_PIN_PB18, 1);
  86 + }
  87 + if (cs_mask & (1 << 4)) {
  88 + at91_set_gpio_output(AT91_PIN_PB15, 1);
  89 + }
  90 + if (cs_mask & (1 << 5)) {
  91 + at91_set_gpio_output(AT91_PIN_PB16, 1);
  92 + }
  93 + if (cs_mask & (1 << 6)) {
  94 + at91_set_gpio_output(AT91_PIN_PB17, 1);
  95 + }
  96 + if (cs_mask & (1 << 7)) {
73 97 at91_set_gpio_output(AT91_PIN_PB18, 1);
74 98 }
  99 +
75 100 }
cpu/arm926ejs/at91/at91sam9260_spi.c
Diff comments   View file @ a47492a
... ... @@ -38,15 +38,27 @@
38 38 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
39 39  
40 40 if (cs_mask & (1 << 0)) {
41   - at91_set_gpio_output(AT91_PIN_PA3, 1);
  41 + at91_set_A_periph(AT91_PIN_PA3, 1);
42 42 }
43 43 if (cs_mask & (1 << 1)) {
44   - at91_set_gpio_output(AT91_PIN_PC11, 1);
  44 + at91_set_B_periph(AT91_PIN_PC11, 1);
45 45 }
46 46 if (cs_mask & (1 << 2)) {
47   - at91_set_gpio_output(AT91_PIN_PC16, 1);
  47 + at91_set_B_periph(AT91_PIN_PC16, 1);
48 48 }
49 49 if (cs_mask & (1 << 3)) {
  50 + at91_set_B_periph(AT91_PIN_PC17, 1);
  51 + }
  52 + if (cs_mask & (1 << 4)) {
  53 + at91_set_gpio_output(AT91_PIN_PA3, 1);
  54 + }
  55 + if (cs_mask & (1 << 5)) {
  56 + at91_set_gpio_output(AT91_PIN_PC11, 1);
  57 + }
  58 + if (cs_mask & (1 << 6)) {
  59 + at91_set_gpio_output(AT91_PIN_PC16, 1);
  60 + }
  61 + if (cs_mask & (1 << 7)) {
50 62 at91_set_gpio_output(AT91_PIN_PC17, 1);
51 63 }
52 64 }
53 65  
54 66  
55 67  
... ... @@ -61,15 +73,27 @@
61 73 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1);
62 74  
63 75 if (cs_mask & (1 << 0)) {
64   - at91_set_gpio_output(AT91_PIN_PB3, 1);
  76 + at91_set_A_periph(AT91_PIN_PB3, 1);
65 77 }
66 78 if (cs_mask & (1 << 1)) {
67   - at91_set_gpio_output(AT91_PIN_PC5, 1);
  79 + at91_set_B_periph(AT91_PIN_PC5, 1);
68 80 }
69 81 if (cs_mask & (1 << 2)) {
70   - at91_set_gpio_output(AT91_PIN_PC4, 1);
  82 + at91_set_B_periph(AT91_PIN_PC4, 1);
71 83 }
72 84 if (cs_mask & (1 << 3)) {
  85 + at91_set_gpio_output(AT91_PIN_PC3, 1);
  86 + }
  87 + if (cs_mask & (1 << 4)) {
  88 + at91_set_gpio_output(AT91_PIN_PB3, 1);
  89 + }
  90 + if (cs_mask & (1 << 5)) {
  91 + at91_set_gpio_output(AT91_PIN_PC5, 1);
  92 + }
  93 + if (cs_mask & (1 << 6)) {
  94 + at91_set_gpio_output(AT91_PIN_PC4, 1);
  95 + }
  96 + if (cs_mask & (1 << 7)) {
73 97 at91_set_gpio_output(AT91_PIN_PC3, 1);
74 98 }
75 99 }
cpu/arm926ejs/at91/at91sam9261_spi.c
Diff comments   View file @ a47492a
... ... @@ -38,15 +38,27 @@
38 38 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
39 39  
40 40 if (cs_mask & (1 << 0)) {
41   - at91_set_gpio_output(AT91_PIN_PA3, 1);
  41 + at91_set_A_periph(AT91_PIN_PA3, 1);
42 42 }
43 43 if (cs_mask & (1 << 1)) {
44   - at91_set_gpio_output(AT91_PIN_PA4, 1);
  44 + at91_set_A_periph(AT91_PIN_PA4, 1);
45 45 }
46 46 if (cs_mask & (1 << 2)) {
47   - at91_set_gpio_output(AT91_PIN_PA5, 1);
  47 + at91_set_A_periph(AT91_PIN_PA5, 1);
48 48 }
49 49 if (cs_mask & (1 << 3)) {
  50 + at91_set_A_periph(AT91_PIN_PA6, 1);
  51 + }
  52 + if (cs_mask & (1 << 4)) {
  53 + at91_set_gpio_output(AT91_PIN_PA3, 1);
  54 + }
  55 + if (cs_mask & (1 << 5)) {
  56 + at91_set_gpio_output(AT91_PIN_PA4, 1);
  57 + }
  58 + if (cs_mask & (1 << 6)) {
  59 + at91_set_gpio_output(AT91_PIN_PA5, 1);
  60 + }
  61 + if (cs_mask & (1 << 7)) {
50 62 at91_set_gpio_output(AT91_PIN_PA6, 1);
51 63 }
52 64 }
53 65  
54 66  
55 67  
... ... @@ -61,15 +73,27 @@
61 73 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1);
62 74  
63 75 if (cs_mask & (1 << 0)) {
64   - at91_set_gpio_output(AT91_PIN_PB28, 1);
  76 + at91_set_A_periph(AT91_PIN_PB28, 1);
65 77 }
66 78 if (cs_mask & (1 << 1)) {
67   - at91_set_gpio_output(AT91_PIN_PA24, 1);
  79 + at91_set_B_periph(AT91_PIN_PA24, 1);
68 80 }
69 81 if (cs_mask & (1 << 2)) {
70   - at91_set_gpio_output(AT91_PIN_PA25, 1);
  82 + at91_set_B_periph(AT91_PIN_PA25, 1);
71 83 }
72 84 if (cs_mask & (1 << 3)) {
  85 + at91_set_A_periph(AT91_PIN_PA26, 1);
  86 + }
  87 + if (cs_mask & (1 << 4)) {
  88 + at91_set_gpio_output(AT91_PIN_PB28, 1);
  89 + }
  90 + if (cs_mask & (1 << 5)) {
  91 + at91_set_gpio_output(AT91_PIN_PA24, 1);
  92 + }
  93 + if (cs_mask & (1 << 6)) {
  94 + at91_set_gpio_output(AT91_PIN_PA25, 1);
  95 + }
  96 + if (cs_mask & (1 << 7)) {
73 97 at91_set_gpio_output(AT91_PIN_PA26, 1);
74 98 }
75 99 }
cpu/arm926ejs/at91/at91sam9263_spi.c
Diff comments   View file @ a47492a
... ... @@ -38,15 +38,27 @@
38 38 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);
39 39  
40 40 if (cs_mask & (1 << 0)) {
41   - at91_set_gpio_output(AT91_PIN_PA5, 1);
  41 + at91_set_B_periph(AT91_PIN_PA5, 1);
42 42 }
43 43 if (cs_mask & (1 << 1)) {
44   - at91_set_gpio_output(AT91_PIN_PA3, 1);
  44 + at91_set_B_periph(AT91_PIN_PA3, 1);
45 45 }
46 46 if (cs_mask & (1 << 2)) {
47   - at91_set_gpio_output(AT91_PIN_PA4, 1);
  47 + at91_set_B_periph(AT91_PIN_PA4, 1);
48 48 }
49 49 if (cs_mask & (1 << 3)) {
  50 + at91_set_B_periph(AT91_PIN_PB11, 1);
  51 + }
  52 + if (cs_mask & (1 << 4)) {
  53 + at91_set_gpio_output(AT91_PIN_PA5, 1);
  54 + }
  55 + if (cs_mask & (1 << 5)) {
  56 + at91_set_gpio_output(AT91_PIN_PA3, 1);
  57 + }
  58 + if (cs_mask & (1 << 6)) {
  59 + at91_set_gpio_output(AT91_PIN_PA4, 1);
  60 + }
  61 + if (cs_mask & (1 << 7)) {
50 62 at91_set_gpio_output(AT91_PIN_PB11, 1);
51 63 }
52 64 }
53 65  
54 66  
55 67  
... ... @@ -61,15 +73,27 @@
61 73 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1);
62 74  
63 75 if (cs_mask & (1 << 0)) {
64   - at91_set_gpio_output(AT91_PIN_PB15, 1);
  76 + at91_set_A_periph(AT91_PIN_PB15, 1);
65 77 }
66 78 if (cs_mask & (1 << 1)) {
67   - at91_set_gpio_output(AT91_PIN_PB16, 1);
  79 + at91_set_A_periph(AT91_PIN_PB16, 1);
68 80 }
69 81 if (cs_mask & (1 << 2)) {
70   - at91_set_gpio_output(AT91_PIN_PB17, 1);
  82 + at91_set_A_periph(AT91_PIN_PB17, 1);
71 83 }
72 84 if (cs_mask & (1 << 3)) {
  85 + at91_set_A_periph(AT91_PIN_PB18, 1);
  86 + }
  87 + if (cs_mask & (1 << 4)) {
  88 + at91_set_gpio_output(AT91_PIN_PB15, 1);
  89 + }
  90 + if (cs_mask & (1 << 5)) {
  91 + at91_set_gpio_output(AT91_PIN_PB16, 1);
  92 + }
  93 + if (cs_mask & (1 << 6)) {
  94 + at91_set_gpio_output(AT91_PIN_PB17, 1);
  95 + }
  96 + if (cs_mask & (1 << 7)) {
73 97 at91_set_gpio_output(AT91_PIN_PB18, 1);
74 98 }
75 99 }
cpu/arm926ejs/at91/at91sam9rl_spi.c
Diff comments   View file @ a47492a
... ... @@ -38,15 +38,27 @@
38 38 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
39 39  
40 40 if (cs_mask & (1 << 0)) {
41   - at91_set_gpio_output(AT91_PIN_PA28, 1);
  41 + at91_set_A_periph(AT91_PIN_PA28, 1);
42 42 }
43 43 if (cs_mask & (1 << 1)) {
44   - at91_set_gpio_output(AT91_PIN_PB7, 1);
  44 + at91_set_B_periph(AT91_PIN_PB7, 1);
45 45 }
46 46 if (cs_mask & (1 << 2)) {
47   - at91_set_gpio_output(AT91_PIN_PD8, 1);
  47 + at91_set_A_periph(AT91_PIN_PD8, 1);
48 48 }
49 49 if (cs_mask & (1 << 3)) {
  50 + at91_set_B_periph(AT91_PIN_PD9, 1);
  51 + }
  52 + if (cs_mask & (1 << 4)) {
  53 + at91_set_gpio_output(AT91_PIN_PA28, 1);
  54 + }
  55 + if (cs_mask & (1 << 5)) {
  56 + at91_set_gpio_output(AT91_PIN_PB7, 1);
  57 + }
  58 + if (cs_mask & (1 << 6)) {
  59 + at91_set_gpio_output(AT91_PIN_PD8, 1);
  60 + }
  61 + if (cs_mask & (1 << 7)) {
50 62 at91_set_gpio_output(AT91_PIN_PD9, 1);
51 63 }
52 64 }