Eric Lee / smarc-uboot

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Commit a500a3311529ca79cfd51f1e223e77a94c78fbf1

Authored by Breno Lima
Committed by Stefano Babic
1 parent ff3a5fc46d
Exists in smarc_8mq_lf_v2020.04 and in 17 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

mx6sabresd: Fix IOMUXC_GPR6 and IOMUXC_GPR7 values 

The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as
commented in the code:
/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */

Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F.

Signed-off-by: Breno Lima <breno.lima@nxp.com>

Showing 1 changed file with 2 additions and 2 deletions Side-by-side Diff

board/freescale/mx6sabresd/mx6sabresd.c
Diff comments   View file @ a500a33
... ... @@ -755,8 +755,8 @@
755 755 writel(0xF00000CF, &iomux->gpr[4]);
756 756 if (is_mx6dqp()) {
757 757 /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
758   - writel(0x007F007F, &iomux->gpr[6]);
759   - writel(0x007F007F, &iomux->gpr[7]);
  758 + writel(0x77177717, &iomux->gpr[6]);
  759 + writel(0x77177717, &iomux->gpr[7]);
760 760 } else {
761 761 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
762 762 writel(0x007F007F, &iomux->gpr[6]);