Commit a51c832cc18aeec439648f39f6759a1978206132

Authored by Hans de Goede
1 parent 9ecce9707b

sunxi: ga10h: Enable both otg and regular usb host controllers

This allows using devices plugged into both ports of the tablet.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

Showing 3 changed files with 28 additions and 0 deletions Side-by-side Diff

arch/arm/dts/sun8i-a23-a33.dtsi
... ... @@ -332,6 +332,24 @@
332 332 #size-cells = <0>;
333 333 };
334 334  
  335 + ehci0: usb@01c1a000 {
  336 + compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
  337 + reg = <0x01c1a000 0x100>;
  338 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
  339 + clocks = <&ahb1_gates 26>;
  340 + resets = <&ahb1_rst 26>;
  341 + status = "disabled";
  342 + };
  343 +
  344 + ohci0: usb@01c1a400 {
  345 + compatible = "allwinner,sun8i-a23-ohci", "generic-ohci";
  346 + reg = <0x01c1a400 0x100>;
  347 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
  348 + clocks = <&ahb1_gates 29>, <&usb_clk 16>;
  349 + resets = <&ahb1_rst 29>;
  350 + status = "disabled";
  351 + };
  352 +
335 353 pio: pinctrl@01c20800 {
336 354 /* compatible gets set in SoC specific dtsi file */
337 355 reg = <0x01c20800 0x400>;
arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
... ... @@ -61,6 +61,10 @@
61 61 };
62 62 };
63 63  
  64 +&ehci0 {
  65 + status = "okay";
  66 +};
  67 +
64 68 &i2c0 {
65 69 pinctrl-names = "default";
66 70 pinctrl-0 = <&i2c0_pins_a>;
... ... @@ -106,6 +110,10 @@
106 110 bus-width = <4>;
107 111 cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
108 112 cd-inverted;
  113 + status = "okay";
  114 +};
  115 +
  116 +&ohci0 {
109 117 status = "okay";
110 118 };
111 119  
configs/ga10h_v1_1_defconfig
... ... @@ -6,6 +6,7 @@
6 6 CONFIG_DRAM_ODT_EN=y
7 7 CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
8 8 CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
  9 +CONFIG_USB0_ID_DET="PH8"
9 10 CONFIG_AXP_GPIO=y
10 11 CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:52000,le:138,ri:162,up:22,lo:10,hs:20,vs:3,sync:3,vmode:0"
11 12 CONFIG_VIDEO_LCD_DCLK_PHASE=0
... ... @@ -23,4 +24,5 @@
23 24 # CONFIG_CMD_FPGA is not set
24 25 CONFIG_AXP221_DLDO1_VOLT=3300
25 26 CONFIG_AXP221_ALDO1_VOLT=3000
  27 +CONFIG_USB_EHCI_HCD=y