sf: spi_flash cleanups

More cleanups on spi_flash side: - Removed unneeded comments. - Rearranged macros in proper location. - Rearranged func declerations - Renamed few function names. - Added License headers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

sf: spi_flash cleanups
More cleanups on spi_flash side: - Removed unneeded comments. - Rearranged macros in proper location. - Rearranged func declerations - Renamed few function names. - Added License headers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Jagannadha Sutradharudu Teki
1 parent 30b0ca6318
Showing 5 changed files with 85 additions and 74 deletions Side-by-side Diff
drivers/mtd/spi/Makefile
drivers/mtd/spi/spi_flash_internal.h
drivers/mtd/spi/spi_flash_ops.c
drivers/mtd/spi/spi_flash_probe.c
include/spi_flash.h
@@ -17,8 +17,8 @@
 ifdef CONFIG_CMD_SF
 COBJS-y        += spi_flash.o
 endif
-COBJS-$(CONFIG_SPI_FLASH)	+= spi_flash_probe.o spi_flash_ops.o
-COBJS-$(CONFIG_SPI_FRAM_RAMTRON)	+= ramtron.o
+COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
+COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
 COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
  
 COBJS	:= $(COBJS-y)
@@ -2,37 +2,43 @@
  * SPI flash internal definitions
  *
  * Copyright (C) 2008 Atmel Corporation
+ * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
+ *
+ * Licensed under the GPL-2 or later.
  */
  
-/* Common parameters -- kind of high, but they should only occur when there
- * is a problem (and well your system already is broken), so err on the side
- * of caution in case we're dealing with slower SPI buses and/or processors.
- */
-#define SPI_FLASH_PROG_TIMEOUT		(2 * CONFIG_SYS_HZ)
-#define SPI_FLASH_PAGE_ERASE_TIMEOUT	(5 * CONFIG_SYS_HZ)
-#define SPI_FLASH_SECTOR_ERASE_TIMEOUT	(10 * CONFIG_SYS_HZ)
+#ifndef _SPI_FLASH_INTERNAL_H_
+#define _SPI_FLASH_INTERNAL_H_
  
-/* Common commands */
-#define CMD_READ_ID			0x9f
+#define SPI_FLASH_16MB_BOUN		0x1000000
  
-#define CMD_READ_ARRAY_SLOW		0x03
-#define CMD_READ_ARRAY_FAST		0x0b
+/* SECT flags */
+#define SECT_4K			(1 << 1)
+#define SECT_32K			(1 << 2)
+#define E_FSR				(1 << 3)
  
+/* Erase commands */
+#define CMD_ERASE_4K			0x20
+#define CMD_ERASE_32K			0x52
+#define CMD_ERASE_CHIP			0xc7
+#define CMD_ERASE_64K			0xd8
+
+/* Write commands */
 #define CMD_WRITE_STATUS		0x01
 #define CMD_PAGE_PROGRAM		0x02
 #define CMD_WRITE_DISABLE		0x04
 #define CMD_READ_STATUS			0x05
-#define CMD_FLAG_STATUS			0x70
 #define CMD_WRITE_ENABLE		0x06
-#define CMD_ERASE_4K			0x20
-#define CMD_ERASE_32K			0x52
-#define CMD_ERASE_64K			0xd8
-#define CMD_ERASE_CHIP			0xc7
+#define CMD_READ_CONFIG		0x35
+#define CMD_FLAG_STATUS		0x70
  
-#define SPI_FLASH_16MB_BOUN		0x1000000
+/* Read commands */
+#define CMD_READ_ARRAY_SLOW		0x03
+#define CMD_READ_ARRAY_FAST		0x0b
+#define CMD_READ_ID			0x9f
  
-#ifdef CONFIG_SPI_FLASH_BAR
 /* Bank addr access commands */
+#ifdef CONFIG_SPI_FLASH_BAR
 # define CMD_BANKADDR_BRWR		0x17
 # define CMD_BANKADDR_BRRD		0x16
 # define CMD_EXTNADDR_WREAR		0xC5
@@ -43,6 +49,21 @@
 #define STATUS_WIP			0x01
 #define STATUS_PEC			0x80
  
+/* Flash timeout values */
+#define SPI_FLASH_PROG_TIMEOUT		(2 * CONFIG_SYS_HZ)
+#define SPI_FLASH_PAGE_ERASE_TIMEOUT	(5 * CONFIG_SYS_HZ)
+#define SPI_FLASH_SECTOR_ERASE_TIMEOUT	(10 * CONFIG_SYS_HZ)
+
+/* SST specific */
+#ifdef CONFIG_SPI_FLASH_SST
+# define SST_WP			0x01	/* Supports AAI word program */
+# define CMD_SST_BP			0x02    /* Byte Program */
+# define CMD_SST_AAI_WP		0xAD	/* Auto Address Incr Word Program */
+
+int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
+		const void *buf);
+#endif
+
 /* Send a single-byte command to the device and read the response */
 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
  
@@ -53,9 +74,6 @@
 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
 		size_t cmd_len, void *data, size_t data_len);
  
-int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
-		size_t len, void *data);
-
 /*
  * Send a multi-byte command to the device followed by (optional)
  * data. Used for programming the flash array, etc.
  
  
  
  
  
  
@@ -63,43 +81,34 @@
 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
 		const void *data, size_t data_len);
  
-/*
- * Write the requested data out breaking it up into multiple write
- * commands as needed per the write size.
- */
-int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
-		size_t len, const void *buf);
  
-#ifdef CONFIG_SPI_FLASH_SST
-int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
-		const void *buf);
-#endif
+/* Flash erase(sectors) operation, support all possible erase commands */
+int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
  
-/*
- * Enable writing on the SPI flash.
- */
+/* Program the status register */
+int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
+
+/* Set quad enbale bit */
+int spi_flash_set_qeb(struct spi_flash *flash);
+
+/* Enable writing on the SPI flash */
 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
 {
 	return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
 }
  
-/*
- * Disable writing on the SPI flash.
- */
+/* Disable writing on the SPI flash */
 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
 {
 	return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
 }
  
-/* Program the status register. */
-int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
-
 /*
- * Same as spi_flash_cmd_read() except it also claims/releases the SPI
- * bus. Used as common part of the ->read() operation.
+ * Send the read status command to the device and wait for the wip
+ * (write-in-progress) bit to clear itself.
  */
-int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
-		size_t cmd_len, void *data, size_t data_len);
+int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
+
 /*
  * Used for spi_flash write operation
  * - SPI claim
  
  
@@ -112,11 +121,23 @@
 		size_t cmd_len, const void *buf, size_t buf_len);
  
 /*
- * Send the read status command to the device and wait for the wip
- * (write-in-progress) bit to clear itself.
+ * Flash write operation, support all possible write commands.
+ * Write the requested data out breaking it up into multiple write
+ * commands as needed per the write size.
  */
-int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
+int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
+		size_t len, const void *buf);
  
-/* Erase sectors. */
-int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len);
+/*
+ * Same as spi_flash_cmd_read() except it also claims/releases the SPI
+ * bus. Used as common part of the ->read() operation.
+ */
+int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
+		size_t cmd_len, void *data, size_t data_len);
+
+/* Flash read operation, support all possible read commands */
+int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
+		size_t len, void *data);
+
+#endif /* _SPI_FLASH_INTERNAL_H_ */
@@ -147,7 +147,7 @@
 	return ret;
 }
  
-int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
+int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 {
 	u32 erase_size;
 	u8 cmd[4];
@@ -190,7 +190,7 @@
 	return ret;
 }
  
-int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
+int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 		size_t len, const void *buf)
 {
 	unsigned long byte_addr, page_size;
@@ -260,7 +260,7 @@
 	return ret;
 }
  
-int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
+int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 		size_t len, void *data)
 {
 	u8 cmd[5], bank_sel = 0;
@@ -18,7 +18,7 @@
  
 DECLARE_GLOBAL_DATA_PTR;
  
-/*
+/**
  * struct spi_flash_params - SPI/QSPI flash device params structure
  *
  * @name:		Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
@@ -151,7 +151,7 @@
 	 */
 };
  
-struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
+struct spi_flash *spi_flash_validate_params(struct spi_slave *spi, u8 *idcode)
 {
 	const struct spi_flash_params *params;
 	struct spi_flash *flash;
  
@@ -190,13 +190,13 @@
 	flash->name = params->name;
  
 	/* Assign spi_flash ops */
-	flash->write = spi_flash_cmd_write_multi;
+	flash->write = spi_flash_cmd_write_ops;
 #ifdef CONFIG_SPI_FLASH_SST
 	if (params->flags & SST_WP)
 		flash->write = sst_write_wp;
 #endif
-	flash->erase = spi_flash_cmd_erase;
-	flash->read = spi_flash_cmd_read_fast;
+	flash->erase = spi_flash_cmd_erase_ops;
+	flash->read = spi_flash_cmd_read_ops;
  
 	/* Compute the flash size */
 	flash->page_size = (ext_jedec == 0x4d00) ? 512 : 256;
@@ -314,8 +314,8 @@
 	print_buffer(0, idcode, 1, sizeof(idcode), 0);
 #endif
  
-	/* Validate ID's from flash dev table */
-	flash = spi_flash_validate_ids(spi, idcode);
+	/* Validate params from spi_flash_params table */
+	flash = spi_flash_validate_params(spi, idcode);
 	if (!flash)
 		goto err_read_id;
  
 /*
- * Interface to SPI flash
+ * Common SPI flash Interface
  *
  * Copyright (C) 2008 Atmel Corporation
+ * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
  
@@ -10,24 +11,13 @@
  * modify it under the terms of the GNU General Public License
  * version 2 as published by the Free Software Foundation. 
  */
+
 #ifndef _SPI_FLASH_H_
 #define _SPI_FLASH_H_
  
 #include <spi.h>
 #include <linux/types.h>
 #include <linux/compiler.h>
-
-/* SECT flags */
-#define SECT_4K		(1 << 1)
-#define SECT_32K		(1 << 2)
-#define E_FSR			(1 << 3)
-
-/* SST specific macros */
-#ifdef CONFIG_SPI_FLASH_SST
-# define SST_WP			0x01	/* Supports AAI word program */
-# define CMD_SST_BP			0x02    /* Byte Program */
-# define CMD_SST_AAI_WP		0xAD	/* Auto Address Incr Word Program */
-#endif
  
 /**
  * struct spi_flash - SPI flash structure
...	...	@@ -17,8 +17,8 @@
17	17	ifdef CONFIG_CMD_SF
18	18	COBJS-y += spi_flash.o
19	19	endif
20		-COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
21		-COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
	20	+COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
	21	+COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
22	22	COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
23	23
24	24	COBJS := $(COBJS-y)
...	...	@@ -2,37 +2,43 @@
2	2	* SPI flash internal definitions
3	3	*
4	4	* Copyright (C) 2008 Atmel Corporation
	5	+ * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
	6	+ *
	7	+ * Licensed under the GPL-2 or later.
5	8	*/
6	9
7		-/* Common parameters -- kind of high, but they should only occur when there
8		- * is a problem (and well your system already is broken), so err on the side
9		- * of caution in case we're dealing with slower SPI buses and/or processors.
10		- */
11		-#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
12		-#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
13		-#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
	10	+#ifndef _SPI_FLASH_INTERNAL_H_
	11	+#define _SPI_FLASH_INTERNAL_H_
14	12
15		-/* Common commands */
16		-#define CMD_READ_ID 0x9f
	13	+#define SPI_FLASH_16MB_BOUN 0x1000000
17	14
18		-#define CMD_READ_ARRAY_SLOW 0x03
19		-#define CMD_READ_ARRAY_FAST 0x0b
	15	+/* SECT flags */
	16	+#define SECT_4K (1 << 1)
	17	+#define SECT_32K (1 << 2)
	18	+#define E_FSR (1 << 3)
20	19
	20	+/* Erase commands */
	21	+#define CMD_ERASE_4K 0x20
	22	+#define CMD_ERASE_32K 0x52
	23	+#define CMD_ERASE_CHIP 0xc7
	24	+#define CMD_ERASE_64K 0xd8
	25	+
	26	+/* Write commands */
21	27	#define CMD_WRITE_STATUS 0x01
22	28	#define CMD_PAGE_PROGRAM 0x02
23	29	#define CMD_WRITE_DISABLE 0x04
24	30	#define CMD_READ_STATUS 0x05
25		-#define CMD_FLAG_STATUS 0x70
26	31	#define CMD_WRITE_ENABLE 0x06
27		-#define CMD_ERASE_4K 0x20
28		-#define CMD_ERASE_32K 0x52
29		-#define CMD_ERASE_64K 0xd8
30		-#define CMD_ERASE_CHIP 0xc7
	32	+#define CMD_READ_CONFIG 0x35
	33	+#define CMD_FLAG_STATUS 0x70
31	34
32		-#define SPI_FLASH_16MB_BOUN 0x1000000
	35	+/* Read commands */
	36	+#define CMD_READ_ARRAY_SLOW 0x03
	37	+#define CMD_READ_ARRAY_FAST 0x0b
	38	+#define CMD_READ_ID 0x9f
33	39
34		-#ifdef CONFIG_SPI_FLASH_BAR
35	40	/* Bank addr access commands */
	41	+#ifdef CONFIG_SPI_FLASH_BAR
36	42	# define CMD_BANKADDR_BRWR 0x17
37	43	# define CMD_BANKADDR_BRRD 0x16
38	44	# define CMD_EXTNADDR_WREAR 0xC5
...	...	@@ -43,6 +49,21 @@
43	49	#define STATUS_WIP 0x01
44	50	#define STATUS_PEC 0x80
45	51
	52	+/* Flash timeout values */
	53	+#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
	54	+#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
	55	+#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
	56	+
	57	+/* SST specific */
	58	+#ifdef CONFIG_SPI_FLASH_SST
	59	+# define SST_WP 0x01 /* Supports AAI word program */
	60	+# define CMD_SST_BP 0x02 /* Byte Program */
	61	+# define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
	62	+
	63	+int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
	64	+ const void *buf);
	65	+#endif
	66	+
46	67	/* Send a single-byte command to the device and read the response */
47	68	int spi_flash_cmd(struct spi_slave spi, u8 cmd, void response, size_t len);
48	69
...	...	@@ -53,9 +74,6 @@
53	74	int spi_flash_cmd_read(struct spi_slave spi, const u8 cmd,
54	75	size_t cmd_len, void *data, size_t data_len);
55	76
56		-int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
57		- size_t len, void *data);
58		-
59	77	/*
60	78	* Send a multi-byte command to the device followed by (optional)
61	79	* data. Used for programming the flash array, etc.
62	80
63	81
64	82
65	83
66	84
67	85
...	...	@@ -63,43 +81,34 @@
63	81	int spi_flash_cmd_write(struct spi_slave spi, const u8 cmd, size_t cmd_len,
64	82	const void *data, size_t data_len);
65	83
66		-/*
67		- * Write the requested data out breaking it up into multiple write
68		- * commands as needed per the write size.
69		- */
70		-int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
71		- size_t len, const void *buf);
72	84
73		-#ifdef CONFIG_SPI_FLASH_SST
74		-int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
75		- const void *buf);
76		-#endif
	85	+/* Flash erase(sectors) operation, support all possible erase commands */
	86	+int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
77	87
78		-/*
79		- * Enable writing on the SPI flash.
80		- */
	88	+/* Program the status register */
	89	+int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
	90	+
	91	+/* Set quad enbale bit */
	92	+int spi_flash_set_qeb(struct spi_flash *flash);
	93	+
	94	+/* Enable writing on the SPI flash */
81	95	static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
82	96	{
83	97	return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
84	98	}
85	99
86		-/*
87		- * Disable writing on the SPI flash.
88		- */
	100	+/* Disable writing on the SPI flash */
89	101	static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
90	102	{
91	103	return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
92	104	}
93	105
94		-/* Program the status register. */
95		-int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
96		-
97	106	/*
98		- * Same as spi_flash_cmd_read() except it also claims/releases the SPI
99		- * bus. Used as common part of the ->read() operation.
	107	+ * Send the read status command to the device and wait for the wip
	108	+ * (write-in-progress) bit to clear itself.
100	109	*/
101		-int spi_flash_read_common(struct spi_flash flash, const u8 cmd,
102		- size_t cmd_len, void *data, size_t data_len);
	110	+int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
	111	+
103	112	/*
104	113	* Used for spi_flash write operation
105	114	* - SPI claim
106	115
107	116
...	...	@@ -112,11 +121,23 @@
112	121	size_t cmd_len, const void *buf, size_t buf_len);
113	122
114	123	/*
115		- * Send the read status command to the device and wait for the wip
116		- * (write-in-progress) bit to clear itself.
	124	+ * Flash write operation, support all possible write commands.
	125	+ * Write the requested data out breaking it up into multiple write
	126	+ * commands as needed per the write size.
117	127	*/
118		-int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
	128	+int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
	129	+ size_t len, const void *buf);
119	130
120		-/* Erase sectors. */
121		-int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len);
	131	+/*
	132	+ * Same as spi_flash_cmd_read() except it also claims/releases the SPI
	133	+ * bus. Used as common part of the ->read() operation.
	134	+ */
	135	+int spi_flash_read_common(struct spi_flash flash, const u8 cmd,
	136	+ size_t cmd_len, void *data, size_t data_len);
	137	+
	138	+/* Flash read operation, support all possible read commands */
	139	+int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
	140	+ size_t len, void *data);
	141	+
	142	+#endif /* _SPI_FLASH_INTERNAL_H_ */
...	...	@@ -147,7 +147,7 @@
147	147	return ret;
148	148	}
149	149
150		-int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
	150	+int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
151	151	{
152	152	u32 erase_size;
153	153	u8 cmd[4];
...	...	@@ -190,7 +190,7 @@
190	190	return ret;
191	191	}
192	192
193		-int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
	193	+int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
194	194	size_t len, const void *buf)
195	195	{
196	196	unsigned long byte_addr, page_size;
...	...	@@ -260,7 +260,7 @@
260	260	return ret;
261	261	}
262	262
263		-int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
	263	+int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
264	264	size_t len, void *data)
265	265	{
266	266	u8 cmd[5], bank_sel = 0;
...	...	@@ -18,7 +18,7 @@
18	18
19	19	DECLARE_GLOBAL_DATA_PTR;
20	20
21		-/*
	21	+/**
22	22	* struct spi_flash_params - SPI/QSPI flash device params structure
23	23	*
24	24	* @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
...	...	@@ -151,7 +151,7 @@
151	151	*/
152	152	};
153	153
154		-struct spi_flash spi_flash_validate_ids(struct spi_slave spi, u8 *idcode)
	154	+struct spi_flash spi_flash_validate_params(struct spi_slave spi, u8 *idcode)
155	155	{
156	156	const struct spi_flash_params *params;
157	157	struct spi_flash *flash;
158	158
...	...	@@ -190,13 +190,13 @@
190	190	flash->name = params->name;
191	191
192	192	/* Assign spi_flash ops */
193		- flash->write = spi_flash_cmd_write_multi;
	193	+ flash->write = spi_flash_cmd_write_ops;
194	194	#ifdef CONFIG_SPI_FLASH_SST
195	195	if (params->flags & SST_WP)
196	196	flash->write = sst_write_wp;
197	197	#endif
198		- flash->erase = spi_flash_cmd_erase;
199		- flash->read = spi_flash_cmd_read_fast;
	198	+ flash->erase = spi_flash_cmd_erase_ops;
	199	+ flash->read = spi_flash_cmd_read_ops;
200	200
201	201	/* Compute the flash size */
202	202	flash->page_size = (ext_jedec == 0x4d00) ? 512 : 256;
...	...	@@ -314,8 +314,8 @@
314	314	print_buffer(0, idcode, 1, sizeof(idcode), 0);
315	315	#endif
316	316
317		- /* Validate ID's from flash dev table */
318		- flash = spi_flash_validate_ids(spi, idcode);
	317	+ /* Validate params from spi_flash_params table */
	318	+ flash = spi_flash_validate_params(spi, idcode);
319	319	if (!flash)
320	320	goto err_read_id;
321	321
1	1	/*
2		- * Interface to SPI flash
	2	+ * Common SPI flash Interface
3	3	*
4	4	* Copyright (C) 2008 Atmel Corporation
	5	+ * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
5	6	*
6	7	* See file CREDITS for list of people who contributed to this
7	8	* project.
8	9
...	...	@@ -10,24 +11,13 @@
10	11	* modify it under the terms of the GNU General Public License
11	12	* version 2 as published by the Free Software Foundation.
12	13	*/
	14	+
13	15	#ifndef _SPI_FLASH_H_
14	16	#define _SPI_FLASH_H_
15	17
16	18	#include <spi.h>
17	19	#include <linux/types.h>
18	20	#include <linux/compiler.h>
19		-
20		-/* SECT flags */
21		-#define SECT_4K (1 << 1)
22		-#define SECT_32K (1 << 2)
23		-#define E_FSR (1 << 3)
24		-
25		-/* SST specific macros */
26		-#ifdef CONFIG_SPI_FLASH_SST
27		-# define SST_WP 0x01 /* Supports AAI word program */
28		-# define CMD_SST_BP 0x02 /* Byte Program */
29		-# define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
30		-#endif
31	21
32	22	/**
33	23	* struct spi_flash - SPI flash structure