ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK

The DDR DRAM calibration doesn't work on T-topology sometimes, so disable it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>

ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK
The DDR DRAM calibration doesn't work on T-topology sometimes, so disable it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut · Stefano Babic · Eric Lee · Eric Lee · Eric Lee · Eric Lee
1 parent b6d86ce89f
Showing 1 changed file with 0 additions and 4 deletions Side-by-side Diff
board/dhelectronics/dh_imx6/dh_imx6_spl.c
@@ -387,10 +387,6 @@
 				  &dhcom6sdl_grp_ioregs);
 	mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr);
  
-	/* Perform DDR DRAM calibration */
-	udelay(100);
-	mmdc_do_dqs_calibration(&dhcom_ddr_info);
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
...	...	@@ -387,10 +387,6 @@
387	387	&dhcom6sdl_grp_ioregs);
388	388	mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr);
389	389
390		- /* Perform DDR DRAM calibration */
391		- udelay(100);
392		- mmdc_do_dqs_calibration(&dhcom_ddr_info);
393		-
394	390	/* Clear the BSS. */
395	391	memset(__bss_start, 0, __bss_end - __bss_start);
396	392