Eric Lee / smarc-uboot

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Commit a646f6698173ef4ff34c414f91541b4b8f014de1

Authored by Yuan Yao
Committed by York Sun
1 parent 01de830402
Exists in v2017.01-smarct4x and in 25 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2017.01-smarct3x, v2017.01-smarct3x-emmc

armv8: ls2080aqds: Enable QSPI boot support 

This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

Showing 5 changed files with 55 additions and 0 deletions Side-by-side Diff

arch/arm/include/asm/arch-fsl-layerscape/cpu.h
Diff comments   View file @ a646f66
... ... @@ -122,6 +122,8 @@
122 122 PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN },
123 123 { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE,
124 124 CONFIG_SYS_FSL_OCRAM_SIZE, MT_NORMAL, PTE_BLOCK_NON_SHARE },
  125 + { CONFIG_SYS_FSL_QSPI_BASE1, CONFIG_SYS_FSL_QSPI_BASE1,
  126 + CONFIG_SYS_FSL_QSPI_SIZE1, MT_NORMAL, PTE_BLOCK_NON_SHARE},
125 127 /* For IFC Region #1, only the first 4MB is cache-enabled */
126 128 { CONFIG_SYS_FSL_IFC_BASE1, CONFIG_SYS_FSL_IFC_BASE1,
127 129 CONFIG_SYS_FSL_IFC_SIZE1_1, MT_NORMAL, PTE_BLOCK_NON_SHARE },
... ... @@ -176,6 +178,8 @@
176 178 { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
177 179 CONFIG_SYS_FSL_DRAM_SIZE1, MT_NORMAL,
178 180 PTE_BLOCK_OUTER_SHARE | PTE_BLOCK_NS },
  181 + { CONFIG_SYS_FSL_QSPI_BASE1, CONFIG_SYS_FSL_QSPI_BASE1,
  182 + CONFIG_SYS_FSL_QSPI_SIZE1, MT_NORMAL, PTE_BLOCK_NON_SHARE},
179 183 { CONFIG_SYS_FSL_QSPI_BASE2, CONFIG_SYS_FSL_QSPI_BASE2,
180 184 CONFIG_SYS_FSL_QSPI_SIZE2, MT_DEVICE_NGNRNE,
181 185 PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN },
board/freescale/ls2080aqds/ls2080aqds.c
Diff comments   View file @ a646f66
... ... @@ -81,6 +81,8 @@
81 81 puts("PromJet\n");
82 82 else if (sw == 0x9)
83 83 puts("NAND\n");
  84 + else if (sw == 0xf)
  85 + puts("QSPI\n");
84 86 else if (sw == 0x15)
85 87 printf("IFCCard\n");
86 88 else
configs/ls2080aqds_qspi_defconfig
Diff comments   View file @ a646f66
  1 +CONFIG_ARM=y
  2 +CONFIG_TARGET_LS2080AQDS=y
  3 +CONFIG_FIT=y
  4 +CONFIG_FIT_VERBOSE=y
  5 +CONFIG_OF_BOARD_SETUP=y
  6 +CONFIG_OF_STDOUT_VIA_ALIAS=y
  7 +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT,LS2080A"
  8 +CONFIG_BOOTDELAY=10
  9 +CONFIG_HUSH_PARSER=y
  10 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
  11 +CONFIG_OF_CONTROL=y
  12 +CONFIG_OF_EMBED=y
  13 +CONFIG_DM=y
  14 +CONFIG_DM_SPI_FLASH=y
  15 +CONFIG_DM_SPI=y
  16 +CONFIG_FSL_QSPI=y
  17 +CONFIG_CMD_GREPENV=y
  18 +CONFIG_CMD_MMC=y
  19 +CONFIG_CMD_I2C=y
  20 +CONFIG_CMD_USB=y
  21 +# CONFIG_CMD_SETEXPR is not set
  22 +CONFIG_CMD_DHCP=y
  23 +CONFIG_CMD_MII=y
  24 +CONFIG_CMD_PING=y
  25 +CONFIG_CMD_CACHE=y
  26 +CONFIG_CMD_EXT2=y
  27 +CONFIG_CMD_FAT=y
  28 +CONFIG_CMD_SF=y
  29 +CONFIG_NET_RANDOM_ETHADDR=y
  30 +CONFIG_NETDEVICES=y
  31 +CONFIG_E1000=y
  32 +CONFIG_SYS_NS16550=y
  33 +CONFIG_USB=y
  34 +CONFIG_USB_XHCI_HCD=y
  35 +CONFIG_USB_XHCI_DWC3=y
  36 +CONFIG_OF_LIBFDT=y
  37 +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
include/configs/ls2080a_common.h
Diff comments   View file @ a646f66
... ... @@ -29,10 +29,12 @@
29 29 #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
30 30  
31 31 /* Link Definitions */
  32 +#ifndef CONFIG_QSPI_BOOT
32 33 #ifdef CONFIG_SPL
33 34 #define CONFIG_SYS_TEXT_BASE 0x80400000
34 35 #else
35 36 #define CONFIG_SYS_TEXT_BASE 0x30100000
  37 +#endif
36 38 #endif
37 39  
38 40 #ifdef CONFIG_EMU
include/configs/ls2080aqds.h
Diff comments   View file @ a646f66
... ... @@ -172,11 +172,13 @@
172 172 #define QIXIS_LBMAP_DFLTBANK 0x00
173 173 #define QIXIS_LBMAP_ALTBANK 0x04
174 174 #define QIXIS_LBMAP_NAND 0x09
  175 +#define QIXIS_LBMAP_QSPI 0x0f
175 176 #define QIXIS_RST_CTL_RESET 0x31
176 177 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
177 178 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21
178 179 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
179 180 #define QIXIS_RCW_SRC_NAND 0x107
  181 +#define QIXIS_RCW_SRC_QSPI 0x62
180 182 #define QIXIS_RST_FORCE_MEM 0x01
181 183  
182 184 #define CONFIG_SYS_CSPR3_EXT (0x0)
183 185  
... ... @@ -267,10 +269,18 @@
267 269 #define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2
268 270 #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
269 271  
  272 +#if defined(CONFIG_QSPI_BOOT)
  273 +#define CONFIG_SYS_TEXT_BASE 0x20010000
  274 +#define CONFIG_ENV_IS_IN_SPI_FLASH
  275 +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
  276 +#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
  277 +#define CONFIG_ENV_SECT_SIZE 0x10000
  278 +#else
270 279 #define CONFIG_ENV_IS_IN_FLASH
271 280 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)
272 281 #define CONFIG_ENV_SECT_SIZE 0x20000
273 282 #define CONFIG_ENV_SIZE 0x2000
  283 +#endif
274 284 #endif
275 285  
276 286 /* Debug Server firmware */