Eric Lee / smarc-uboot

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Commit a699bafb441fc8b3aeff895f60b8531923f66733

Authored by Ye Li
1 parent 7aff90e696
Exists in smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga and in 5 other branches smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga

MLK-18476-1 DTS: mx6qdl_arm2: Add board DTS files for MX6Q/DL and MX6Q POP ARM2 

Add DTS files to support iMX6Q/DL DDR3/LPDDR2 ARM2 and iMX6Q POP LPDDR2 ARM2 boards.

Signed-off-by: Ye Li <ye.li@nxp.com>

Showing 4 changed files with 960 additions and 0 deletions Side-by-side Diff

arch/arm/dts/Makefile
Diff comments   View file @ a699baf
... ... @@ -404,6 +404,7 @@
404 404 imx6sll-lpddr2-arm2.dtb \
405 405 imx6sll-lpddr3-arm2.dtb \
406 406 imx6sll-lpddr3-arm2-ecspi.dtb \
  407 + imx6dl-arm2.dtb \
407 408 imx6dl-icore.dtb \
408 409 imx6dl-icore-mipi.dtb \
409 410 imx6dl-icore-rqs.dtb \
... ... @@ -411,6 +412,8 @@
411 412 imx6dl-sabreauto-ecspi.dtb \
412 413 imx6dl-sabreauto-gpmi-weim.dtb \
413 414 imx6dl-sabresd.dtb \
  415 + imx6q-arm2.dtb \
  416 + imx6q-pop-arm2.dtb \
414 417 imx6q-cm-fx6.dtb \
415 418 imx6q-icore.dtb \
416 419 imx6q-icore-mipi.dtb \
arch/arm/dts/imx6dl-arm2.dts
Diff comments   View file @ a699baf
  1 +/*
  2 + * Copyright 2011 Freescale Semiconductor, Inc.
  3 + * Copyright 2011 Linaro Ltd.
  4 + *
  5 + * The code contained herein is licensed under the GNU General Public
  6 + * License. You may obtain a copy of the GNU General Public License
  7 + * Version 2 or later at the following locations:
  8 + *
  9 + * http://www.opensource.org/licenses/gpl-license.html
  10 + * http://www.gnu.org/copyleft/gpl.html
  11 + */
  12 +
  13 +/dts-v1/;
  14 +#include <dt-bindings/gpio/gpio.h>
  15 +#include "imx6dl.dtsi"
  16 +
  17 +/ {
  18 + model = "Freescale i.MX6 DualLite Armadillo2 Board";
  19 + compatible = "fsl,imx6q-arm2", "fsl,imx6q";
  20 +
  21 + memory {
  22 + reg = <0x10000000 0x80000000>;
  23 + };
  24 +
  25 + regulators {
  26 + compatible = "simple-bus";
  27 + #address-cells = <1>;
  28 + #size-cells = <0>;
  29 +
  30 + reg_3p3v: regulator@0 {
  31 + compatible = "regulator-fixed";
  32 + reg = <0>;
  33 + regulator-name = "3P3V";
  34 + regulator-min-microvolt = <3300000>;
  35 + regulator-max-microvolt = <3300000>;
  36 + regulator-always-on;
  37 + };
  38 +
  39 + reg_usb_otg_vbus: regulator@1 {
  40 + compatible = "regulator-fixed";
  41 + reg = <1>;
  42 + regulator-name = "usb_otg_vbus";
  43 + regulator-min-microvolt = <5000000>;
  44 + regulator-max-microvolt = <5000000>;
  45 + gpio = <&gpio3 22 0>;
  46 + enable-active-high;
  47 + };
  48 + };
  49 +
  50 + leds {
  51 + compatible = "gpio-leds";
  52 +
  53 + debug-led {
  54 + label = "Heartbeat";
  55 + gpios = <&gpio3 25 0>;
  56 + linux,default-trigger = "heartbeat";
  57 + };
  58 + };
  59 +};
  60 +
  61 +&gpmi {
  62 + pinctrl-names = "default";
  63 + pinctrl-0 = <&pinctrl_gpmi_nand>;
  64 + status = "disabled"; /* gpmi nand conflicts with SD */
  65 + nand-on-flash-bbt;
  66 +};
  67 +
  68 +&iomuxc {
  69 + pinctrl-names = "default";
  70 + pinctrl-0 = <&pinctrl_hog>;
  71 +
  72 + imx6q-arm2 {
  73 + pinctrl_hog: hoggrp {
  74 + fsl,pins = <
  75 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
  76 + >;
  77 + };
  78 +
  79 + pinctrl_enet: enetgrp {
  80 + fsl,pins = <
  81 + MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
  82 + MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
  83 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  84 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  85 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  86 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  87 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  88 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  89 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  90 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  91 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  92 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  93 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  94 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  95 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  96 + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
  97 + >;
  98 + };
  99 +
  100 + pinctrl_gpmi_nand: gpminandgrp {
  101 + fsl,pins = <
  102 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
  103 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
  104 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
  105 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
  106 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
  107 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
  108 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
  109 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
  110 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
  111 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
  112 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
  113 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
  114 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
  115 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
  116 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
  117 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
  118 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
  119 + >;
  120 + };
  121 +
  122 + pinctrl_uart2: uart2grp {
  123 + fsl,pins = <
  124 + MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
  125 + MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
  126 + MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
  127 + MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
  128 + >;
  129 + };
  130 +
  131 + pinctrl_uart4: uart4grp {
  132 + fsl,pins = <
  133 + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  134 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  135 + >;
  136 + };
  137 +
  138 + pinctrl_usbotg: usbotggrp {
  139 + fsl,pins = <
  140 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  141 + >;
  142 + };
  143 +
  144 + pinctrl_usbh2_1: usbh2grp-1 {
  145 + fsl,pins = <
  146 + MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x40013030
  147 + MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40013030
  148 + >;
  149 + };
  150 +
  151 + pinctrl_usbh2_2: usbh2grp-2 {
  152 + fsl,pins = <
  153 + MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40017030
  154 + >;
  155 + };
  156 +
  157 + pinctrl_usbh3_1: usbh3grp-1 {
  158 + fsl,pins = <
  159 + MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x40013030
  160 + MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40013030
  161 + >;
  162 + };
  163 +
  164 + pinctrl_usbh3_2: usbh3grp-2 {
  165 + fsl,pins = <
  166 + MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40017030
  167 + >;
  168 + };
  169 +
  170 + pinctrl_usdhc3: usdhc3grp {
  171 + fsl,pins = <
  172 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  173 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  174 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  175 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  176 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  177 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  178 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
  179 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
  180 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
  181 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
  182 + >;
  183 + };
  184 +
  185 + pinctrl_usdhc3_cdwp: usdhc3cdwp {
  186 + fsl,pins = <
  187 + MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000
  188 + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
  189 + >;
  190 + };
  191 +
  192 + pinctrl_usdhc4: usdhc4grp {
  193 + fsl,pins = <
  194 + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  195 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  196 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  197 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  198 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  199 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  200 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
  201 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
  202 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
  203 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
  204 + >;
  205 + };
  206 + };
  207 +};
  208 +
  209 +&fec {
  210 + pinctrl-names = "default";
  211 + pinctrl-0 = <&pinctrl_enet>;
  212 + phy-mode = "rgmii";
  213 + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
  214 + <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
  215 + status = "okay";
  216 +};
  217 +
  218 +&usbotg {
  219 + vbus-supply = <&reg_usb_otg_vbus>;
  220 + pinctrl-names = "default";
  221 + pinctrl-0 = <&pinctrl_usbotg>;
  222 + disable-over-current;
  223 + srp-disable;
  224 + hnp-disable;
  225 + adp-disable;
  226 + status = "okay";
  227 +};
  228 +
  229 +&usdhc3 {
  230 + cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  231 + wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
  232 + vmmc-supply = <&reg_3p3v>;
  233 + pinctrl-names = "default";
  234 + pinctrl-0 = <&pinctrl_usdhc3
  235 + &pinctrl_usdhc3_cdwp>;
  236 + status = "okay";
  237 +};
  238 +
  239 +&usdhc4 {
  240 + non-removable;
  241 + vmmc-supply = <&reg_3p3v>;
  242 + pinctrl-names = "default";
  243 + pinctrl-0 = <&pinctrl_usdhc4>;
  244 + status = "okay";
  245 +};
  246 +
  247 +&uart2 {
  248 + pinctrl-names = "default";
  249 + pinctrl-0 = <&pinctrl_uart2>;
  250 + fsl,dte-mode;
  251 + fsl,uart-has-rtscts;
  252 + status = "okay";
  253 +};
  254 +
  255 +&uart4 {
  256 + pinctrl-names = "default";
  257 + pinctrl-0 = <&pinctrl_uart4>;
  258 + status = "okay";
  259 +};
arch/arm/dts/imx6q-arm2.dts
Diff comments   View file @ a699baf
  1 +/*
  2 + * Copyright 2011 Freescale Semiconductor, Inc.
  3 + * Copyright 2011 Linaro Ltd.
  4 + *
  5 + * The code contained herein is licensed under the GNU General Public
  6 + * License. You may obtain a copy of the GNU General Public License
  7 + * Version 2 or later at the following locations:
  8 + *
  9 + * http://www.opensource.org/licenses/gpl-license.html
  10 + * http://www.gnu.org/copyleft/gpl.html
  11 + */
  12 +
  13 +/dts-v1/;
  14 +#include <dt-bindings/gpio/gpio.h>
  15 +#include "imx6q.dtsi"
  16 +
  17 +/ {
  18 + model = "Freescale i.MX6 Quad Armadillo2 Board";
  19 + compatible = "fsl,imx6q-arm2", "fsl,imx6q";
  20 +
  21 + memory {
  22 + reg = <0x10000000 0x80000000>;
  23 + };
  24 +
  25 + regulators {
  26 + compatible = "simple-bus";
  27 + #address-cells = <1>;
  28 + #size-cells = <0>;
  29 +
  30 + reg_3p3v: regulator@0 {
  31 + compatible = "regulator-fixed";
  32 + reg = <0>;
  33 + regulator-name = "3P3V";
  34 + regulator-min-microvolt = <3300000>;
  35 + regulator-max-microvolt = <3300000>;
  36 + regulator-always-on;
  37 + };
  38 +
  39 + reg_usb_otg_vbus: regulator@1 {
  40 + compatible = "regulator-fixed";
  41 + reg = <1>;
  42 + regulator-name = "usb_otg_vbus";
  43 + regulator-min-microvolt = <5000000>;
  44 + regulator-max-microvolt = <5000000>;
  45 + gpio = <&gpio3 22 0>;
  46 + enable-active-high;
  47 + };
  48 + };
  49 +
  50 + leds {
  51 + compatible = "gpio-leds";
  52 +
  53 + debug-led {
  54 + label = "Heartbeat";
  55 + gpios = <&gpio3 25 0>;
  56 + linux,default-trigger = "heartbeat";
  57 + };
  58 + };
  59 +};
  60 +
  61 +&gpmi {
  62 + pinctrl-names = "default";
  63 + pinctrl-0 = <&pinctrl_gpmi_nand>;
  64 + status = "disabled"; /* gpmi nand conflicts with SD */
  65 + nand-on-flash-bbt;
  66 +};
  67 +
  68 +&iomuxc {
  69 + pinctrl-names = "default";
  70 + pinctrl-0 = <&pinctrl_hog>;
  71 +
  72 + imx6q-arm2 {
  73 + pinctrl_hog: hoggrp {
  74 + fsl,pins = <
  75 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
  76 + >;
  77 + };
  78 +
  79 + pinctrl_enet: enetgrp {
  80 + fsl,pins = <
  81 + MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
  82 + MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
  83 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  84 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  85 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  86 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  87 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  88 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  89 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  90 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  91 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  92 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  93 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  94 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  95 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  96 + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
  97 + >;
  98 + };
  99 +
  100 + pinctrl_gpmi_nand: gpminandgrp {
  101 + fsl,pins = <
  102 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
  103 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
  104 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
  105 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
  106 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
  107 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
  108 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
  109 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
  110 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
  111 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
  112 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
  113 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
  114 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
  115 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
  116 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
  117 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
  118 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
  119 + >;
  120 + };
  121 +
  122 + pinctrl_uart2: uart2grp {
  123 + fsl,pins = <
  124 + MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
  125 + MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
  126 + MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
  127 + MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
  128 + >;
  129 + };
  130 +
  131 + pinctrl_uart4: uart4grp {
  132 + fsl,pins = <
  133 + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  134 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  135 + >;
  136 + };
  137 +
  138 + pinctrl_usbotg: usbotggrp {
  139 + fsl,pins = <
  140 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  141 + >;
  142 + };
  143 +
  144 + pinctrl_usbh2_1: usbh2grp-1 {
  145 + fsl,pins = <
  146 + MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x40013030
  147 + MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40013030
  148 + >;
  149 + };
  150 +
  151 + pinctrl_usbh2_2: usbh2grp-2 {
  152 + fsl,pins = <
  153 + MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40017030
  154 + >;
  155 + };
  156 +
  157 + pinctrl_usbh3_1: usbh3grp-1 {
  158 + fsl,pins = <
  159 + MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x40013030
  160 + MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40013030
  161 + >;
  162 + };
  163 +
  164 + pinctrl_usbh3_2: usbh3grp-2 {
  165 + fsl,pins = <
  166 + MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40017030
  167 + >;
  168 + };
  169 +
  170 + pinctrl_usdhc3: usdhc3grp {
  171 + fsl,pins = <
  172 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  173 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  174 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  175 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  176 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  177 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  178 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
  179 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
  180 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
  181 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
  182 + >;
  183 + };
  184 +
  185 + pinctrl_usdhc3_cdwp: usdhc3cdwp {
  186 + fsl,pins = <
  187 + MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000
  188 + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
  189 + >;
  190 + };
  191 +
  192 + pinctrl_usdhc4: usdhc4grp {
  193 + fsl,pins = <
  194 + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  195 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  196 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  197 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  198 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  199 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  200 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
  201 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
  202 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
  203 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
  204 + >;
  205 + };
  206 + };
  207 +};
  208 +
  209 +&fec {
  210 + pinctrl-names = "default";
  211 + pinctrl-0 = <&pinctrl_enet>;
  212 + phy-mode = "rgmii";
  213 + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
  214 + <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
  215 + status = "okay";
  216 +};
  217 +
  218 +&usbotg {
  219 + vbus-supply = <&reg_usb_otg_vbus>;
  220 + pinctrl-names = "default";
  221 + pinctrl-0 = <&pinctrl_usbotg>;
  222 + disable-over-current;
  223 + srp-disable;
  224 + hnp-disable;
  225 + adp-disable;
  226 + status = "okay";
  227 +};
  228 +
  229 +&usdhc3 {
  230 + cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  231 + wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
  232 + vmmc-supply = <&reg_3p3v>;
  233 + pinctrl-names = "default";
  234 + pinctrl-0 = <&pinctrl_usdhc3
  235 + &pinctrl_usdhc3_cdwp>;
  236 + status = "okay";
  237 +};
  238 +
  239 +&usdhc4 {
  240 + non-removable;
  241 + vmmc-supply = <&reg_3p3v>;
  242 + pinctrl-names = "default";
  243 + pinctrl-0 = <&pinctrl_usdhc4>;
  244 + status = "okay";
  245 +};
  246 +
  247 +&uart2 {
  248 + pinctrl-names = "default";
  249 + pinctrl-0 = <&pinctrl_uart2>;
  250 + fsl,dte-mode;
  251 + fsl,uart-has-rtscts;
  252 + status = "okay";
  253 +};
  254 +
  255 +&uart4 {
  256 + pinctrl-names = "default";
  257 + pinctrl-0 = <&pinctrl_uart4>;
  258 + status = "okay";
  259 +};
arch/arm/dts/imx6q-pop-arm2.dts
Diff comments   View file @ a699baf
  1 +/*
  2 + * Copyright 2015 Freescale Semiconductor, Inc.
  3 + *
  4 + * The code contained herein is licensed under the GNU General Public
  5 + * License. You may obtain a copy of the GNU General Public License
  6 + * Version 2 or later at the following locations:
  7 + *
  8 + * http://www.opensource.org/licenses/gpl-license.html
  9 + * http://www.gnu.org/copyleft/gpl.html
  10 + */
  11 +
  12 +/dts-v1/;
  13 +#include <dt-bindings/gpio/gpio.h>
  14 +#include "imx6q.dtsi"
  15 +
  16 +/ {
  17 + model = "Freescale i.MX6 Quad Armadillo2 Board";
  18 + compatible = "fsl,imx6q-pop-arm2", "fsl,imx6q";
  19 +
  20 + aliases {
  21 + mxcfb0 = &mxcfb1;
  22 + mxcfb1 = &mxcfb2;
  23 + };
  24 +
  25 + pwm-backlight {
  26 + compatible = "pwm-backlight";
  27 + pwms = <&pwm1 0 50000>;
  28 + power-supply = <&reg_lvds_3p3v>;
  29 + brightness-levels = <
  30 + 0 1 2 3 4 5 6 7 8 9
  31 + 10 11 12 13 14 15 16 17 18 19
  32 + 20 21 22 23 24 25 26 27 28 29
  33 + 30 31 32 33 34 35 36 37 38 39
  34 + 40 41 42 43 44 45 46 47 48 49
  35 + 50 51 52 53 54 55 56 57 58 59
  36 + 60 61 62 63 64 65 66 67 68 69
  37 + 70 71 72 73 74 75 76 77 78 79
  38 + 80 81 82 83 84 85 86 87 88 89
  39 + 90 91 92 93 94 95 96 97 98 99
  40 + 100
  41 + >;
  42 + default-brightness-level = <94>;
  43 + status = "okay";
  44 + };
  45 +
  46 + gpio-keys {
  47 + compatible = "gpio-keys";
  48 + pinctrl-names = "default";
  49 + pinctrl-0 = <&pinctrl_gpio_keys>;
  50 +
  51 + power {
  52 + label = "Power Button";
  53 + gpios = <&gpio3 30 1>;
  54 + linux,code = <116>;
  55 + gpio-key,wakeup;
  56 + };
  57 + };
  58 +
  59 + hannstar_cabc {
  60 + compatible = "hannstar,cabc";
  61 + lvds_share {
  62 + gpios = <&max7310_a 0 GPIO_ACTIVE_HIGH>;
  63 + };
  64 + };
  65 +
  66 + memory {
  67 + linux,usable-memory = <0x10000000 0x20000000>,
  68 + <0x80000000 0x20000000>;
  69 + };
  70 +
  71 + mxcfb1: fb@0 {
  72 + compatible = "fsl,mxc_sdc_fb";
  73 + disp_dev = "ldb";
  74 + interface_pix_fmt = "RGB666";
  75 + default_bpp = <16>;
  76 + int_clk = <0>;
  77 + late_init = <0>;
  78 + status = "okay";
  79 + };
  80 +
  81 + mxcfb2: fb@1 {
  82 + compatible = "fsl,mxc_sdc_fb";
  83 + disp_dev = "hdmi";
  84 + interface_pix_fmt = "RGB24";
  85 + mode_str = "1920x1080M@60";
  86 + default_bpp = <24>;
  87 + int_clk = <0>;
  88 + late_init = <0>;
  89 + status = "okay";
  90 + };
  91 +
  92 + sound-hdmi {
  93 + compatible = "fsl,imx6q-audio-hdmi", "fsl,imx-audio-hdmi";
  94 + model = "imx-audio-hdmi";
  95 + hdmi-controller = <&hdmi_audio>;
  96 + };
  97 +
  98 + regulators {
  99 + compatible = "simple-bus";
  100 + #address-cells = <1>;
  101 + #size-cells = <0>;
  102 +
  103 + reg_3p3v: regulator@0 {
  104 + compatible = "regulator-fixed";
  105 + reg = <0>;
  106 + regulator-name = "3P3V";
  107 + regulator-min-microvolt = <3300000>;
  108 + regulator-max-microvolt = <3300000>;
  109 + regulator-always-on;
  110 + };
  111 +
  112 + reg_usb_otg_vbus: regulator@1 {
  113 + compatible = "regulator-fixed";
  114 + reg = <1>;
  115 + regulator-name = "usb_otg_vbus";
  116 + regulator-min-microvolt = <5000000>;
  117 + regulator-max-microvolt = <5000000>;
  118 + gpio = <&gpio3 22 0>;
  119 + enable-active-high;
  120 + };
  121 +
  122 + reg_lvds_3p3v: regulator@2 {
  123 + compatible = "regulator-fixed";
  124 + reg = <2>;
  125 + regulator-name = "LVDS-3P3V";
  126 + regulator-min-microvolt = <3300000>;
  127 + regulator-max-microvolt = <3300000>;
  128 + gpio = <&max7310_b 1 GPIO_ACTIVE_HIGH>;
  129 + enable-active-high;
  130 + regulator-always-on;
  131 + };
  132 + };
  133 +};
  134 +
  135 +&cpu0 {
  136 + fsl,arm-soc-shared = <1>;
  137 +};
  138 +
  139 +&busfreq {
  140 + fsl,max_ddr_freq = <400000000>;
  141 +};
  142 +
  143 +&dcic1 {
  144 + dcic_id = <0>;
  145 + dcic_mux = "dcic-hdmi";
  146 + status = "okay";
  147 +};
  148 +
  149 +&dcic2 {
  150 + dcic_id = <1>;
  151 + dcic_mux = "dcic-lvds0";
  152 + status = "okay";
  153 +};
  154 +
  155 +&fec {
  156 + pinctrl-names = "default";
  157 + pinctrl-0 = <&pinctrl_enet>;
  158 + phy-mode = "rgmii";
  159 + status = "okay";
  160 +};
  161 +
  162 +&hdmi_audio {
  163 + status = "okay";
  164 +};
  165 +
  166 +&hdmi_cec {
  167 + pinctrl-names = "default";
  168 + pinctrl-0 = <&pinctrl_hdmi_cec>;
  169 + status = "okay";
  170 +};
  171 +
  172 +&hdmi_core {
  173 + ipu_id = <0>;
  174 + disp_id = <1>;
  175 + status = "okay";
  176 +};
  177 +
  178 +&hdmi_video {
  179 + fsl,phy_reg_vlev = <0x0294>;
  180 + fsl,phy_reg_cksymtx = <0x800d>;
  181 + status = "okay";
  182 +};
  183 +
  184 +&i2c2 {
  185 + clock-frequency = <100000>;
  186 + pinctrl-names = "default";
  187 + pinctrl-0 = <&pinctrl_i2c2>;
  188 + status = "okay";
  189 +
  190 + egalax_ts@04 {
  191 + compatible = "eeti,egalax_ts";
  192 + reg = <0x04>;
  193 + pinctrl-names = "default";
  194 + pinctrl-0 = <&pinctrl_egalax_int>;
  195 + interrupt-parent = <&gpio3>;
  196 + interrupts = <31 2>;
  197 + wakeup-gpios = <&gpio3 31 0>;
  198 + };
  199 +
  200 + hdmi: edid@50 {
  201 + compatible = "fsl,imx6-hdmi-i2c";
  202 + reg = <0x50>;
  203 + };
  204 +};
  205 +
  206 +&i2c3 {
  207 + clock-frequency = <100000>;
  208 + pinctrl-names = "default";
  209 + pinctrl-0 = <&pinctrl_i2c3>;
  210 + status = "okay";
  211 +
  212 + max7310_a: gpio@1b {
  213 + compatible = "maxim,max7310";
  214 + reg = <0x1b>;
  215 + gpio-controller;
  216 + #gpio-cells = <2>;
  217 + };
  218 +
  219 + max7310_b: gpio@1f {
  220 + compatible = "maxim,max7310";
  221 + reg = <0x1f>;
  222 + gpio-controller;
  223 + #gpio-cells = <2>;
  224 + };
  225 +};
  226 +
  227 +&iomuxc {
  228 + pinctrl-names = "default";
  229 + pinctrl-0 = <&pinctrl_hog>;
  230 +
  231 + imx6q-arm2 {
  232 + pinctrl_hog: hoggrp {
  233 + fsl,pins = <
  234 + MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000
  235 + MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059
  236 + >;
  237 + };
  238 +
  239 + pinctrl_enet: enetgrp {
  240 + fsl,pins = <
  241 + MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
  242 + MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
  243 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  244 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  245 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  246 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  247 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  248 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  249 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  250 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  251 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  252 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  253 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  254 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  255 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  256 + >;
  257 + };
  258 +
  259 + pinctrl_gpio_keys: gpio_keysgrp {
  260 + fsl,pins = <
  261 + MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
  262 + >;
  263 + };
  264 +
  265 + pinctrl_hdmi_cec: hdmicecgrp {
  266 + fsl,pins = <
  267 + MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x108b0
  268 + >;
  269 + };
  270 +
  271 + pinctrl_hdmi_hdcp: hdmihdcpgrp {
  272 + fsl,pins = <
  273 + MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
  274 + MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
  275 + >;
  276 + };
  277 +
  278 + pinctrl_i2c2: i2c2grp {
  279 + fsl,pins = <
  280 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  281 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  282 + >;
  283 + };
  284 +
  285 + pinctrl_i2c3: i2c3grp {
  286 + fsl,pins = <
  287 + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  288 + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
  289 + >;
  290 + };
  291 +
  292 + pinctrl_egalax_int: egalax_intgrp {
  293 + fsl,pins = <
  294 + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000
  295 + >;
  296 + };
  297 +
  298 + pinctrl_pwm1: pwm1grp {
  299 + fsl,pins = <
  300 + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
  301 + >;
  302 + };
  303 +
  304 + pinctrl_uart2: uart2grp {
  305 + fsl,pins = <
  306 + MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
  307 + MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
  308 + MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
  309 + MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
  310 + >;
  311 + };
  312 +
  313 + pinctrl_uart4: uart4grp {
  314 + fsl,pins = <
  315 + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  316 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  317 + >;
  318 + };
  319 +
  320 + pinctrl_usbotg: usbotggrp {
  321 + fsl,pins = <
  322 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  323 + >;
  324 + };
  325 +
  326 + pinctrl_usdhc3: usdhc3grp {
  327 + fsl,pins = <
  328 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  329 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  330 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  331 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  332 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  333 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  334 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
  335 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
  336 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
  337 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
  338 + >;
  339 + };
  340 +
  341 + pinctrl_usdhc3_cdwp: usdhc3cdwp {
  342 + fsl,pins = <
  343 + MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000
  344 + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
  345 + >;
  346 + };
  347 +
  348 + pinctrl_usdhc4: usdhc4grp {
  349 + fsl,pins = <
  350 + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  351 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  352 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  353 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  354 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  355 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  356 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
  357 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
  358 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
  359 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
  360 + >;
  361 + };
  362 + };
  363 +};
  364 +
  365 +&ldb {
  366 + status = "okay";
  367 +
  368 + lvds-channel@0 {
  369 + fsl,data-mapping = "spwg";
  370 + fsl,data-width = <18>;
  371 + crtc = "ipu2-di0";
  372 + primary;
  373 + status = "okay";
  374 +
  375 + display-timings {
  376 + native-mode = <&timing0>;
  377 + timing0: hsd100pxn1 {
  378 + clock-frequency = <65000000>;
  379 + hactive = <1024>;
  380 + vactive = <768>;
  381 + hback-porch = <220>;
  382 + hfront-porch = <40>;
  383 + vback-porch = <21>;
  384 + vfront-porch = <7>;
  385 + hsync-len = <60>;
  386 + vsync-len = <10>;
  387 + };
  388 + };
  389 + };
  390 +};
  391 +
  392 +&pwm1 {
  393 + pinctrl-names = "default";
  394 + pinctrl-0 = <&pinctrl_pwm1>;
  395 + status = "okay";
  396 +};
  397 +
  398 +&uart2 {
  399 + pinctrl-names = "default";
  400 + pinctrl-0 = <&pinctrl_uart2>;
  401 + fsl,dte-mode;
  402 + fsl,uart-has-rtscts;
  403 + status = "okay";
  404 +};
  405 +
  406 +&uart4 {
  407 + pinctrl-names = "default";
  408 + pinctrl-0 = <&pinctrl_uart4>;
  409 + status = "okay";
  410 +};
  411 +
  412 +&usbotg {
  413 + vbus-supply = <&reg_usb_otg_vbus>;
  414 + pinctrl-names = "default";
  415 + pinctrl-0 = <&pinctrl_usbotg>;
  416 + disable-over-current;
  417 + srp-disable;
  418 + hnp-disable;
  419 + adp-disable;
  420 + status = "okay";
  421 +};
  422 +
  423 +&usdhc3 {
  424 + cd-gpios = <&gpio6 11 0>;
  425 + wp-gpios = <&gpio6 14 0>;
  426 + vmmc-supply = <&reg_3p3v>;
  427 + pinctrl-names = "default";
  428 + pinctrl-0 = <&pinctrl_usdhc3
  429 + &pinctrl_usdhc3_cdwp>;
  430 + status = "okay";
  431 +};
  432 +
  433 +&usdhc4 {
  434 + non-removable;
  435 + vmmc-supply = <&reg_3p3v>;
  436 + pinctrl-names = "default";
  437 + pinctrl-0 = <&pinctrl_usdhc4>;
  438 + status = "okay";
  439 +};