Commit a6e25b2e12f954c40c76f5d024557ef409a9c4d5
Committed by
Marek Vasut
1 parent
c493756ab4
Exists in
smarc_8mq_lf_v2020.04
and in
17 other branches
serial: sh: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2
Use the common RCAR_GEN2 config option instead of enumerating each SoC and having a lengthy ifdef clause. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Showing 1 changed file with 4 additions and 9 deletions Side-by-side Diff
drivers/serial/serial_sh.h
... | ... | @@ -224,9 +224,7 @@ |
224 | 224 | # define SCSPTR3 0xffc60020 /* 16 bit SCIF */ |
225 | 225 | # define SCIF_ORER 0x0001 /* Overrun error bit */ |
226 | 226 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
227 | -#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ | |
228 | - defined(CONFIG_R8A7792) || defined(CONFIG_R8A7793) || \ | |
229 | - defined(CONFIG_R8A7794) || defined(CONFIG_RCAR_GEN3) | |
227 | +#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_RCAR_GEN3) | |
230 | 228 | # if defined(CONFIG_SCIF_A) |
231 | 229 | # define SCIF_ORER 0x0200 |
232 | 230 | # else |
... | ... | @@ -308,8 +306,7 @@ |
308 | 306 | /* SH7763 SCIF2 support */ |
309 | 307 | # define SCIF2_RFDC_MASK 0x001f |
310 | 308 | # define SCIF2_TXROOM_MAX 16 |
311 | -#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || defined(CONFIG_R8A7792) || \ | |
312 | - defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) | |
309 | +#elif defined(CONFIG_RCAR_GEN2) | |
313 | 310 | # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) |
314 | 311 | # if defined(CONFIG_SCIF_A) |
315 | 312 | # define SCIF_RFDC_MASK 0x007f |
... | ... | @@ -566,8 +563,7 @@ |
566 | 563 | SCIF_FNS(SCFDR, 0x1c, 16) |
567 | 564 | SCIF_FNS(SCLSR, 0x24, 16) |
568 | 565 | SCIF_FNS(DL, 0x00, 0) /* dummy */ |
569 | -#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || defined(CONFIG_R8A7792) || \ | |
570 | - defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) | |
566 | +#elif defined(CONFIG_RCAR_GEN2) | |
571 | 567 | /* SCIFA and SCIF register offsets and size */ |
572 | 568 | SCIx_FNS(SCSMR, 0, 0, 0x00, 16, 0, 0, 0x00, 16, 0, 0) |
573 | 569 | SCIx_FNS(SCBRR, 0, 0, 0x04, 8, 0, 0, 0x04, 8, 0, 0) |
... | ... | @@ -762,8 +758,7 @@ |
762 | 758 | #define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk) |
763 | 759 | #elif defined(__H8300H__) || defined(__H8300S__) |
764 | 760 | #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) |
765 | -#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || defined(CONFIG_R8A7792) || \ | |
766 | - defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) | |
761 | +#elif defined(CONFIG_RCAR_GEN2) | |
767 | 762 | #define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */ |
768 | 763 | #if defined(CONFIG_SCIF_A) |
769 | 764 | #define SCBRR_VALUE(bps, clk) (clk / bps / 16 - 1) /* Internal Clock */ |