Eric Lee / smarc-uboot

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Commit a81f663ff77f2e9c5938e9f1514807b8f96c93cd

Authored by Manivannan Sadhasivam
Committed by Tom Rini
1 parent 26b068280f
Exists in smarc_8mq_lf_v2020.04 and in 12 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

hisilicon: hikey: Update instructions based on latest source 

Update the HiKey board instructions based on the latest source
available. These instructions are derived from the ATF platform doc.
While updating the instructions, some comments on ATF issue has been
removed since it is fixed in latest ATF source.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

Showing 1 changed file with 113 additions and 146 deletions Side-by-side Diff

board/hisilicon/hikey/README
Diff comments   View file @ a81f663
... ... @@ -10,11 +10,10 @@
10 10 * 802.11a/b/g/n WiFi, Bluetooth
11 11  
12 12 The HiKey schematic can be found here: -
13   -https://github.com/96boards/documentation/blob/master/hikey/96Boards-Hikey-Rev-A1.pdf
  13 +https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/HiKey_schematics_LeMaker_version_Rev_A1.pdf
14 14  
15   -A SoC datasheet can be found here: -
16   -https://github.com/96boards/documentation/blob/master/hikey/
17   -Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
  15 +The SoC datasheet can be found here: -
  16 +https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
18 17  
19 18 Currently the u-boot port supports: -
20 19 * USB
21 20  
22 21  
23 22  
... ... @@ -32,18 +31,20 @@
32 31  
33 32 > mkdir -p ~/hikey/src ~/hikey/bin
34 33 > cd ~/hikey/src
35   - > git clone https://github.com/96boards/edk2.git
36   - > git clone https://github.com/96boards/arm-trusted-firmware.git
37   - > git clone https://github.com/96boards/l-loader.git
38   - > git clone https://github.com/96boards/burn-boot.git
  34 + > git clone https://github.com/96boards-hikey/edk2 -b testing/hikey960_v2.5
  35 + > git clone https://github.com/ARM-software/arm-trusted-firmware
  36 + > git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2
  37 + > git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4
  38 + > git clone https://github.com/96boards-hikey/atf-fastboot
  39 + > wget https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/hisi-idt.py
39 40  
40 41 Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source.
41   -The latest version can be obtained from the edk2 repo.
  42 +The latest version can be obtained from the OpenPlatformPkg repo.
42 43  
43   - > cp edk2/HisiPkg/HiKeyPkg/NonFree/mcuimage.bin ~/hikey/bin/
  44 + > cp OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin ~/hikey/bin/
44 45  
45   -Get nvme.img binary (check this link is still the latest)
46   - > wget -P ~/hikey/bin https://builds.96boards.org/releases/reference-platform/debian/hikey/16.03/bootloader/nvme.img
  46 +Get nvme.img binary
  47 + > wget -P ~/hikey/bin https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/nvme.img
47 48  
48 49 Compile U-Boot
49 50 ==============
50 51  
51 52  
52 53  
53 54  
54 55  
55 56  
56 57  
57 58  
58 59  
59 60  
60 61  
61 62  
62 63  
63 64  
64 65  
65 66  
66 67  
67 68  
... ... @@ -58,86 +59,83 @@
58 59  
59 60 > cd ~/hikey/src/arm-trusted-firmware
60 61 > make CROSS_COMPILE=aarch64-linux-gnu- all fip \
61   - BL30=~/hikey/bin/mcuimage.bin \
  62 + SCP_BL2=~/hikey/bin/mcuimage.bin \
62 63 BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey
63 64  
64   -Copy resulting binaries
65   - > cp build/hikey/debug/bl1.bin ~/hikey/bin
  65 +Copy the resulting FIP binary
66 66 > cp build/hikey/debug/fip.bin ~/hikey/bin
67 67  
  68 +Compile ATF Fastboot
  69 +====================
  70 +
  71 + > cd ~/hikey/src/atf-fastboot
  72 + > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=hikey DEBUG=1
  73 +
68 74 Compile l-loader
69   -===============
  75 +================
70 76 > cd ~/hikey/src/l-loader
71   - > make BL1=~/hikey/bin/bl1.bin all
  77 + > ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl1.bin
  78 + > ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl2.bin
  79 + > ln -sf ~/hikey/src/atf-fastboot/build/hikey/debug/bl1.bin fastboot.bin
  80 + > make hikey PTABLE_LST=aosp-8g
  81 +
  82 +Copy the resulting binaries
72 83 > cp *.img ~/hikey/bin
73 84 > cp l-loader.bin ~/hikey/bin
  85 + > cp recovery.bin ~/hikey/bin
74 86  
75 87 These instructions are adapted from
76   -https://github.com/96boards/documentation/wiki/HiKeyUEFI
  88 +https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey.rst
77 89  
78 90 FLASHING
79 91 ========
80 92  
81 93 1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with
82   -the hisi-idt.py utility.
  94 +the hisi-idt.py utility. Then connect a USB A to B mini cable from your PC to the USB OTG port of HiKey and execute the below command.
83 95  
84 96 The command below assumes HiKey enumerated as the first USB serial port
85   - > sudo ~/hikey/src/burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=~/hikey/bin/l-loader.bin
86 97  
87   -2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device by plugging a USB A to mini B
88   - cable from your PC to the USB OTG port of HiKey (on some boards I've found this to be unreliable).
  98 + > sudo python ~/hikey/src/hisi-idt.py -d /dev/ttyUSB0 --img1 ~/hikey/bin/recovery.bin
89 99  
  100 +2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device.
  101 +
90 102 > sudo fastboot devices
91 103  
92 104 0123456789ABCDEF fastboot
93 105  
94 106 3. Flash the images
95 107  
96   - > sudo fastboot flash ptable ~/hikey/bin/ptable.img
  108 + > sudo fastboot flash ptable ~/hikey/bin/prm_ptable.img
  109 + > sudo fastboot flash loader ~/hikey/bin/l-loader.bin
97 110 > sudo fastboot flash fastboot ~/hikey/bin/fip.bin
98 111 > sudo fastboot flash nvme ~/hikey/bin/nvme.img
99 112  
100 113 4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully)
101   - have ATF, booting u-boot from eMMC. On 'new' boards I've had to do the
102   - flashing twice in the past to avoid an ATF error.
  114 + have ATF, booting u-boot from eMMC.
103 115  
104 116 Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you
105 117 will get 'dwc_otg_core_host_init: Timeout!' errors.
106 118  
107   -See working boot trace below (by default trace is now output to UART3 not UART0 on latest
108   -ATF, U-Boot and Kernel sources): -
  119 +See working boot trace below on UART3 available at Low Speed Expansion header: -
109 120  
110   -debug EMMC boot: send RST_N .
111   -debug EMMC boot: start eMMC boot......
112   -load fastboot1!
113   -
114   -Switch to aarch64 mode. CPU0 executes at 0xf9801000!
115   -
116   -INFO: BL1: 0xf9810000 - 0xf9817000 [size = 28672]
117   -NOTICE: Booting Trusted Firmware
118   -NOTICE: BL1: v1.1(debug):e8b7174
119   -NOTICE: BL1: Built : 19:16:44, Sep 8 2015
120   -INFO: BL1: RAM 0xf9810000 - 0xf9817000
121   -NOTICE: syspll frequency:1190494208Hz
122   -NOTICE: succeed to init lpddr3 rank0 dram phy
123   -INFO: lpddr3_freq_init, set ddrc 533mhz
124   -INFO: init ddr3 rank0
  121 +NOTICE: BL2: v1.5(debug):v1.5-694-g6d4f6aea
  122 +NOTICE: BL2: Built : 09:21:42, Aug 29 2018
  123 +INFO: BL2: Doing platform setup
125 124 INFO: ddr3 rank1 init pass
126   -INFO: lpddr3_freq_init, set ddrc 800mhz
127   -INFO: init ddr3 rank0
  125 +INFO: succeed to set ddrc 150mhz
128 126 INFO: ddr3 rank1 init pass
129   -INFO: Elpida DDR
  127 +INFO: succeed to set ddrc 266mhz
  128 +INFO: ddr3 rank1 init pass
  129 +INFO: succeed to set ddrc 400mhz
  130 +INFO: ddr3 rank1 init pass
  131 +INFO: succeed to set ddrc 533mhz
  132 +INFO: ddr3 rank1 init pass
  133 +INFO: succeed to set ddrc 800mhz
  134 +INFO: Samsung DDR
130 135 INFO: ddr test value:0xa5a55a5a
131   -INFO: Hisilicon HiKey platform is initialized
132   -INFO: Using FIP
133   -INFO: Loading file 'bl2.bin' at address 0xf9818000
134   -INFO: File 'bl2.bin' loaded: 0xf9818000 - 0xf9821100
135   -NOTICE: BL1: Booting BL2
136   -INFO: BL1: BL2 address = 0xf9818000
137   -INFO: BL1: BL2 spsr = 0x3c5
  136 +INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
  137 +INFO: BL2: TrustZone: protecting 4194304 bytes of memory at 0x3e800000
138 138 INFO: [BDID] [fff91c18] midr: 0x410fd033
139   -INFO: [BDID] [fff91c1c] board type: 0
140   -INFO: [BDID] [fff91c20] board id: 0x2b
141 139 INFO: init_acpu_dvfs: pmic version 17
142 140 INFO: init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00.
143 141 INFO: acpu_dvfs_volt_init: success!
144 142  
145 143  
146 144  
147 145  
148 146  
149 147  
150 148  
151 149  
152 150  
153 151  
154 152  
... ... @@ -150,112 +148,81 @@
150 148 INFO: - 2: 0x50
151 149 INFO: - 3: 0x60
152 150 INFO: - 4: 0x78
153   -NOTICE: acpu_dvfs_set_freq: set acpu freq success!NOTICE: BL2: v1.1(debug):e8b7174
154   -NOTICE: BL2: Built : 19:16:46, Sep 8 2015
155   -INFO: BL2: Loading BL3-0
156   -INFO: Using FIP
157   -INFO: Loading file 'bl30.bin' at address 0x1000000
158   -INFO: Skip reserving memory: 0x1000000 - 0x1023270
159   -INFO: File 'bl30.bin' loaded: 0x1000000 - 0x1023270
160   -INFO: bl2_plat_handle_bl30: [1000000] 3a334d43 34313032 2f38302f 30203133
161   -INFO: bl2_plat_handle_bl30: [10000c8] 0 0 b 0
162   -INFO: bl2_plat_handle_bl30: [1000190] 17 0 0 0
163   -INFO: bl2_plat_handle_bl30: [1023260] 0 0 0 0
  151 +NOTICE: acpu_dvfs_set_freq: set acpu freq success!INFO: BL2: Loading image id 2
  152 +INFO: Loading image id=2 at address 0x1000000
  153 +INFO: Image id=2 loaded: 0x1000000 - 0x1023d00
164 154 INFO: hisi_mcu_load_image: mcu sections 0:
165 155 INFO: hisi_mcu_load_image: src = 0x1000200
166 156 INFO: hisi_mcu_load_image: dst = 0xf6000000
167   -INFO: hisi_mcu_load_image: size = 512
168   -INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x7600 0x201 0x1eae1 0x1ea71
169   -INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x7600 0x201 0x1eae1 0x1ea71
  157 +INFO: hisi_mcu_load_image: size = 31184
  158 +INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x8000 0x3701 0x7695 0x7689
  159 +INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x8000 0x3701 0x7695 0x7689
170 160 INFO: hisi_mcu_load_image: mcu sections 1:
171   -INFO: hisi_mcu_load_image: src = 0x1000400
172   -INFO: hisi_mcu_load_image: dst = 0xf6000200
173   -INFO: hisi_mcu_load_image: size = 27828
174   -INFO: hisi_mcu_load_image: [SRC 0x1000400] 0xbf00bf00 0x4815b672 0x48154780 0x60014915
175   -INFO: hisi_mcu_load_image: [DST 0xf6000200] 0xbf00bf00 0x4815b672 0x48154780 0x60014915
  161 +INFO: hisi_mcu_load_image: src = 0x1007bd0
  162 +INFO: hisi_mcu_load_image: dst = 0x5e00000
  163 +INFO: hisi_mcu_load_image: size = 93828
  164 +INFO: hisi_mcu_load_image: [SRC 0x1007bd0] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
  165 +INFO: hisi_mcu_load_image: [DST 0x5e00000] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
176 166 INFO: hisi_mcu_load_image: mcu sections 2:
177   -INFO: hisi_mcu_load_image: src = 0x10070b4
178   -INFO: hisi_mcu_load_image: dst = 0xf6007200
179   -INFO: hisi_mcu_load_image: size = 1024
180   -INFO: hisi_mcu_load_image: [SRC 0x10070b4] 0x55 0x0 0x0 0x0
181   -INFO: hisi_mcu_load_image: [DST 0xf6007200] 0x55 0x0 0x0 0x0
  167 +INFO: hisi_mcu_load_image: src = 0x101ea54
  168 +INFO: hisi_mcu_load_image: dst = 0x5e16e84
  169 +INFO: hisi_mcu_load_image: size = 15428
  170 +INFO: hisi_mcu_load_image: [SRC 0x101ea54] 0x9 0x1020640 0x10001 0x8f0d180
  171 +INFO: hisi_mcu_load_image: [DST 0x5e16e84] 0x9 0x1020640 0x10001 0x8f0d180
182 172 INFO: hisi_mcu_load_image: mcu sections 3:
183   -INFO: hisi_mcu_load_image: src = 0x10074b4
184   -INFO: hisi_mcu_load_image: dst = 0xfff8e000
185   -INFO: hisi_mcu_load_image: size = 12704
186   -INFO: hisi_mcu_load_image: [SRC 0x10074b4] 0x55 0x0 0x0 0x0
187   -INFO: hisi_mcu_load_image: [DST 0xfff8e000] 0x55 0x0 0x0 0x0
188   -INFO: hisi_mcu_load_image: mcu sections 4:
189   -INFO: hisi_mcu_load_image: src = 0x100a654
190   -INFO: hisi_mcu_load_image: dst = 0x5e00000
191   -INFO: hisi_mcu_load_image: size = 82912
192   -INFO: hisi_mcu_load_image: [SRC 0x100a654] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0
193   -INFO: hisi_mcu_load_image: [DST 0x5e00000] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0
194   -INFO: hisi_mcu_load_image: mcu sections 5:
195   -INFO: hisi_mcu_load_image: src = 0x101ea34
196   -INFO: hisi_mcu_load_image: dst = 0x5e143e0
197   -INFO: hisi_mcu_load_image: size = 12816
198   -INFO: hisi_mcu_load_image: [SRC 0x101ea34] 0x33323130 0x37363534 0x42413938 0x46454443
199   -INFO: hisi_mcu_load_image: [DST 0x5e143e0] 0x33323130 0x37363534 0x42413938 0x46454443
200   -INFO: hisi_mcu_load_image: mcu sections 6:
201   -INFO: hisi_mcu_load_image: src = 0x1021c44
202   -INFO: hisi_mcu_load_image: dst = 0x5e1c1d0
  173 +INFO: hisi_mcu_load_image: src = 0x1022698
  174 +INFO: hisi_mcu_load_image: dst = 0x5e22a10
203 175 INFO: hisi_mcu_load_image: size = 3060
204   -INFO: hisi_mcu_load_image: [SRC 0x1021c44] 0x0 0x0 0x0 0x0
205   -INFO: hisi_mcu_load_image: [DST 0x5e1c1d0] 0x0 0x0 0x0 0x0
206   -INFO: hisi_mcu_load_image: mcu sections 7:
207   -INFO: hisi_mcu_load_image: src = 0x1022838
208   -INFO: hisi_mcu_load_image: dst = 0x5e1cdc4
  176 +INFO: hisi_mcu_load_image: [SRC 0x1022698] 0x0 0x0 0x0 0x0
  177 +INFO: hisi_mcu_load_image: [DST 0x5e22a10] 0x0 0x0 0x0 0x0
  178 +INFO: hisi_mcu_load_image: mcu sections 4:
  179 +INFO: hisi_mcu_load_image: src = 0x102328c
  180 +INFO: hisi_mcu_load_image: dst = 0x5e23604
209 181 INFO: hisi_mcu_load_image: size = 2616
210   -INFO: hisi_mcu_load_image: [SRC 0x1022838] 0xf80000a0 0x0 0xf80000ac 0x0
211   -INFO: hisi_mcu_load_image: [DST 0x5e1cdc4] 0xf80000a0 0x0 0xf80000ac 0x0
  182 +INFO: hisi_mcu_load_image: [SRC 0x102328c] 0xf80000a0 0x0 0xf80000ac 0x0
  183 +INFO: hisi_mcu_load_image: [DST 0x5e23604] 0xf80000a0 0x0 0xf80000ac 0x0
212 184 INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0
213   -INFO: bl2_plat_handle_bl30: mcu pc is 42933301
214   -INFO: bl2_plat_handle_bl30: AO_SC_PERIPH_CLKSTAT4 is 39018f09
215   -INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
216   -INFO: BL2: Loading BL3-1
217   -INFO: Using FIP
218   -INFO: Loading file 'bl31.bin' at address 0xf9858000
219   -INFO: File 'bl31.bin' loaded: 0xf9858000 - 0xf9861010
220   -INFO: BL2: Loading BL3-2
221   -INFO: Using FIP
222   -WARNING: Failed to access image 'bl32.bin' (-1)
223   -WARNING: Failed to load BL3-2 (-1)
224   -INFO: BL2: Loading BL3-3
225   -INFO: Using FIP
226   -INFO: Loading file 'bl33.bin' at address 0x35000000
227   -INFO: File 'bl33.bin' loaded: 0x35000000 - 0x3504c468
228   -NOTICE: BL1: Booting BL3-1
229   -INFO: BL1: BL3-1 address = 0xf9858000
230   -INFO: BL1: BL3-1 spsr = 0x3cd
231   -INFO: BL1: BL3-1 params address = 0xf9821920
232   -INFO: BL1: BL3-1 plat params address = 0x0
233   -NOTICE: BL3-1: v1.1(debug):e8b7174
234   -NOTICE: BL3-1: Built : 19:16:49, Sep 8 2015
235   -INFO: BL3-1: Initializing runtime services
236   -INFO: BL3-1: Preparing for EL3 exit to normal world
237   -INFO: BL3-1: Next image address = 0x35000000
238   -INFO: BL3-1: Next image spsr = 0x3c9
  185 +INFO: plat_hikey_bl2_handle_scp_bl2: MCU PC is at 0x42933301
  186 +INFO: plat_hikey_bl2_handle_scp_bl2: AO_SC_PERIPH_CLKSTAT4 is 0x3b018f09
  187 +WARNING: BL2: Platform setup already done!!
  188 +INFO: BL2: Loading image id 3
  189 +INFO: Loading image id=3 at address 0xf9858000
  190 +INFO: Image id=3 loaded: 0xf9858000 - 0xf9860058
  191 +INFO: BL2: Loading image id 5
  192 +INFO: Loading image id=5 at address 0x35000000
  193 +INFO: Image id=5 loaded: 0x35000000 - 0x35061cd2
  194 +NOTICE: BL2: Booting BL31
  195 +INFO: Entry point address = 0xf9858000
  196 +INFO: SPSR = 0x3cd
  197 +NOTICE: BL31: v1.5(debug):v1.5-694-g6d4f6aea
  198 +NOTICE: BL31: Built : 09:21:44, Aug 29 2018
  199 +WARNING: Using deprecated integer interrupt array in gicv2_driver_data_t
  200 +WARNING: Please migrate to using an interrupt_prop_t array
  201 +INFO: ARM GICv2 driver initialized
  202 +INFO: BL31: Initializing runtime services
  203 +INFO: BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied
  204 +INFO: BL31: cortex_a53: CPU workaround for 843419 was applied
  205 +INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
  206 +INFO: BL31: Preparing for EL3 exit to normal world
  207 +INFO: Entry point address = 0x35000000
  208 +INFO: SPSR = 0x3c9
239 209  
240   -U-Boot 2015.10-rc2 (Sep 08 2015 - 20:29:33 +0100)hikey
241 210  
242   -DRAM: 1008 MiB
243   -HI6553 PMIC init
244   -MMC: config_sd_carddetect: SD card not present
245   -HiKey DWMMC: 0, HiKey DWMMC: 1
246   -Card did not respond to voltage select!
247   -** Bad device mmc 1 **
248   -Using default environment
  211 +U-Boot 2018.09-rc1 (Aug 22 2018 - 14:55:49 +0530)hikey
249 212  
250   -In: serial
251   -Out: serial
252   -Err: serial
  213 +DRAM: 990 MiB
  214 +HI6553 PMIC init
  215 +MMC: config_sd_carddetect: SD card present
  216 +Hisilicon DWMMC: 0, Hisilicon DWMMC: 1
  217 +Loading Environment from FAT... Unable to use mmc 1:1... Failed (-5)
  218 +In: uart@f7113000
  219 +Out: uart@f7113000
  220 +Err: uart@f7113000
253 221 Net: Net Initialization Skipped
254 222 No ethernet found.
255 223 Hit any key to stop autoboot: 0
256 224 starting USB...
257   -USB0: Core Release: 3.00a
258   -scanning bus 0 for devices... 2 USB Device(s) found
  225 +USB0: scanning bus 0 for devices... 2 USB Device(s) found
259 226 scanning usb for storage devices... 0 Storage Device(s) found
260 227 scanning usb for ethernet devices... 0 Ethernet Device(s) found