Eric Lee / smarc-uboot

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Commit a85121392015e30bd12302ea2986b7ca662d198d

Authored by Faiz Abbas
Committed by Peng Fan
1 parent c7d106b4eb
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

mmc: am654_sdhci: Implement workaround for card detect 

The 4 bit MMC controllers have an internal debounce for the SDCD line
with a debounce delay of 1 second. Therefore, after clocks to the IP are
enabled, software has to wait for this time before it can power on the
controller.

Add a deferred_probe() callback which polls on sdcd for a maximum of 2 seconds
before switching on power to the controller or (in the case of no card)
returning a ENOMEDIUM. This pushes the 1 second wait time to when the
card is actually needed rather than at every probe() making sure that
users who don't insert an SD card in the slot don't have to wait such a
long time.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Showing 1 changed file with 68 additions and 41 deletions Side-by-side Diff

drivers/mmc/am654_sdhci.c
Diff comments   View file @ a851213
... ... @@ -218,44 +218,6 @@
218 218 return 0;
219 219 }
220 220  
221   -const struct sdhci_ops am654_sdhci_ops = {
222   - .set_ios_post = &am654_sdhci_set_ios_post,
223   - .set_control_reg = &am654_sdhci_set_control_reg,
224   -};
225   -
226   -const struct am654_driver_data am654_drv_data = {
227   - .ops = &am654_sdhci_ops,
228   - .flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT,
229   -};
230   -
231   -const struct am654_driver_data j721e_8bit_drv_data = {
232   - .ops = &am654_sdhci_ops,
233   - .flags = DLL_PRESENT,
234   -};
235   -
236   -static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
237   -{
238   - struct udevice *dev = host->mmc->dev;
239   - struct am654_sdhci_plat *plat = dev_get_platdata(dev);
240   - u32 otap_del_sel, mask, val;
241   -
242   - otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
243   - mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
244   - val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);
245   - regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
246   -
247   - return 0;
248   -}
249   -
250   -const struct sdhci_ops j721e_4bit_sdhci_ops = {
251   - .set_ios_post = &j721e_4bit_sdhci_set_ios_post,
252   -};
253   -
254   -const struct am654_driver_data j721e_4bit_drv_data = {
255   - .ops = &j721e_4bit_sdhci_ops,
256   - .flags = IOMUX_PRESENT,
257   -};
258   -
259 221 int am654_sdhci_init(struct am654_sdhci_plat *plat)
260 222 {
261 223 u32 ctl_cfg_2 = 0;
... ... @@ -302,6 +264,73 @@
302 264 return 0;
303 265 }
304 266  
  267 +#define MAX_SDCD_DEBOUNCE_TIME 2000
  268 +static int am654_sdhci_deferred_probe(struct sdhci_host *host)
  269 +{
  270 + struct udevice *dev = host->mmc->dev;
  271 + struct am654_sdhci_plat *plat = dev_get_platdata(dev);
  272 + unsigned long start;
  273 + int val;
  274 +
  275 + /*
  276 + * The controller takes about 1 second to debounce the card detect line
  277 + * and doesn't let us power on until that time is up. Instead of waiting
  278 + * for 1 second at every stage, poll on the CARD_PRESENT bit upto a
  279 + * maximum of 2 seconds to be safe..
  280 + */
  281 + start = get_timer(0);
  282 + do {
  283 + if (get_timer(start) > MAX_SDCD_DEBOUNCE_TIME)
  284 + return -ENOMEDIUM;
  285 +
  286 + val = mmc_getcd(host->mmc);
  287 + } while (!val);
  288 +
  289 + am654_sdhci_init(plat);
  290 +
  291 + return sdhci_probe(dev);
  292 +}
  293 +
  294 +const struct sdhci_ops am654_sdhci_ops = {
  295 + .deferred_probe = am654_sdhci_deferred_probe,
  296 + .set_ios_post = &am654_sdhci_set_ios_post,
  297 + .set_control_reg = &am654_sdhci_set_control_reg,
  298 +};
  299 +
  300 +const struct am654_driver_data am654_drv_data = {
  301 + .ops = &am654_sdhci_ops,
  302 + .flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT,
  303 +};
  304 +
  305 +const struct am654_driver_data j721e_8bit_drv_data = {
  306 + .ops = &am654_sdhci_ops,
  307 + .flags = DLL_PRESENT,
  308 +};
  309 +
  310 +static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
  311 +{
  312 + struct udevice *dev = host->mmc->dev;
  313 + struct am654_sdhci_plat *plat = dev_get_platdata(dev);
  314 + u32 otap_del_sel, mask, val;
  315 +
  316 + otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
  317 + mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
  318 + val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);
  319 + regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
  320 +
  321 + return 0;
  322 +}
  323 +
  324 +const struct sdhci_ops j721e_4bit_sdhci_ops = {
  325 + .deferred_probe = am654_sdhci_deferred_probe,
  326 + .set_ios_post = &j721e_4bit_sdhci_set_ios_post,
  327 +};
  328 +
  329 +const struct am654_driver_data j721e_4bit_drv_data = {
  330 + .ops = &j721e_4bit_sdhci_ops,
  331 + .flags = IOMUX_PRESENT,
  332 +};
  333 +
305 334 static int sdhci_am654_get_otap_delay(struct udevice *dev,
306 335 struct mmc_config *cfg)
307 336 {
... ... @@ -375,9 +404,7 @@
375 404  
376 405 regmap_init_mem_index(dev_ofnode(dev), &plat->base, 1);
377 406  
378   - am654_sdhci_init(plat);
379   -
380   - return sdhci_probe(dev);
  407 + return 0;
381 408 }
382 409  
383 410 static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)